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2015-09-02drm/i915: Move {pin, long}_mask initialization to caller from intel_get_hpd_p...Ville Syrjälä
2015-09-02drm/i915: Rename BXT PORTA HPD definesVille Syrjälä
2015-09-02drm/i915: Add HAS_PCH_LPT_LP() macroVille Syrjälä
2015-09-02drm/i915: Factor out ilk_update_display_irq()Ville Syrjälä
2015-09-02drm/i915: Extract intel_hpd_enabled_irqs()Ville Syrjälä
2015-09-02drm/i915: Clean up various HPD definesVille Syrjälä
2015-09-02drm/i915: Update comments around base bppDaniel Vetter
2015-09-02Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queuedDaniel Vetter
2015-09-02drm/i915: Also record time difference if vblank evasion fails, v2.Maarten Lankhorst
2015-09-02drm/i915: Remove start frame argument to pipe_update_begin/end.Maarten Lankhorst
2015-09-02drm/i915: guest i915 notification for Intel GVT-gZhiyuan Lv
2015-09-02drm/i915: Update PV INFO page definition for Intel GVT-gZhiyuan Lv
2015-09-02drm/i915: Always enable execlists on BDW for vgpuZhiyuan Lv
2015-09-02drm/i915: preallocate pdps for 32 bit vgpuZhiyuan Lv
2015-09-02drm/i915: add yesno utility functionJani Nikula
2015-09-02drm/i915: move intel_hrawclk() to intel_display.cJani Nikula
2015-09-02drm/i915: Notify GuC rc6 stateAlex Dai
2015-09-02drm/i915/guc: Support GuC version 4.3Alex Dai
2015-09-02drm/i915: Fix module initialisation, v2.Maarten Lankhorst
2015-09-01drm/i915: Factor out intel_crtc_has_encoders()Ville Syrjälä
2015-09-01drm/i915: Fix clock readout when pipes are enabled w/o portsVille Syrjälä
2015-09-01drm/i915: Add CHV PHY LDO power sanity checksVille Syrjälä
2015-09-01drm/i915: Add some CHV DPIO lane power state assertsVille Syrjälä
2015-09-01drm/i915: Clean up CHV lane soft reset programmingVille Syrjälä
2015-09-01i915: Set ddi_pll_sel in DP MST pathAnder Conselvan de Oliveira
2015-09-01drm/i915: Bump command parser version number.Francisco Jerez
2015-09-01drm/i915/dp: use the drm dp helper for determining sink tps3 supportJani Nikula
2015-09-01drm/i915: Don't use link_bw for PLL setupVille Syrjälä
2015-09-01drm/dp: add drm_dp_tps3_supported helperJani Nikula
2015-09-01drm/i915: Preserve SSC earlierLukas Wunner
2015-08-31drm/i915/skl: Adding DDI_E power well domainXiong Zhang
2015-08-31drm/i915: eDP can be present on DDI-ERodrigo Vivi
2015-08-31drm/i915/skl: Enable DDI-ERodrigo Vivi
2015-08-31drm/i915: Enable HDMI on DDI-EXiong Zhang
2015-08-31drm/i915: apply the PCI_D0/D3 hibernation workaround everywhere on pre GEN6Imre Deak
2015-08-31drm/i915: Check DP link status on long hpd tooVille Syrjälä
2015-08-28drm/i915: set CDCLK if DPLL0 enabled during resuming from S3Gary Wang
2015-08-28drm/i915: Update DRIVER_DATE to 20150828Daniel Vetter
2015-08-26Partially revert "drm/i915: Use full atomic modeset."Maarten Lankhorst
2015-08-26drm/i915: gen 9 can check for unclaimed registers tooPaulo Zanoni
2015-08-26drm/i915: Force CL2 off in CHV x1 PHYVille Syrjälä
2015-08-26drm/i915: Enable DPIO SUS clock gating on CHVVille Syrjälä
2015-08-26drm/i915: Force common lane on for the PPS kick on CHVVille Syrjälä
2015-08-26drm/i915: Trick CL2 into life on CHV when using pipe B with port BVille Syrjälä
2015-08-26drm/i915: Implement PHY lane power gating for CHVVille Syrjälä
2015-08-26drm/i915: Move DPLL ref/cri/VGA mode frobbing to the disp2d well enableVille Syrjälä
2015-08-26drm/i915: Make some string arrays constVille Syrjälä
2015-08-26drm/i915: Use ARRAY_SIZE() instead of hand rolling itVille Syrjälä
2015-08-26drm/i915: Fix some gcc warningsVille Syrjälä
2015-08-26drm/i915/bxt: Use correct live status register for BXT platformJani Nikula
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