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2011-11-15video: tegra: host: Enhance FIFO/GATHER debug_dumptegra-l4t-er-2011-11-16Terje Bergstrom
Enhance nvhost_debug_dump() output, as follows: - Swap FIFO and GATHER dump so that even if GATHER dump blows out seq_printf 1k buffer, we still have FIFO information; - Write FIFO signature pattern (0xd???d???) to indirect save input data to help pinpoint FIFO position within debug dumps; - Prevent long data sequences from blowing out the seq_printf 1k buffer, by limiting such sequences to 64 words. Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/62424 (cherry picked from commit cb37e4212b78546411b33b32044f30feb0579b86) Change-Id: Ia2695c502fa0c7b755ef2ae51260650c7d67bf86 Reviewed-on: http://git-master/r/64061 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-15video: tegra: host: Sync 3D wait base only on timeoutTerje Bergstrom
Synchronize 3D wait base only when there is a timeout. Bug 886411 Reviewed-on: http://git-master/r/62656 (cherry picked from commit 1f660b9ea615331624dcf8a923e7779fa3bcd48a) Change-Id: I085342ae2d9808c1284d59222f968835bd469921 Reviewed-on: http://git-master/r/64060 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-15input: tegra-kbc: Support to configure any pins to row/columnLaxman Dewangan
Any of the KBC GPIO pins can be configured to either as row or as column. Adding support for this. bug 804531 Reviewed-on: http://git-master/r/59927 (cherry picked from commit 59b90aa62766d34290e623fc6e2dfc8fc630af0e) Change-Id: I01100fc6964278940b97428a3df561616f356f2f Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/64034
2011-11-15arm: tegra: Configuring kbc pins as per gpio nrLaxman Dewangan
Configuring the kbc pins such that the row/column is configured in their respective GPIO number. bug 804531 Reviewed-on: http://git-master/r/59942 (cherry picked from commit 8685f95f771c5568e0dba4e444179a2f7412e639) Change-Id: I07c46281f25bdfadb2d35704a507e2ace640a684 Reviewed-on: http://git-master/r/64033 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-11-15ARM: tegra: clock: Return shared_bus_set_rate() errorsAlex Frid
Returned error code from Tegra3 shared_bus_set_rate(). (cherry picked from commit b9aea1656af4d3e17433c82611fe5e7146a41733) Change-Id: Ib3706c61dc911d7bb876f1ddafe52474f79591ec Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/63978 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-15ARM: tegra: dvfs: Fix dvfs over-voltage error handlingAlex Frid
Record dvfs client voltage rate request only after over-voltage error is checked (otherwise, after over-voltage error rail goes above the limit when another client requests voltage change). (cherry picked from commit 9151f77b545dc5b898ad16ceb695cc57764f94e0) Change-Id: I20b70beadb226980c55feeea5510a52bc155eb73 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/63977 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-15ARM: tegra: clock: Add Tegra3 emergency throttlingAlex Frid
Add Tegra3 emergency throttling API to directly control G-CPU super clock skipper underneath clock framework, dvfs, and cpufreq driver s/w layers. To be used by system power supply over-current ISR. (cherry picked from commit fca2a12e90684526b2b7aeeb3af31de4254ad939) Change-Id: I8de8f4889d0f6cf6a7cc19a3cc11c6bd9b4fc526 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/63976 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-15ARM: tegra: dvfs: Update Tegra3 EMC DVFSAlex Frid
- Moved validation of EMC maximum rate against nominal core voltage from common dvfs initialization to board specific EMC scaling table setup (a logical place to do it, since EMC DVFS is board dependent) - Used current rate as rounded EMC rate if no EMC scaling table is provided (instead of maximum EMC rate - no sense in attempt to set maximum rate, or any rate, for that matter, if there is no table). - Cleaned EMC initialization procedure (cherry picked from commit 4f655077e09c0dc4abc50d190d82c91473e2e81c) Change-Id: Ibe5c689db58f0aab3a24eceda1f4b639d073a4dc Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/63975 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-15arm: tegra: Fix tegra_throttling_enable definitionKrishna Monian
Define tegra_throttling_enable as static instead of NULL to prevent compile errors. Change-Id: If6ff32dc93aaa8bd2564a795c4187e0dd57df0f9 Reviewed-on: http://git-master/r/63435 Reviewed-by: Krishna Monian <kmonian@nvidia.com> Tested-by: Krishna Monian <kmonian@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2011-11-15arm: tegra: enterprise: Config enable conservative gov on early suspendKarthik Ramakrishnan
Enabling conservative gov for early suspend which is n by default Change-Id: I8bdd2fad82cf7667bb5b0c39738f628d902bae5d Reviewed-on: http://git-master/r/62770 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-11-15video: tegra: nvmap: Update page attributes as per request.Krishna Reddy
After allocating pages, Update page attributes in kernel page table as per mem type requested. Bug 865816 Reviewed-on: http://git-master/r/56334 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> (cherry picked from commit bea4d449f4ff7090e0c2797693d2348f4586d8f6) Change-Id: Ic1fe862412c09f57d1dbf05a1da98fd22d0d49a4 Reviewed-on: http://git-master/r/62720 Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2011-11-15mfd: max77663: Move sleep enable setting from suspend to resumeMin-wuk Lee
Moving sleep enable setting from suspend to resume. And add sleep enable setting into probe. Bug 849360 Original Author: Jinyoung Park Reviewed-on: http://git-master/r/60656 (cherry picked from commit 9ba5f1f22d73fe62d0f509fd6cad26f34e25a017) Change-Id: I84496fcf09daec08e01ebb8d976716e1197502b1 Reviewed-on: http://git-master/r/62381 Reviewed-by: Min-wuk Lee <mlee@nvidia.com> Tested-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-11-14Sdhci: Tegra: Fixing Indentationnaveenk
Fixing Indentation as suggested by checkpatch.pl Reviewed-on: http://git-master/r/60223 (cherry picked from commit c6f12245ad1cec0c18d91e664a71c30f51a4231f) Change-Id: I6e59be4117853d8855dc88515ae1c283f5881837 Reviewed-on: http://git-master/r/62903 Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-11-14arm: tegra: config: Disabling CONFIG_MMC_PARANOID_SD_INITnaveenk
Disabling CONFIG_MMC_PARANOID_SD_INIT Bug 862205 Reviewed-on: http://git-master/r/59916 (cherry picked from commit c9e5705e03363baf9b6e8bfed30d8f00469d89ea) Change-Id: I040ec21d07d9e1c2680530169ba1bdd7c891d610 Reviewed-on: http://git-master/r/62888 Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-11-11ARM: tegra: dvfs: Update Tegra3 AP33 speedo thresholdsDiwakar Tundlam
bugid 841336 Reviewed-on: http://git-master/r/61621 (cherry picked from commit 329035165f483c806f83831a8a5b4eff126b1ac8) Change-Id: I80cedc3391786570cbb24ec3bfc59e729abde795 Reviewed-on: http://git-master/r/62768 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
2011-11-11ARM: Tegra: power: T33 SKU EDP table for 10A regulatorDiwakar Tundlam
bug 841336 Change-Id: I0e0d88c2bcfd7ee4b774adc1bc4c8eff47d4ac29 Reviewed-on: http://git-master/r/60762 (cherry picked from commit 3e74aa621439db78500a8fb07d0fe4620ba3ad05) Reviewed-on: http://git-master/r/62766 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
2011-11-11tegra: NOR: Get SNOR Base from platform deviceManoj Chourasia
Make SNOR controller address mapped as platform resource. Change-Id: I2d52934d6f953fab126d4a4044b2dc49d617b99d Reviewed-on: http://git-master/r/59137 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-11-11tegra: NOR: Add NOR platform deviceManoj Chourasia
Added NOR platform device for Tegra. Change-Id: Id32e5d41862b2eccf1b49b953387de16302d6056 Reviewed-on: http://git-master/r/56895 Tested-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2011-11-11tegra: NOR: Pass timing register value from platfom dataManoj Chourasia
Get timing register value from platform data instead of timing structure. Fix NOR device registration using tegra_nor_device. Signed-off-by: Manoj Chourasia <mchouraia@nvidia.com> Change-Id: I4ece8b149df1bc7ad41e8be3dc3e415b18a44072 Reviewed-on: http://git-master/r/56889 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-11-11tegra: NOR: Allow mapping NOR aperture and clocks.Manoj Chourasia
Renamed client driver for nor clock from "nor" to "tegra-nor". Add NOR flash aperature as valid address range in ioremap. Change-Id: Ib5e896996da5cbf3d31e1c3c31d8250bb0c0a3c4 Reviewed-on: http://git-master/r/44746 Tested-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2011-11-11video: tegra: ov9726: follow linux conventionCharlie Huang
move the set mode table from odm driver to the kernel driver. Bug 856739 Original Gerrit: http://git-master/r/#change,60741 (cherry picked from commit 18e2d9f8b61767a4dc0df7621531d1b040fe3ca0) Change-Id: Ic7321bd88e01accd0a09a96c4ba406b139a08f54 Reviewed-on: http://git-master/r/61664 Reviewed-by: Charlie Huang <chahuang@nvidia.com> Tested-by: Charlie Huang <chahuang@nvidia.com> Reviewed-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-10ARM: tegra: enable DVFS without EMC SCALINGJong Kim
Enable both CPU_DVFS and CORE_DVFS leaving EMC_SCALING OFF for Tegra2. EMC_SCALING makes graphics flaky on Ventana. BUG 899233 Change-Id: Icaa78f76c1c770ce268dd481d37c4c3b3a313df1 Signed-off-by: Jong Kim <jongk@nvidia.com> Reviewed-on: http://git-master/r/63619 Reviewed-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-10ARM: tegra: enterprise: remove panel reset in first kernel bootMin-wuk Lee
Panel reset in the first kernel boot is removed because this makes short flicker in transition from bootloader display to kernel display. Panel reset in system resume is still remained. Bug 874071 Reviewed-on: http://git-master/r/53695 (cherry picked from commit 8d3412cfe2dd1d135209f8060f883fdc85571d8e) Change-Id: I78c1d3f07d7ef6eada3b5981218ab609532c3964 Reviewed-on: http://git-master/r/62373 Reviewed-by: Min-wuk Lee <mlee@nvidia.com> Tested-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Tested-by: Gerrit_Virtual_Submit
2011-11-10arm: tegra: enterprise: Pass ext power req control properlyLaxman Dewangan
Passing the external power request control information for rails through ext_pwr_req. Reviewed-on: http://git-master/r/62654 (cherry picked from commit 9fc465709e002d7967757a433a5465f92371d466) Change-Id: Iea797e1dfbbe9418b081940418aa770671ca1bfa Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/63502 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-11-10arm: tegra: cardhu: Put LDO7/8 to OFF in sleep stateLaxman Dewangan
Putting the LDO7 and LDO8 to OFF in sleep state. bug 892613 Reviewed-on: http://git-master/r/60878 (cherry picked from commit e4dbb17af9c1cca65c12c1db3ca491b467d188c9) Change-Id: I952476b4ac60a907851bd125493bdd4dca0ab9b0 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/63500 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-11-10mfd: tps80031: Move external pwr req to core driverLaxman Dewangan
Moving the configuration function for configuring the rail control through the PREQ line to core from regulator driver. Fixing the correct voltage configuration for the LDO2 based on TRACK mode. Reviewed-on: http://git-master/r/62456 (cherry picked from commit db37514bdefc6126556a9e84c12f7e49b656d7ba) Change-Id: I0eda24c2896956713bd0ad2ace52a07578f6a629 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/63503
2011-11-10sdhci: tegra: Updated contorller clk rate settingPradeep Goudagunta
Setting controller clock rate to 100MHz if requested rate is between 12-100MHz and 208MHz if requested rate is greater than 100MHz. Bug 877336 Reviewed-on: http://git-master/r/55434 (cherry picked from commit a8eef6207abb643dedaeab9dd3a230eb6c169512) Change-Id: I6bae2a81f44fe448cc6286dbe00093283b42b3a8 Reviewed-on: http://git-master/r/62418 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-11-10video: tegra: host: Send error codes to user spaceTerje Bergstrom
Flush needs to send error codes to user space instead of suppressing them. Bug 886411 Reviewed-on: http://git-master/r/62385 (cherry picked from commit 357f4f8c8cc31713a32a26488e7f2031e5fff842) Change-Id: Ibec16d062242d2bdc7bc57cba7b264141decffc5 Reviewed-on: http://git-master/r/63219 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-10video: tegra: host: Set power state in boot-upTerje Bergstrom
Set correct power state for modules during boot-up. This is done by splitting nvhost_module_init() into two parts: preinit and init. Preinit sets correct power state, and is called for all modules during boot-up. Init calls pre-init and performs the rest of initialization of nvhost_module structure. Bug 855755 Reviewed-on: http://git-master/r/62102 (cherry picked from commit 003df5ddd4fcffca9b7456cdb1150cfc041f406c) Conflicts: drivers/video/tegra/host/nvhost_acm.c Change-Id: I807f0c3608b1859bcbd7e8bfcb6ed27d6cdb1a80 Reviewed-on: http://git-master/r/63218 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-10video: tegra: host: Enable powergating for MPE and 3DTerje Bergstrom
Enable power gating for MPE and 3D in T30. Bug 857044 Reviewed-on: http://git-master/r/62101 (cherry picked from commit 4fd4d2a948450f04181179f5f1e4da7b6c9e3060) Change-Id: Ia9506fd188e31770d447faa25cf7b00adaca894a Reviewed-on: http://git-master/r/63217 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-10video: tegra: host: Fix debug method signatureTerje Bergstrom
Fix signature of show_channel_gather(). Reviewed-on: http://git-master/r/58398 (cherry picked from commit c1082bc73106b270b904cec80cca201a3caad472) Change-Id: Ib16aaf411fba682e78b151f295c981783f0ebd58 Reviewed-on: http://git-master/r/63216 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-11-10ARM: tegra: cardhu: emmc: Increase max_clk freqPradeep Goudagunta
Increasing maximum clock frequency supported by sdmmc4 to 104MHz. Bug 877336 Reviewed-on: http://git-master/r/55433 (cherry picked from commit 8a785b8517e9c97992d53026b604698ea177e637) Change-Id: Ie160c939832eb01e8605c5bc8f9533c0bdf1daea Reviewed-on: http://git-master/r/62417 Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-11-10video: tegra: dc: ignore unused overlays for bandwidthJoel Kenny
If an overlay is not being used, do not program the latency allowance. This is to avoid underflows that occur at a resolution of 19x12. When the unused overlays are reenabled, they underflow if the latency allowance has previously been increased to a very high value. (cherry picked from commit 8a4c47b17fae10a65e4816e419dff46b9f4785d1) Change-Id: I825b4c1659a9f4f982bc66513b08b95879f17dd5 Reviewed-on: http://git-master/r/62522 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-11-10video: tegra: dsi: Add support for DCS short write (1 parameter)Ming Wong
Add MIPI DCS short write (1 parameter) support. The cmds sent with this new function will be sent every frame by hardware Signed-off-by: Ming Wong <miwong@nvidia.com> Bug 884157 (cherry picked from commit 855cac72bf030213db6fa1e42ce4e5891b16681c) Change-Id: I5c4e8696195d01f4f9dfb8cf66b5b3744f78c41e Reviewed-on: http://git-master/r/62300 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-11-10ARM: Tegra: Power: use new api to get cpu regulator max_currDiwakar Tundlam
used when the chip SKU is T33/T33S (cardhu case) or AP33 (enterprise case) to initialize edp with a higher cpu regulator max_curr value. bug 888679 Reviewed-on: http://git-master/r/59452 (cherry picked from commit cd817edc2f2f3071d2cf4dc2b1166f5dcf77dbef) Change-Id: Icb50b33b1fc9b1248886e040f4b9b927feee4242 Reviewed-on: http://git-master/r/60780 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-11-10ARM: Tegra: dvfs: T33 SKU EDP tableDiwakar Tundlam
Bug 841336 Reviewed-on: http://git-master/r/52460 (cherry picked from commit dd2864cd36ff707508fb5e5e8f5eb2ff944983da) Change-Id: I661a9d27cd84d28c7e6ab74a020653a93c388fe8 Reviewed-on: http://git-master/r/60779 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-11-10arm: tegra: power: guardbanding only for accuracy of TDiodeDiwakar Tundlam
Bug 844025 Reviewed-on: http://git-master/r/51443 (cherry picked from commit 1abdcb266a1fa22fd766549d5eddcca92e1fb17e) Change-Id: I0bc47499ca1f944cc69d51eb78de39c25ef73e1a Reviewed-on: http://git-master/r/60777 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-11-10hwmon: tegra: tsensor: EDP support for tsensorJoshua Primero
Added support for EDP in tsensor. Since low limit interrupts are not supported in hardware TH2 was used for upper limit and TH0/TH1 as lower limit. Also added generic functions to enable tsensor for thermal refactoring. Bug 848755 Reviewed-on: http://git-master/r/59234 (cherry picked from commit ec630418497accc9b326bb6b2126b7d62ad56e50) Change-Id: If9f4d697d0c44653f83db86ccd2f6935bf209cb5 Reviewed-on: http://git-master/r/63345 Reviewed-by: Joshua Primero <jprimero@nvidia.com> Tested-by: Joshua Primero <jprimero@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-11-10arm: tegra: power: tsensor to therm frameworkJoshua Primero
Hooked up tsensor to thermal framework. Cleaned up some unnessary tsensor code as well. Bug 848755 Reviewed-on: http://git-master/r/62021 (cherry picked from commit 307f53a36bd1bdfaabddfdd80f9de5445d805786) Change-Id: Ic16f417461cdb71cbd135f57d1017bab8433dcdf Reviewed-on: http://git-master/r/63344 Reviewed-by: Joshua Primero <jprimero@nvidia.com> Tested-by: Joshua Primero <jprimero@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-11-10drivers: nct1008: Generic therm funcs to nct1008Joshua Primero
Preparing nct1008 for refactoring overhaul. Added generic functions which will be used by Tegra thermal module. Change-Id: I34cbc5c84d9dd6e5f29cd631323bb8755899c5f7 Reviewed-on: http://git-master/r/57952 Reviewed-on: http://git-master/r/63337 Reviewed-by: Joshua Primero <jprimero@nvidia.com> Tested-by: Joshua Primero <jprimero@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-11-10arm: tegra: fuse: add tegra revision string for A03Diwakar Tundlam
Change-Id: I4928468454c4c2f3f5b0f3a8f08c7eb5241c40cd (cherry picked from commit 7c2b764fb591eaed843efcc4adf6b8b37f8eb942) Reviewed-on: http://git-master/r/62767 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
2011-11-10arm: tegra: fix compiler warningsDiwakar Tundlam
Reviewed-on: http://git-master/r/53296 (cherry picked from commit 12ed00a4b6024299617f7ff9cd2f0e718f5eb11e) Change-Id: Id536d9d33dd11eac706954ca1bce2d0c5ba14895 Reviewed-on: http://git-master/r/60778 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
2011-11-10video: tegra: dc: Disable 1080p stereo supportDhiren Bhatia
Temporarily disable support since it appears the modeset to 1080p takes longer than anticipated. Re-enable once issue has been fixed. Bug 869099 Reviewed-on: http://git-master/r/#change,51833 (cherry-picked from change I4d596e33016a3723bca9bdb707cedd993a18f71b) Change-Id: Ifa08a9bd9d0415e0f9f09b13c83e34d3ef4fc1a9 Reviewed-on: http://git-master/r/53891 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com> Tested-by: Dhiren Bhatia <dbhatia@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2011-11-09arm: tegra: enterprise: HSIC phy ready and phy off callbacksSeshendra Gadagottu
Implemented HSIC phy ready and phy off callabacks for enterprise board. BUG 828389 Reviewed-on: http://git-master/r/52884 (cherry picked from commit fc919eab4be5012f9fd0fc7dbd4b7de7d5bff5db) Change-Id: Ia3539e5982f4c0df5b9fca04c118ba8a6132431a Reviewed-on: http://git-master/r/62975 Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Steve Lin <stlin@nvidia.com>
2011-11-09arm: tegra: cardhu: HSIC phy ready and phy off callbacksSeshendra Gadagottu
Implemented HSIC phy ready and phy off callabacks for cardhu board. BUG 828389 Reviewed-on: http://git-master/r/52883 (cherry picked from commit 9d2e1e07c00d1f84dc24ccb861c5fb9ca751cb9c) Change-Id: I655c037402119244c7f78e2625fa893f4ad3c50f Reviewed-on: http://git-master/r/62974 Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Steve Lin <stlin@nvidia.com>
2011-11-09mfd: ricoh583: Move sleep configuration to core driverLaxman Dewangan
Moving the sleep sequence configuration for the pmu from regulator driver to core driver so that other than power rails, gpio can also use these APIs. Reviewed-on: http://git-master/r/62652 (cherry picked from commit eeb7d4a5fabe803e9c76900ff1aa1d71e8111c75) Change-Id: I2bcb751d25e59939e2c7119dc131df11d10fdfa9 Reviewed-on: http://git-master/r/62901 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-11-09arm: tegra: cardhu: pm299: Controls cpu power through PWRREQ2Laxman Dewangan
Controlling cpu power through external power request PWRREQ2. Reviewed-on: http://git-master/r/62651 (cherry picked from commit 3091e2ed93bb9bf5a962f5fc509dde16a89a34fb) Change-Id: I3276ab26abe451e091f290aedd9417ea04e53a5d Reviewed-on: http://git-master/r/62896 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-11-09usb: host: tegra: Fix for possible race condition in timer handlervjagadish
Acquire the spin lock before disabling the clock. Bug 876433 Reviewed-on: http://git-master/r/59136 (cherry picked from commit 38dc376fc332bdc34a9ee9fd9385fd447a0f343d) Change-Id: Ib2f75f4c16d5ad56e698e14b335f2483f0ece429 Reviewed-on: http://git-master/r/62324 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-11-09usb: host: tegra: invalid context error on insertion of USB Drivevjagadish
kernel mutexes may not be used in hardware or software interrupt contexts such as tasklets and timers. Bug 876433 Reviewed-on: http://git-master/r/56938 (cherry picked from commit ebe88906855200ce846059e80b722d1badced378) Change-Id: Id324b53e57eec08d75b147ac18498844ae59b6d2 Reviewed-on: http://git-master/r/62323 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-11-09sdhci: tegra: code cleanupvjagadish
replaced space with tab in multiple places. Reviewed-on: http://git-master/r/54677 (cherry picked from commit a7b9fd1a1cf2d99db16acf3bc6aa4da44f1d38c2) Change-Id: I4860b15d0d2d40e85649212994dd99b05ee920cc Reviewed-on: http://git-master/r/62322 Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com> Tested-by: Venkata Jagadish <vjagadish@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-01-15 06:09:48 +0000