Age | Commit message (Collapse) | Author |
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Fix pixel clock polarity.
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Fix Freescale's magic daisy chain aka select input IOMUX stuff.
Many a saying: welcome to the club (;-p).
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Enable watchdog configuration.
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Various ifdefs still use CONFIG_MACH_COLIBRI_VF50. Migrate them to
using the hidden CONFIG_COLIBRI_VF define active for both Colibri VF50
as well as Colibri VF61.
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Now as the colibri_vf50 configuration allows for 500 MHz A5 core
frequency as well rename it to colibri_vf to be universally used for
Colibri VF50 as well as VF61.
While at it actually add the Colibri VF61 machine id and its
corresponding machine definition.
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Allow for 396 as well as 500 MHz A5 core frequency.
While at it get rid of some Indian coding style artefacts.
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Add the following additional display timings for manual activation:
- 800x480@60 (e.g. EDT ET070080DH6)
- 800x600@60
- 1024x600@60 (e.g. TouchRevolution Fusion 10)
- 1024x768@60
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Use 16 bpp colour mode by default to relieve memory bandwidth.
While at it don't use hard-coded LCD enable pin.
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Add 16 bpp colour mode support.
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Signed-off-by: Alison Wang <b18965@freescale.com>
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Fix VESA VGA display timing.
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In order to configure the ADC correctly, a complete feature table
is required. Also note that those features were not set corretly
due to some bugs in mvf_adc which are fixed by commit
e5cb84471bc3d38ef5d8070abbdf0bc0ceb9d2bf
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Use the hwmon interface to expose the internal temperature sensor
connected to the ADC. In order to calculate the temperature typical
values from the electrical data sheet has been taken.
Read the sensor using sysfs:
$ cat /sys/class/hwmon/hwmon0/device/temp1_input
47282
Note: there are two hwmon devices exposed. Those are the two ADC,
however, both ADC connect to the same temperature sensor.
Essentially, the user can choose which ADC to use to read the
temperature sensor.
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Enable support for all 32 ADC channels, even the internal one. This
is needed to read out the internal temperature since the sensor is
at channel 26.
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Several registers in adc_set were set logical inverse or even the wrong
bits in the registers. Also, return the users ioctrl if the configuration
is not valid.
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Do not return conversion before freeing the allocated memory.
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When compiled as a module, the driver removes the device
entries correctly when the module exits.
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Add a hackish way of enabling USBH_PEN as required for USB host port on
Iris.
Please note that for now this is not integrated with USB class stuff.
Just direct straight GPIO enabling.
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Setup at least a 128 MB big mapping analogous to the following:
5761904d59d84fadadc65de306cb1cba17f49e2a
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Enable RTS/CTS on UART_A aka UART0 and UART_B aka UART2.
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Integrate backlight using both BL_ON GPIO and PWM<A>.
Note: Just disabled PWM LEDs for now (e.g. first need to figure out how
the mapping of different FTMs to their channels actually works).
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Re-work pin muxing:
- FTM aka PWM without open drain enable
- DSPI1
- USBH_PEN, USBC_DET and USB_OC
- EXT_AUDIO_MCLK
- clean-up touchscreen pins
- BL_ON
- UART0 RTS/CTS and UART2
NAND pins are still missing (e.g. rely on U-Boot already having
done their configuration.
While at it clean-up includes as well.
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Disable magic SysRq key configuration as this is not only a potential
security thread but can cause serious trouble if for some reason UART
pins are left floating and therefore cause unexpected break conditions.
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Decrease DMA zone size configuration analogous to Freescale's tower.
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Enable TMPFS POSIX ACL configuration to avoid systemd errors of the
following kind:
[ 27.619666] systemd-logind[269]: Failed to apply ACLs: Operation not
supported
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Re-enable resp. do not explicitly disable L2 cache configuration after
it now properly checks whether or not L2 cache is actually present at
all:
57a25827428efb7e8cc2eb6e59c529b5093a98e5
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to occur when using USB1.
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outside of the kernel.
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L2 cache is not present.
Author: Roshni Shah <roshni.shah@timesys.com>
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Enable the Colibri VF50 touchscreen driver by default when using
default configuration for Colibri VF50.
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The touchscreen support backed by hardware on the Colibri VF50
module and the Vybrid ADC is now moved to a own module for better
maintainability. The mvf-adc driver exports some of its method
now. A good good locking mechanism is still missing.
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In order to be more energy efficient sample the ADC channels only
if touch is detected. Do the pinmux in the platform specific code,
extended the platform data with those helper functions.
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Measure pressure between the two plates (z1/z2) and calculate
resistance which is an approximation measure of the pressure on
the touch screen. Improved signal by better ADC configuration
and averaging.
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The Vybrid VF50 support 4-wire touchscreens using FETs and
ADC inputs. This drivers extends the ADC driver to deliver
initial support for this interface.
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In order to use GPIOs in floating mode, the GPIO driver should not
alter the muxing settings made by pinmux. This patch reads the
current muxing settings and alters only the direction.
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Add clock information and platform data for ADC1. Those data are
used by the driver to create the second ADC instance.
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Extended driver to allow the use of multiple ADC devices. Tested
on Vybrid, works with two ADC instances.
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Touchscreen will be supported through ADC and some GPIOs. This
change adds proper pinmux, no driver support yet.
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Integrate mxc_nand platform data handling in order to allow specifying
8-bit NAND connection via its width parameter.
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Eon's new NAND flash: EN27LN1G08.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This reverts commit f8852e8d0595f6c3f9d2073d45d6e3cbc52816c6.
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Get rid of the unused NAND controller driver platform data.
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Disable NAND controller software ECC in order to use hardware ECC.
Enable ADC driver as well as debugfs file system.
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For now use a divider of 5 in order to get a pixel clock of 30 MHz
required for VESA VGA.
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Increase display pin drive strength by terminating with 75 instead of
150 ohm.
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Set DCU clock to 150.7 MHz which allows further dividing to VESA
compliant pixel clocks.
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Fix rounding in the DCU clocking which previously made it impossible to
actually set a clock that did not divide to a whole number (e.g.
150666666 Hz from the 452 MHz PFD2 parent clock).
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Enable CPU idle to be able to test the power management functionality.
Enable NEON to avoid crashing with our NEON enabled oe-core rootfs.
Enable the Asynchronous Sample Rate Converter (ASRC) which is actually
available on Vybrids.
Enable printk time now with the clock function being fixed thanks to
9195c464ad84836d85aa73aef384fe4382f7770d.
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