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Change-Id: Ica22a3f92c8ca33a5779a74d3afad775736b1663
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/78450
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Change-Id: Ifddccc5407d517b098c448c568a909750abe8380
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78444
Reviewed-by: Automatic_Commit_Validation_User
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Reviewed-on: http://git-master/r/77830
Change-Id: If1fbb73eff40dafdb7bcbe8da451115ef2105b0b
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78441
Reviewed-by: Automatic_Commit_Validation_User
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Check error returned by cpufreq table helper API to avoid using
uninitialized table index in failed case.
Reviewed-on: http://git-master/r/77523
Change-Id: Ie47481a27397c6cafe73bfbddab0a392837ad019
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78439
Reviewed-by: Automatic_Commit_Validation_User
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Removing commented and unused code from the driver
Bug 926128
Reviewed-on: http://git-master/r/77038
Change-Id: I373112b09cdb5bcb25f409e31da17f678590aaa1
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78438
Reviewed-by: Automatic_Commit_Validation_User
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1) Enable TEGRA_GPIO_PU0 for Bluetooth
2) Add platform device wl128x_device and btwilink_device for Bluetooth
3) Set platform data kai_wlan_data for WiFi
Bug 926128
Reviewed-on: http://git-master/r/75929
Change-Id: I3bbe48899358106a299728e924e5a893f68ac60c
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78437
Reviewed-by: Automatic_Commit_Validation_User
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Bug 926128
Reviewed-on: http://git-master/r/75252
Change-Id: I7f9928ab1efdb82ab73eea595c2a8590057b8c72
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78436
Reviewed-by: Automatic_Commit_Validation_User
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baseband_xmm_power driver is updated with suspend/resume noirq callbacks.
If any CP wake-up is pending during suspen_noirq callback, then ongoing
system suspend will be aborted. With this mechanism, CP wakeup after
baseband_xmm_power driver suspend is handled.
BUG 904762
Reviewed-on: http://git-master/r/72933
Change-Id: Iae6f638885118c73d6154aad9daefee0cfc8e7d4
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78435
Reviewed-by: Automatic_Commit_Validation_User
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Don't check if dc is NULL after we've already dereferenced it.
Reviewed-on: http://git-master/r/63647
Change-Id: I0af6c829b6143b21a1f7de47a1ccfeac4bda99e0
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78434
Reviewed-by: Automatic_Commit_Validation_User
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This is the first step in defining a dma buffer sharing mechanism.
A new buffer object dma_buf is added, with operations and API to allow easy
sharing of this buffer object across devices.
The framework allows:
- creation of a buffer object, its association with a file pointer, and
associated allocator-defined operations on that buffer. This operation is
called the 'export' operation.
- different devices to 'attach' themselves to this exported buffer object, to
facilitate backing storage negotiation, using dma_buf_attach() API.
- the exported buffer object to be shared with the other entity by asking for
its 'file-descriptor (fd)', and sharing the fd across.
- a received fd to get the buffer object back, where it can be accessed using
the associated exporter-defined operations.
- the exporter and user to share the scatterlist associated with this buffer
object using map_dma_buf and unmap_dma_buf operations.
Atleast one 'attach()' call is required to be made prior to calling the
map_dma_buf() operation.
Couple of building blocks in map_dma_buf() are added to ease introduction
of sync'ing across exporter and users, and late allocation by the exporter.
For this first version, this framework will work with certain conditions:
- *ONLY* exporter will be allowed to mmap to userspace (outside of this
framework - mmap is not a buffer object operation),
- currently, *ONLY* users that do not need CPU access to the buffer are
allowed.
More details are there in the documentation patch.
This is based on design suggestions from many people at the mini-summits[1],
most notably from Arnd Bergmann <arnd@arndb.de>, Rob Clark <rob@ti.com> and
Daniel Vetter <daniel@ffwll.ch>.
The implementation is inspired from proof-of-concept patch-set from
Tomasz Stanislawski <t.stanislaws@samsung.com>, who demonstrated buffer sharing
between two v4l2 devices. [2]
[1]: https://wiki.linaro.org/OfficeofCTO/MemoryManagement
[2]: http://lwn.net/Articles/454389
Change-Id: I8ebd858ad86242ee7b02d5f42bb25c3edbd64fca
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-and-Tested-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
[Hiroshi DOYU: Backported from v3.3-rc1]
Reviewed-on: http://git-master/r/78384
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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A lot of files pull in module.h when all they are really
looking for is the basic EXPORT_SYMBOL functionality. The
recent data from Ingo[1] shows that this is one of several
instances that has a significant impact on compile times,
and it should be targeted for factoring out (as done here).
Note that several commonly used header files in include/*
directly include <linux/module.h> themselves (some 34 of them!)
The most commonly used ones of these will have to be made
independent of module.h before the full benefit of this change
can be realized.
We also transition THIS_MODULE from module.h to export.h,
since there are lots of files with subsystem structs that
in turn will have a struct module *owner and only be doing:
.owner = THIS_MODULE;
and absolutely nothing else modular. So, we also want to have
the THIS_MODULE definition present in the lightweight header.
[1] https://lkml.org/lkml/2011/5/23/76
Change-Id: I52c16cc63f483d7c572cd0ef2475ef642dfa11c1
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
[Hiroshi DOYU: Backported from v3.3-rc1 for DMABUF]
Reviewed-on: http://git-master/r/78383
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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The mainline IOMMU API v3.3-rc1 has been changed so that bytes are
used in mapping size instead of page order and page-by-page iteration
is taken care of by iommu core.
Change-Id: Ib331b6f3f7075385499eb13dd040c80444d706a8
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/78139
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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The mainline IOMMU API v3.3-rc1 has been changed so that bytes are
used in mapping size instead of page order and page-by-page iteration
is taken care of by iommu core.
The rest are mostly for maintainability:
$ git co iommu/next drivers/iommu/tegra-smmu.c
Change-Id: Ib4fdee4a637b3065a1eab6c56923b05f46b3b582
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/78137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Expand PLL usage restriction mechanism from Tegra3 only to common
tegra clock framework implementation: fail set parent API if new
parent is not allowed per usage policy.
Actual usage policy is architecture dependent and exists now only
on Tegra3.
Reviewed-on: http://git-master/r/77251
Change-Id: I2a8d60cc0ddfd2179961ef50418b193f2e1829c8
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78029
Reviewed-by: Automatic_Commit_Validation_User
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Check PLL usage policy when traversing clock tree for descendants of
sleeping clock. Don't propagate cansleep attribute if parent is not
allowed.
Reviewed-on: http://git-master/r/77252
Change-Id: Ibe79888d378924f416f8458146b21d1bc3671f16
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78028
Reviewed-by: Automatic_Commit_Validation_User
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Configure wake irq for waking up AP from xmm modem.
Also enable/disable this wake source base on flight mode
off/on setting.
Reviewed-on: http://git-master/r/69701
Change-Id: Iad274da9869102874efab27312fe8a182ab55bf3
Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78026
Reviewed-by: Automatic_Commit_Validation_User
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Increasing timeout to 25ms for bus connect and bus idle.
New bus_reset times out for the first time, fix this by
changing USB phy mode to HSIC.
Bug 922444
Reviewed-on: http://git-master/r/73367
Change-Id: I717c98a4e3e8d943a8a922c70442211a0f7fd9be
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78017
Reviewed-by: Automatic_Commit_Validation_User
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The functon tegra_dma_dequeue() duplicates the functionality
of tegra_dma_dequeue_req().And this function does not use proper
locking before accessing the channel data.
Removing this function.
Change-Id: Ib6baaa984b038908c49adb3a0f3df3433f0a9066
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77805
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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The dma client should use the tegra_dma_dequeue_req() for
dequeue the dma request.
Change-Id: I1f433c85ffec997d8c608e08509c48c72b27120a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77804
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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The dma client should use the tegra_dma_dequeue_req() for
dequeue the dma request.
Change-Id: I1bfdca4810a61cb9f9699dabafb2ba045d2c6bd5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77803
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
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Dma user must call the function tegra_dma_get_transfer_count()
for knowing transferred count without stopping dma.
Change-Id: I5e0060fd8163b285496442268548a90bdd0e294c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/77800
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Enable Snaptics SPI touch driver which is used for DirectTouch
purposes.
bug 912775
Reviewed-on: http://git-master/r/76379
Change-Id: I2a2bc4dd68c09039dd36b6c8786b8d16ecb35c80
Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77776
Reviewed-by: Automatic_Commit_Validation_User
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android-tegra-nv-3.1
Change-Id: I9001bb291779f107bbcb593d48f9f0f734074d0e
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Used run time apis for clock controls i.e. clock enable/
disable in place of direct clock apis.
Using of runtime pm api was already implemented but it was
missed on probe where it was calling clock_disable.
Fixing this issue.
bug 928541
Change-Id: I511467bd1cbe05f2a05d219d19236426a30d05d5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/78156
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
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Add 51 MHz entry to cpufreq tables (102 MHz was minimum supported
rate before).
Bug 922351
Reviewed-on: http://git-master/r/77511
Change-Id: I20eea30cdadfb9efbf6489f8aaf5934f653af128
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78032
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Set CPU rate floor to 100MHz when the system is awake (after boot,
or on late resume). Remove the floor when the system enters early
suspend.
Bug 922351
Reviewed-on: http://git-master/r/77444
Change-Id: I68f54a3d981c1cbeac16d58d3beb6e3aa6bf190c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78031
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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On Tegra3 PLLC should be used as a parent clock only for graphics bus
(cbus) modules and secondary PLLC divider. Fail set parent API if PLLC
is selected as a new parent for other clocks.
Reviewed-on: http://git-master/r/77253
Change-Id: I564278dcdd62c17c6446218955c366b1612c73b3
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78030
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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bug 871603
Reviewed-on: http://git-master/r/72258
Change-Id: I2ff63550fde536ee0e0f1b69b3a58e4f164e62e5
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78027
Reviewed-by: Automatic_Commit_Validation_User
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Save and restore new gr3d registers. This is a workaround for
hardware not always initializing the registers to proper state
after un-powergating.
Bug 914785
Reviewed-on: http://git-master/r/75698
Change-Id: Id9d65d93d16daf68e29b1433b7dd3284cb439ffc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78025
Reviewed-by: Automatic_Commit_Validation_User
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Enabling power rails when the card is present
which reduces power consumption
Bug 924888
Reviewed-on: http://git-master/r/75653
Change-Id: If9cbd02b49821954646845bd889501e9159c7b8c
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78023
Reviewed-by: Automatic_Commit_Validation_User
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Enable SDR104 and SDR50 support for Tegra3.
Bug 920089
Bug 913598
Reviewed-on: http://git-master/r/75248
Change-Id: Ib7e7d15f1a42a14bb1ecb3e0f25934309ec43534
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78022
Reviewed-by: Automatic_Commit_Validation_User
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When SD 3.0 cards operate in UHS DDR50 mode, set the
card state to ddr mode to select the proper frequency.
Bug 925326
Reviewed-on: http://git-master/r/72628
Change-Id: I9370ab402eb0c39f603555eccdcb49723ac4910f
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78021
Reviewed-by: Automatic_Commit_Validation_User
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Few board specific calls use this function. Compilation fails if
calls from the board file is not protected by CONFIG_TI_ST, which
is not recommended.
Bug 926128
Reviewed-on: http://git-master/r/77435
Change-Id: Idb4fa9001a102f1cb983afd131bfd4c0c8cf08f3
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78020
Reviewed-by: Automatic_Commit_Validation_User
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This new value is a new type of clock setting that is used by wl128x
chipsets.
Bug 926128
Reviewed-on: http://git-master/r/77361
(cherry picked from commit 62c7d085e1f2a1f2b4d89560551eff18d703b3b1)
Change-Id: I2cf2af565a2574cf789ae73a59b4891969506491
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78019
Reviewed-by: Automatic_Commit_Validation_User
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patch is for following feature
1) use set_power() defined in platform file to
switch on/off BT.
2) send_ll_cmd according to state
Reviewed-on: http://git-master/r/77318
Change-Id: I48ccb310ee4ce97c82835ef5701673c6f40231d4
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78018
Reviewed-by: Automatic_Commit_Validation_User
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Reviewed-on: http://git-master/r/77465
Change-Id: I653afbb6f766493e5d458b2ba4babb8e400c30c1
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78016
Reviewed-by: Automatic_Commit_Validation_User
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Don't check if an unsigned variable < 0.
Reviewed-on: http://git-master/r/77466
Change-Id: Ia61781a8f5b8ebcdc39501486ed3f893a91d3430
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78015
Reviewed-by: Automatic_Commit_Validation_User
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Defer tx urb submit to work function to avoid problems with autopm
not fully resumed.
BUG 929408
Reviewed-on: http://git-master/r/77228
Change-Id: Id559d65384780067e48faee6c79134eb35d298fc
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78014
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Reviewed-on: http://git-master/r/77405
Change-Id: Ia77147074cb90d0ed22f64135a16b374f258b008
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78013
Reviewed-by: Automatic_Commit_Validation_User
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Reviewed-on: http://git-master/r/77403
Change-Id: If51967720de2f4dc1634906fa263c693aef87d75
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78012
Reviewed-by: Automatic_Commit_Validation_User
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Reviewed-on: http://git-master/r/77400
Change-Id: Idbc213bb17d0e006c9a4cdaf500a94dbae1007d0
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78011
Reviewed-by: Automatic_Commit_Validation_User
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Change the minimal rate of sclk to 12 MHz and set the lowest
frequency of sbus to be 40 MHz when display is on.
BUG 922351
Reviewed-on: http://git-master/r/76959
Change-Id: I6a2871d1cc02a19829cf397e9583122e02255f81
Signed-off-by: Wen Yi <wyi@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78010
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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This ensures that host1x's name is host1x, and not host1x.0
Reviewed-on: http://git-master/r/75505
Change-Id: I91d9dcbec108ee7f35dc638ed9370552f6eaa164
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78009
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Add a mutex_unlock() that was missing in the failure case of
the mediasrv_unlocked_ioctl() function.
Bug 918148
Reviewed-on: http://git-master/r/71470
Change-Id: Id935e2eadfcd5ca3ebf7a086afbcfd4224c52604
Signed-off-by: Ron Vaughn <rvaughn@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78008
Reviewed-by: Automatic_Commit_Validation_User
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Added touch setup and init calls to board-kai.c & h files
Also limited max spi clock rate (sbc1) to 72 Mhz
Bug 912775
Bug 832605
Reviewed-on: http://git-master/r/76402
Change-Id: I616bd97538c1513307bce178bb9fd4040a9ecd4d
Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77777
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Board file for Synaptics SPI touch connection which is
used for DirectTouch initialization
Bug 912775
Reviewed-on: http://git-master/r/74643
Change-Id: Ie296ddff5b9e1fbf9296d40fde2877598a13207e
Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77775
Reviewed-by: Automatic_Commit_Validation_User
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This is Synaptics' open source driver except one line
change to accomodate an SPI kernel driver feature
which does not accomodate optional byte-delay. It
will be fully original driver when we add byte-delay
into Tegra SPI kernel drivers.
Bug 912775
Reviewed-on: http://git-master/r/74642
Change-Id: I0f39928c48bc0e633de0d2c1f595bcef47268d52
Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77774
Reviewed-by: Automatic_Commit_Validation_User
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Board file for Raydium SPI touch connection which is
used for DirectTouch initialization
Bug 832605
Reviewed-on: http://git-master/r/74618
Change-Id: Icac5ebd22b5a3b6fe38d3e23a37f88df067c0c10
Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77773
Reviewed-by: Automatic_Commit_Validation_User
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Added Tegra3 MSelect clock to memory on CPU clock dependencies:
MSelect rate is scaled as half of CPU rate, up to 102MHz. Prevented
CPU clock increase if updates of dependent clocks (EMC and MSelect)
have failed.
Reviewed-on: http://git-master/r/76485
Change-Id: I679b60eb5aa13d5cca2b9751ff2c8c2fb866a076
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77767
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Added clock for memory path selection module (MSelect) to Tegra3
peripheral clocks. Initialized MSelect clock rate to 102MHz.
Reviewed-on: http://git-master/r/76484
Change-Id: I73676882d8e6805445985b23257bcf6410e8c3e0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77766
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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