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Rename the text file and update "AP806" into "AP806/AP807" where
relevant.
Signed-off-by: Ben Peled <bpeled@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Add AP807 clock compatible to the bindings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lkml.kernel.org/r/20190805100310.29048-3-miquel.raynal@bootlin.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Add AP807 CPU clock compatible to the bindings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lkml.kernel.org/r/20190805100310.29048-2-miquel.raynal@bootlin.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Document the device tree binding for the cluster clock controllers found
in the Armada 7K/8K SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Link: https://lkml.kernel.org/r/20190710134346.30239-2-gregory.clement@bootlin.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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The thermal IP can produce interrupts on overheat situation.
Describe them.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Explain the thermal bindings now that the thermal IP is described being
inside of a system controller. Add a reference to the thermal-zone node.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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There are multiple system controllers in AP806. Because all syscon nodes
use the same compatible, it is pertinent to use this same file to list
IPs inside it. Thus, change the header to be more generic.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Document the device tree binding for the gpio controllers found on the
Marvell Armada 7K and Armada 8K SoCs.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Document the device tree binding for the pin controllers found on the
Armada 7K and Armada 8K SoCs.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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This patch updates the documentation according to the changes made in the
patch "clk: mvebu: ap806: introduce a new binding"
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/32e35c1d5919bdf9dc7d58678f0c0b462886d03e.1496239589.git-series.gregory.clement@free-electrons.com
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This patch updates the documentation according to the change made in the
patch "clk: mvebu: ap806: do not depend anymore of the
*-clock-output-names": the clock names are no more part of the binding.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/d502b5abc68cbb5739ce72ba8be27528f9042a28.1496239589.git-series.gregory.clement@free-electrons.com
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This commit adds the Device Tree binding documentation for the system
controller found in Marvell AP806 HW block, which is one of the core
HW blocks of the 64-bits Marvell Armada 7K/8K family.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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