summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/pinctrl
AgeCommit message (Collapse)Author
2016-04-19dt-bindings: tegra: Remove 0, prefix from unit-addressesThierry Reding
When Tegra124 support was first merged the unit-addresses of all devices were listed with a "0," prefix to encode the reg property's second cell. It turns out that this notation is not correct, and the "," separator is only used to separate fields in the unit address (such as the device and function number in PCI devices), not individual cells for addresses with more than one cell. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-13Merge tag 'armsoc-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A batch of fixes for -rc4, for various platforms. Nothing really substantial and worth pointing out in particular; small fixes for various bugs, see shortlog for details" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: sa1100: remove references to the defunct handhelds.org bus: uniphier-system-bus: fix condition of overlap check ARM: uniphier: drop weird sizeof() ARM: dts: am335x-baltos-ir5221: fix cpsw_emac0 link type ARM: OMAP: Correct interrupt type for ARM TWD ARM: DRA722: Add ID detect for Silicon Rev 2.0 ARM: dts: am43xx: fix edma memcpy channel allocation ARM: dts: AM43x-epos: Fix clk parent for synctimer ARM: OMAP2: Fix up interconnect barrier initialization for DRA7 documentation: Fix pinctrl documentation for Meson8 / Meson8b ARM: dts: amlogic: Split pinctrl device for Meson8 / Meson8b ARM: mvebu: Correct unit address for linksys bus: mvebu-mbus: use %pa to print phys_addr_t arm64: dts: vulcan: Update PCI ranges ARM: u8500_defconfig: turn on the Synaptics RMI4 driver ARM: pxa: fix the number of DMA requestor lines ARM: OMAP2+: hwmod: Fix updating of sysconfig register ARM: OMAP2+: Use srst_udelay for USB on dm814x
2016-03-30documentation: Fix pinctrl documentation for Meson8 / Meson8bCarlo Caione
Fix pin controller documentation introducing the new compatibles for the pinctrl drivers specific for aobus / cbus. This is needed because we have changed the pin controller driver: we have now a single specialized pinctrl driver / compatible for each bus the controller is attached to, instead of one single driver dealing with all the controllers we have on different buses. Signed-off-by: Carlo Caione <carlo@endlessm.com> Acked-by: Rob Herring <robh@kernel.org>
2016-03-30pinctrl: pistachio: fix mfio84-89 function description and pinmux.Govindraj Raja
mfio 84 to 89 are described wrongly, fix it to describe the right pin and add them to right pin-mux group. The correct order is: pll1_lock => mips_pll -- MFIO_83 pll2_lock => audio_pll -- MFIO_84 pll3_lock => rpu_v_pll -- MFIO_85 pll4_lock => rpu_l_pll -- MFIO_86 pll5_lock => sys_pll -- MFIO_87 pll6_lock => wifi_pll -- MFIO_88 pll7_lock => bt_pll -- MFIO_89 Cc: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: James Hartley <James.Hartley@imgtec.com> Cc: <stable@vger.kernel.org> # v4.2+ Fixes: cefc03e5995e("pinctrl: Add Pistachio SoC pin control driver") Signed-off-by: Govindraj Raja <Govindraj.Raja@imgtec.com> Acked-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-29pinctrl: sh-pfc: Add drive strength supportLaurent Pinchart
Add support for the drive-strengh pin configuration using the generic pinconf DT bindings. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-03-20Merge tag 'armsoc-dt' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Arnd Bergmann: "These are all the updates to device tree files for 32-bit platforms, plus a couple of related 64-bit updates: New SoC support: - Allwinner A83T - Axis Artpec-6 SoC - Mediatek MT7623 SoC - TI Keystone K2G SoC - ST Microelectronics stm32f469 New board or machine support: - ARM Juno R2 - Buffalo Linkstation LS-QVL and LS-GL - Cubietruck plus - D-Link DIR-885L - DT support for ARM RealView PB1176 and PB11MPCore - Google Nexus 7 - Homlet v2 - Itead Ibox - Lamobo R1 - LG Optimus Black - Logicpd dm3730 - Raspberry Pi Model A Other changes include - Lots of updates for Qualcomm APQ8064, MSM8974 and others - Improved support for Nokia N900 and other OMAP machines - Common clk support for lpc32xx - HDLCD display on ARM - Improved stm32f429 support - Improved Renesas device support, r8a779x and others - Lots of Rockchip updates - Samsung cleanups - ADC support for Atmel SAMA5D2 - BCM2835 (Raspberry Pi) improvements - Broadcom Northstar Plus enhancements - OMAP GPMC rework - Several improvements for Atmel SAMA5D2 / Xplained - Global change to remove inofficial "arm,amba-bus" compatible string" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (350 commits) ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus" ARM: dts: artpec: dual-license on artpec6.dtsi ARM: dts: ux500: add synaptics RMI4 for Ux500 TVK DT arm64: dts: juno/vexpress: fix node name unit-address presence warnings arm64: dts: foundation-v8: add SBSA Generic Watchdog device node ARM: dts: at91: sama5d2 Xplained: add leds node ARM: dts: at91: sama5d2 Xplained: add user push button ARM: dts: at91: sama5d2 Xplained: set pin muxing for usb gadget and usb host ARM: dts: stm32f429: Enable Ethernet on Eval board ARM: dts: omap3-sniper: TWL4030 keypad support Revert "ARM: dts: DRA7: Add dt nodes for PWMSS" ARM: dts: dm814x: dra62x: Disable wait pin monitoring for NAND ARM: dts: dm814x: dra62x: Fix NAND device nodes ARM: dts: stm32f429: Add Ethernet support ARM: dts: stm32f429: Add system config bank node ARM: dts: at91: sama5d2: add nand0 and nfc0 nodes ARM: dts: at91: sama5d2: add dma properties to UART nodes ARM: dts: at91: sama5d2 Xplained: Correct the macb irq pinctrl node ARM: dts: exynos: Don't overheat the Odroid XU3-Lite on high load ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs ...
2016-03-11drivers: pinctrl: add driver for Allwinner A64 SoCAndre Przywara
Based on the Allwinner A64 user manual and on the previous sunxi pinctrl drivers this introduces the pin multiplex assignments for the ARMv8 Allwinner A64 SoC. Port A is apparently used for the fixed function DRAM controller, so the ports start at B here (the manual mentions "n from 1 to 7", so not starting at 0). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-09pinctrl: Broadcom Northstar2 pinctrl device tree bindingsYendapally Reddy Dhananjaya Reddy
Device tree binding documentation for Broadcom NS2 IOMUX Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-07pinctrl: lpc1850-scu: document nxp,gpio-pin-interruptJoachim Eastwood
Update devicetree documention for lpc1850-scu with the new nxp,gpio-pin-interrupt property. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-25pinctrl: sunxi: Add missing H3 R_PIO binding documentationKrzysztof Adamski
allwinner,sun8i-h3-r-pinctrl was added by commit ba83a11104ae ("pinctrl: sunxi: Add H3 R_PIO controller support") but the patch was missing proper binding documentation. This patch fixes this issue. Signed-off-by: Krzysztof Adamski <k@japko.eu> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-19pinctrl: mediatek: Modify pinctrl bindings for mt7623John Crispin
Signed-off-by: John Crispin <blogic@openwrt.org> Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16pinctrl: qcom: ipq4019: Add IPQ4019 pinctrl supportVaradarajan Narayanan
Add pinctrl driver support for IPQ4019 platform Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> [Dropped .owner assignment] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-10pinctrl: rockchip: add support for the rk3399David Wu
The pinctrl of rk3399 is much different from other's, especially the 3bits of drive strength. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-09ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370Gregory CLEMENT
Since the commit a526973e0291 ("pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)"), the mpp63 is no more declared as a GPO but is a GPIO. Even if in the datasheet this pin is described as GPO, the experience of the D-Link DNS-327L board shows that it can be used as a GPIO. This commits generated warnings for the board using this pin as gpo, with this patch the dts are fixed by using the new function (gpio) instead of the old one. The binding documentation has also been updated accordingly. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net>
2016-02-05pinctrl: Add DT bindings for PIC32 pin control and GPIOJoshua Henderson
Document the devicetree bindings for PINCTRL and GPIO found on Microchip PIC32 class devices. Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Cc: Ralf Baechle <ralf@linux-mips.org> Acked-by: Rob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-27Documentation: dt-bindings: Document STM32 pinctrl driver DT bindingsMaxime Coquelin
Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-07pinctrl: mediatek: Modify pinctrl bindings for mt2701Biao Huang
Signed-off-by: Biao Huang <biao.huang@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Mathias Brugger <matthias.bgg@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-24Merge tag 'samsung-drivers-4.5' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into devel Exynos-specific drivers for 4.5: 1. Add a pinctrl driver for Exynos5410.
2015-12-22pinctrl: sunxi: Add A80 special pin controllerMaxime Ripard
Like the previous designs, the A80 has a special pin controller for the critical pins, like the PMIC bus. Add a driver for this controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wens: Add A80 compatible strings to bindings doc; fix pin function names based on v1.3 datasheet; constify of_device_id table] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-11pinctrl: rockchip: add support for the rk3228Jeffy Chen
The pinctrl of rk3228 is much the same as rk3288's, but without pmu. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-11pinctrl: sunxi: Add H3 PIO controller supportJens Kuske
The H3 uses the same pin controller as previous SoC's from Allwinner. Add support for the pins controlled by the main PIO controller. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10Merge branch 'bcm-nsp' into develLinus Walleij
2015-12-10pinctrl: Broadcom NSP GPIO-a device tree bindingsYendapally Reddy Dhananjaya Reddy
Device tree binding documentation for Broadcom NSP GPIO-a Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: qcom: spmi-mpp: Add pm8994 mpp supportStephen Boyd
Update the driver and binding for pm8994-mpp devices. Cc: <devicetree@vger.kernel.org> Cc: "Ivan T. Ivanov" <iivanov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: qcom: spmi-gpio: Add pm8994 gpio supportStephen Boyd
Update the binding and driver for pm8994-gpio devices. Cc: <devicetree@vger.kernel.org> Cc: "Ivan T. Ivanov" <iivanov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: qcom: Add msm8996 pinctrl driverJoonwoo Park
Add initial pinctrl driver to support pin configuration with pinctrl framework for msm8996. Cc: <devicetree@vger.kernel.org> Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org> [sboyd@codeaurora.org: Remove duplicate entries and enums] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl/lantiq: updating devicetree binding descriptionMartin Schiller
This patch adds the new dedicated "lantiq,<chip>-pinctrl" compatible strings to the devicetree bindings Documentation, where <chip> is one of "ase", "danube", "xrx100", "xrx200" or "xrx300" and marks the "lantiq,pinctrl-xway", "lantiq,pinctrl-ase" and "lantiq,pinctrl-xr9" compatible strings as DEPRECATED. Signed-off-by: Martin Schiller <mschiller@tdt.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30Documentation: Rename gpio controller name from cygnus to iprocPramod Kumar
Renamed gpio controller's driver name from cygnus to iproc to make it more generic so that all iProc based SoCs having the same gpio controller could use this. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30dt-binding: Add ngpios property to GPIO controller nodePramod Kumar
Add ngpios property to the gpio controller's DT node so that controller driver extracts total number of in-use gpio lines from DT and removes dependency on driver. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-16pinctrl: exynos: add exynos5410 SoC specific dataHakjoo Kim
Add Samsung EXYNOS5410 SoC specific data to enable pinctrl support for all platforms based on EXYNOS5410. Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> [AF: Rebased onto Exynos5260, irq_chip consolidation, const'ification] Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Tested-by: Pavel Fedin <p.fedin@samsung.com> [k.kozlowski: Rebased on current v4.3] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
2015-10-27pinctrl: cygnus: Add new compatible string for gpio controller driverPramod Kumar
This new compatible string, "brcm,iproc-gpio", should be used for all new iproc-based future SoCs. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: cygnus: Optional DT property to support pin mappingsPramod Kumar
If GPIO controller's pins are muxed, pin-controller subsystem need to be intimated by defining mapping between gpio and pinmux controller. This patch adds required properties to define this mapping via DT. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: dt-binding: document berlin4ct SoC pinctrlJisheng Zhang
Add berlin4ct to existing berlin pinctrl device tree binding. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindingsAdrian Alonso
Add iomuxc-lpsr devicetree bindings documentation Provide documentation context as well an example on pheriperals that could use pad from either iomuxc controller supported by iMX7D SoC Signed-off-by: Adrian Alonso <aalonso@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: sunxi: add allwinner A83T PIO controller supportVishnu Patekar
Allwinner A83T soc port controller has 8 ports. It has 3 IRQ banks namely PB, PG, PH. Pinmuxing are different for some pins as compared to sun8i A23 and A33. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02Merge branch 'sh-pfc-for-v4.4' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
2015-10-02pinctrl: sh-pfc: Initial R8A7795 PFC supportTakeshi Kihara
Add PFC base support for the R8A7795 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [Morimoto-san: updated] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-09-21pinctrl: dt-binding: Add DT binding documentation for Atmel PIO4Ludovic Desroches
Add documentation for the Atmel PIO4 controller introduced with SAMA5D2 chip family. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-09-04Merge tag 'pinctrl-v4.3-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v4.3 development cycle. Like with GPIO it's a lot of stuff. If my subsystems are any sign of the overall tempo of the kernel v4.3 will be a gigantic diff. [ It looks like 4.3 is calmer than 4.2 in most other subsystems, but we'll see - Linus ] Core changes: - It is possible configure groups in debugfs. - Consolidation of chained IRQ handler install/remove replacing all call sites where irq_set_handler_data() and irq_set_chained_handler() were done in succession with a combined call to irq_set_chained_handler_and_data(). This series was created by Thomas Gleixner after the problem was observed by Russell King. - Tglx also made another series of patches switching __irq_set_handler_locked() for irq_set_handler_locked() which is way cleaner. - Tglx also wrote a good bunch of patches to make use of irq_desc_get_xxx() accessors and avoid looking up irq_descs from IRQ numbers. The goal is to get rid of the irq number from the handlers in the IRQ flow which is nice. Driver feature enhancements: - Power management support for the SiRF SoC Atlas 7. - Power down support for the Qualcomm driver. - Intel Cherryview and Baytrail: switch drivers to use raw spinlocks in IRQ handlers to play nice with the realtime patch set. - Rework and new modes handling for Qualcomm SPMI-MPP. - Pinconf power source config for SH PFC. New drivers and subdrivers: - A new driver for Conexant Digicolor CX92755. - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5, ProXtream2 and PH1-LD6b SoC pin control support. - Reverse-egineered the S/PDIF settings for the Allwinner sun4i driver. - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs - A new Freescale i.mx6ul subdriver. Cleanup: - Remove platform data support in a number of SH PFC subdrivers" * tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (95 commits) pinctrl: at91: fix null pointer dereference pinctrl: mediatek: Implement wake handler and suspend resume pinctrl: mediatek: Fix multiple registration issue. pinctrl: sh-pfc: r8a7794: add USB pin groups pinctrl: at91: Use generic irq_{request,release}_resources() pinctrl: cherryview: Use raw_spinlock for locking pinctrl: baytrail: Use raw_spinlock for locking pinctrl: imx6ul: Remove .owner field pinctrl: zynq: Fix typos in smc0_nand_grp and smc0_nor_grp pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocks pinctrl: sun4i: add spdif to pin description. pinctrl: atlas7: clear ugly branch statements for pull and drivestrength pinctrl: baytrail: Serialize all register access pinctrl: baytrail: Drop FSF mailing address pinctrl: rockchip: only enable gpio clock when it setting pinctrl/mediatek: fix spelling mistake in dev_err error message pinctrl: cherryview: Serialize all register access pinctrl: UniPhier: PH1-Pro5: add I2C ch6 pin-mux setting pinctrl: nomadik: reflect current input value ...
2015-08-24pinctrl: sh-pfc: Implement pinconf power-source param for voltage switchingBen Hutchings
The pfc in the R8A7790 (and probably others in the R-Car gen 2 family) supports switching SDHI signals between 3.3V and 1.8V nominal voltage, and the SD driver should do that when switching to and from UHS modes. Add a flag for pins that have configurable I/O voltage and SoC operations to get and set the nominal voltage. Implement the pinconf power-source parameter using these operations. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-11Document: dt: binding: imx: update document for imx6ul supportFrank Li
This part just add necessary change to boot imx6ul. Update clock and pinctrl for imx6ul Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-07-27pinctrl: sunxi: Add custom irq_domain_opsMaxime Ripard
The current interrupt parsing code was working by accident, because the default was actually parsing the first node of interrupts. While that was mostly working (and the flags were actually ignored), this binding has never been documented, and doesn't work with SoCs that have multiple interrupt banks anyway. Add a proper interrupt xlate function, that uses the same description than the GPIOs (<bank> <pin> <flags>), that will make things less confusing. The EINT number will still be used as the hwirq number, but won't be exposed through the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-27pinctrl: dt-binding: document Conexant CX92755 SoCBaruch Siach
Add pinctrl device tree binding documentation for the General Purpose Pin Mapping module of the Conexant CX92755 SoC. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-23pinctrl: nomadik: assure GPIO chips are populatedLinus Walleij
If the pin controller probes before the GPIO driver it needs to populate the GPIO driver state containers ahead of the actual driver probe as the addresses are used by both halves of the driver. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-17pinctrl: qcom: ssbi: Family A gpio & mpp driversBjorn Andersson
This introduces pinctrl drivers for gpio and mpp blocks found in family A PMICs. Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-17pinctrl: qcom: spmi-mpp: Transpose pinmux functionBjorn Andersson
The "function" of the MPP driver was inherited from the GPIO driver, but the differences between the two hardware blocks makes both the driver and the device tree binding to be awkward. Instead of overloading the "normal" function with various modes this patch transposes the pinmux function to represent the three operating modes of the MPP (digital, analog and current sink). The properties of pin pairing and DTEST routing is moved to separate properties. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-17pinctrl: qcom: spmi-mpp: Add support for setting analog output levelBjorn Andersson
When the MPP is configured for analog output the output level is selected by the AOUT_CTL register, this patch makes it possible to control this. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16pinctrl: sh-pfc: Accept standard function, pins and groups propertiesLaurent Pinchart
The "function", "pins" and "groups" pinmux and pinctrl properties have been standardized. Support them in addition to the custom "renesas,*" properties. New-style and old-style properties can't be mixed in DT. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16pinctrl: qcom: spmi-mpp: Implement support for sink modeBjorn Andersson
The MPP supports three modes; digital, analog and sink mode. This patch implements support for the latter. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-01Merge tag 'devicetree-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux Pull devicetree updates from Grant Likely: "A whole lot of bug fixes. Nothing stands out here except the ability to enable CONFIG_OF on every architecture, and an import of a newer version of dtc" * tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux: (22 commits) of/irq: Rename "intc_desc" to "of_intc_desc" to fix OF on sh of/irq: Fix pSeries boot failure Documentation: DT: Fix a typo in the filename "lantiq,<chip>-pinumx.txt" of: define of_find_node_by_phandle for !CONFIG_OF of/address: use atomic allocation in pci_register_io_range() of: Add vendor prefix for Zodiac Inflight Innovations dt/fdt: add empty versions of early_init_dt_*_memory_arch of: clean-up unnecessary libfdt include paths of: make unittest select OF_EARLY_FLATTREE instead of depend on it of: make CONFIG_OF user selectable MIPS: prepare for user enabling of CONFIG_OF of/fdt: fix argument name and add comments of unflatten_dt_node() of: return NUMA_NO_NODE from fallback of_node_to_nid() tps6507x.txt: Remove executable permission of/overlay: Grammar s/an negative/a negative/ of/fdt: Make fdt blob input parameters of unflatten functions const of: add helper function to retrive match data of: Grammar s/property exist/property exists/ of: Move OF flags to be visible even when !CONFIG_OF scripts/dtc: Update to upstream version 9d3649bd3be245c9 ...