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2025-11-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Conflicts: net/xdp/xsk.c 0ebc27a4c67d ("xsk: avoid data corruption on cq descriptor number") 8da7bea7db69 ("xsk: add indirect call for xsk_destruct_skb") 30ed05adca4a ("xsk: use a smaller new lock for shared pool case") https://lore.kernel.org/20251127105450.4a1665ec@canb.auug.org.au https://lore.kernel.org/eb4eee14-7e24-4d1b-b312-e9ea738fefee@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-27spi: dt-bindings: airoha: add compatible for EN7523Mikhail Kshevetskiy
Add dt-bindings documentation of SPI NAND controller for Airoha EN7523 SoC platform. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patch.msgid.link/20251125234047.1101985-3-mikhail.kshevetskiy@iopsys.eu Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-26ASoC: stm32: sai: fix device and OF node leaks onMark Brown
Merge series from Johan Hovold <johan@kernel.org>: This series fixes device and OF node reference leaks during probe and a clock prepare imbalance on probe failures. Included is a related cleanup of an error path.
2025-11-26regulator: Use container_of_const() when all types areMark Brown
Merge series from Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>: Use container_of_const(), which is preferred over container_of(), when the argument 'ptr' and returned pointer are already const, for better code safety and readability. Some drivers already have const everywhere, so container_of_const can be directly used. In few other drivers, the final pointer can be constified that way.
2025-11-26dt-bindings: remoteproc: qcom: adsp: Add SDM660 CDSP compatibleNickolay Goppen
Add compatible for the compute DSP remoteproc found in SDM660. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nickolay Goppen <setotau@mainlining.org> Link: https://lore.kernel.org/r/20251110-qcom-sdm660-cdsp-v3-2-cc3c37287e72@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-26dt-bindings: remoteproc: qcom: adsp: Add missing constrains for SDM660 ADSPNickolay Goppen
Since SDM660 ADSP node uses "xo" clock, interrupts and "cx" power domain properties add corresponding constrains for SDM660 ADSP. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nickolay Goppen <setotau@mainlining.org> Link: https://lore.kernel.org/r/20251110-qcom-sdm660-cdsp-v3-1-cc3c37287e72@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-26dt-bindings: remoteproc: qcom,sc8280xp-pas: Fix CDSP power descKonrad Dybcio
The power requirements for the CDSP instances on SC8280XP aren't fully described, with only one of the three present. Fix that. Fixes: ee651cd1e944 ("dt-bindings: remoteproc: qcom: pas: Add sc8280xp adsp and nsp pair") Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20251104-topic-8280_mxc-v1-2-df545af0ef94@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-26dt-bindings: remoteproc: qcom,adsp: Make msm8974 use CX as power domainLuca Weiss
Using CX as a regulator is an artifact of earlier times. Instead use CX power rail as power domain from rpmpd. Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250621-msm8974-rpmpd-switch-v1-1-0a2cb303c446@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-26dt-bindings: thermal: fsl,imx91-tmu: add bindings for NXP i.MX91 thermal modulePengfei Li
Add bindings documentation for i.MX91 thermal modules. Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251020-imx91tmu-v7-1-48d7d9f25055@nxp.com
2025-11-26dt-bindings: thermal: tsens: Add QCS8300 compatibleGaurav Kohli
Add compatibility string for the thermal sensors on QCS8300 platform. Signed-off-by: Gaurav Kohli <quic_gkohli@quicinc.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Link: https://patch.msgid.link/20250822042316.1762153-2-quic_gkohli@quicinc.com
2025-11-26dt-bindings: slimbus: fix warning from exampleSrinivas Kandagatla
Fix below warnings generated dt_bindings_check for examples in the bindings. Documentation/devicetree/bindings/slimbus/slimbus.example.dtb: slim@28080000 (qcom,slim-ngd-v1.5.0): 'audio-codec@1,0' does not match any of the regexes: '^pinctrl-[0-9]+$', '^slim@[0-9a-f]+$' from schema $id: http://devicetree.org/schemas/slimbus/qcom,slim-ngd.yaml# Documentation/devicetree/bindings/slimbus/slimbus.example.dtb: slim@28080000 (qcom,slim-ngd-v1.5.0): #address-cells: 1 was expected from schema $id: http://devicetree.org/schemas/slimbus/qcom,slim-ngd.yaml# Documentation/devicetree/bindings/slimbus/slimbus.example.dtb: slim@28080000 (qcom,slim-ngd-v1.5.0): 'dmas' is a required property from schema $id: http://devicetree.org/schemas/slimbus/qcom,slim-ngd.yaml# Documentation/devicetree/bindings/slimbus/slimbus.example.dtb: slim@28080000 (qcom,slim-ngd-v1.5.0): 'dma-names' is a required property from schema $id: http://devicetree.org/schemas/slimbus/qcom,slim-ngd.yaml# Fixes: 7cbba32a2d62 ("slimbus: qcom: remove unused qcom controller driver") Cc: stable <stable@kernel.org> Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20251114110505.143105-1-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-11-26spi: dt-bindings: renesas,rzv2h-rspi: Document RZ/V2N SoC supportLad Prabhakar
Document the RSPI controller on the Renesas RZ/V2N SoC. The block is compatible with the RSPI implementation found on the RZ/V2H(P) family. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251126131619.136605-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-26dt-bindings: serial: rsci: Drop "uart-has-rtscts: false"Biju Das
Drop "uart-has-rtscts: false" from binding as the IP supports hardware flow control on all SoCs. Cc: stable@kernel.org Fixes: 25422e8f46c1 ("dt-bindings: serial: Add compatible for Renesas RZ/T2H SoC in sci") Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20251114101350.106699-2-biju.das.jz@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-11-26dt-bindings: serial: 8250: Add Loongson uart compatibleBinbin Zhou
The Loongson family have a mostly NS16550A-compatible UART and High-Speed UART hardware with the exception of custom frequency divider latch settings register. Co-developed-by: Haowei Zheng <zhenghaowei@loongson.cn> Signed-off-by: Haowei Zheng <zhenghaowei@loongson.cn> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Link: https://patch.msgid.link/2d858e9303d95a3e4909aa9c1379d4abbdc52cc2.1760166651.git.zhoubinbin@loongson.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-11-26dt-bindings: can: mpfs: document resetsConor Dooley
The CAN cores on Polarfire SoC both have a reset. The platform firmware brings both cores out of reset, but the linux driver must use them during normal operation. The resets should have been made required, but this is one of the things that can happen when the binding is written without driver support. Fixes: c878d518d7b6 ("dt-bindings: can: mpfs: document the mpfs CAN controller") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251121-sample-footsore-743d81772efc@spud Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2025-11-26dt-bindings: timer: Add Realtek SYSTIMERHao-Wen Ting
The Realtek SYSTIMER (System Timer) is a 64-bit global hardware counter operating at a fixed 1MHz frequency. Thanks to its compare match interrupt capability, the timer natively supports oneshot mode for tick broadcast functionality. Signed-off-by: Hao-Wen Ting <haowen.ting@realtek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://patch.msgid.link/20251126060110.198330-2-haowen.ting@realtek.com
2025-11-26dt-bindings: arm: amlogic: add support for Tanix TX9 ProChristian Hewitt
The Oranth Tanix TX9 Pro is an Android STB using the Amlogic S912 chip Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250927125006.824293-1-christianshewitt@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-11-25dt-bindings: riscv: starfive: add xunlong,orangepi-rvIcenowy Zheng
Add "xunlong,orangepi-rv" as a StarFive JH7110 SoC-based board. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Signed-off-by: E Shattow <e@freeshell.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-11-25dt-bindings: riscv: Add StarFive JH7110S SoC and VisionFive 2 Lite boardHal Feng
Add device tree bindings for the StarFive JH7110S SoC and the VisionFive 2 Lite board equipped with it. JH7110S SoC is an industrial SoC which can run at -40~85 degrees centigrade and up to 1.25GHz. Its CPU cores and peripherals are the same as those of the JH7110 SoC. VisionFive 2 Lite boards have MicroSD card version (default) and eMMC version, which are called "VisionFive 2 Lite" and "VisionFive 2 Lite eMMC" respectively. Acked-by: Rob Herring (Arm) <robh@kernel.org> Tested-by: Matthias Brugger <mbrugger@suse.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-11-25dt-bindings: thermal: qcom-tsens: make ipq5018 tsens standalone compatibleGeorge Moussalem
The tsens IP found in the IPQ5018 SoC should not use qcom,tsens-v1 as fallback since it has no RPM and, as such, must deviate from the standard v1 init routine as this version of tsens needs to be explicitly reset and enabled in the driver. So let's make qcom,ipq5018-tsens a standalone compatible in the bindings. Fixes: 77c6d28192ef ("dt-bindings: thermal: qcom-tsens: Add ipq5018 compatible") Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://patch.msgid.link/20250818-ipq5018-tsens-fix-v1-1-0f08cf09182d@outlook.com
2025-11-25Merge tag 'mtk-soc-for-v6.19' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers MediaTek soc driver updates This adds socinfo entries for MT8189 Kompanio 540, an extra entry for a variant of MT8391 (AV/AZA) Genio 720 SoC, and support for the PMIC Wrapper (by adding a compatible string) in MT8189. * tag 'mtk-soc-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: dt-bindings: soc: mediatek: pwrap: Add compatible for MT8189 SoC soc: mediatek: mtk-socinfo: Add entry for MT8391AV/AZA Genio 720 soc: mediatek: mtk-socinfo: Add extra entry for MT8189 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-11-25Merge tag 'reset-for-v6.19' of https://git.pengutronix.de/git/pza/linux into ↵Arnd Bergmann
soc/drivers Reset controller updates for v6.19 * Add support for LAN969x, eic770 and RZ/G3S reset controllers, for the RZ/G3S USB-PHY reset controller, and for the remaining TH1520 reset controllers. * Drop legacy reset control lookup code. * Include linux/bits.h from linux/reset.h to make it self-contained. * tag 'reset-for-v6.19' of https://git.pengutronix.de/git/pza/linux: Documentation: reset: Remove reset_controller_add_lookup() reset: fix BIT macro reference reset: rzg2l-usbphy-ctrl: Fix a NULL vs IS_ERR() bug in probe reset: th1520: Support reset controllers in more subsystems reset: th1520: Prepare for supporting multiple controllers dt-bindings: reset: thead,th1520-reset: Add controllers for more subsys dt-bindings: reset: thead,th1520-reset: Remove non-VO-subsystem resets reset: remove legacy reset lookup code clk: davinci: psc: drop unused reset lookup reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC reset: rzg2l-usbphy-ctrl: Add support for USB PWRRDY dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support reset: eswin: Add eic7700 reset driver dt-bindings: reset: eswin: Documentation for eic7700 SoC reset: sparx5: add LAN969x support dt-bindings: reset: microchip: Add LAN969x support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-11-25Merge tag 'stm32-bus-firewall-for-v6.19-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/drivers STM32 Firewall bus for v6.19, round 1 Highlights: ---------- The STM32MP21x platforms have a slightly different RIFSC. Add support for these platforms. Also, the RIF is a complex firewall framework which can be tricky to debug. To facilitate the latter, add a debugfs entry that can be used to display the whole RIFSC firewall configuration at runtime. * tag 'stm32-bus-firewall-for-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: bus: rifsc: add debugfs entry to dump the firewall configuration dt-bindings: bus: add stm32mp21 RIFSC compatible Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-11-25Merge tag 'qcom-drivers-for-6.19' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.19 Support for hardware-keymanager v1 support for wrapped keys is introduce in the ICE driver. Support for the new Kaanapali mobile platform is added to last-level cache controller, pd-mapper, and UBWC drivers. UBWC driver gains support for the Monaco and Glymur platforms. The PMIC GLINK driver is extended to handle the differences found in targets where the related firmware runs on the SoCCP. Support for running on targets without initialized SMEM is provided, by reworking the SMEM driver to differentiate between "not yet probed" and "probed but there was no SMEM". An unwanted WARN_ON() that triggered if clients asked for a SMEM item beyond the currently running system's limit, was removed, to allow new use cases to gracefully fail on old targets. The Qualcomm socinfo driver is extended with support for version 20 through 23 and support for providing version information about more than 32 remote processors. Identifiers for QCS6490 and SM8850 are also added. Additionally, a number of smaller bug fixes and cleanups in PBS, OCMEM, GSBI, TZMEM, and MDT-loader are included. * tag 'qcom-drivers-for-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (31 commits) soc: qcom: mdt_loader: rename 'firmware' parameter of qcom_mdt_load() soc: qcom: mdt_loader: merge __qcom_mdt_load() and qcom_mdt_load_no_init() soc: qcom: socinfo: Add reserve field to support future extension soc: qcom: socinfo: Add support for new fields in revision 20 dt-bindings: firmware: qcom,scm: Document SCM on Kaanapali SOC soc: qcom: socinfo: add support to extract more than 32 image versions soc: qcom: smem: drop the WARN_ON() on SMEM item validation soc: qcom: ubwc: Add config for Kaanapali soc: qcom: socinfo: Add SoC ID for QCS6490 dt-bindings: arm: qcom,ids: Add SoC ID for QCS6490 soc: qcom: ice: Add HWKM v1 support for wrapped keys soc: qcom: smem: better track SMEM uninitialized state err.h: add INIT_ERR_PTR() macro soc: qcom: smem: fix hwspinlock resource leak in probe error paths dt-bindings: soc: qcom,aoss-qmp: Document the Glymur AOSS side channel dt-bindings: soc: qcom,aoss-qmp: Document the Kaanapali AOSS channel soc: qcom: ubwc: Add QCS8300 UBWC cfg dt-bindings: firmware: qcom,scm: Document Glymur scm soc: qcom: socinfo: Add SM8850 SoC ID dt-bindings: arm: qcom,ids: Add SoC ID for SM8850 ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-11-25dt-bindings: leds: backlight: Add Awinic AW99706 backlightJunjie Cao
Add Awinic AW99706 backlight binding documentation. Signed-off-by: Junjie Cao <caojunjie650@gmail.com> Reviewed-by: Daniel Thompson (RISCstar) <danielt@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251109032240.3422503-2-caojunjie650@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-25dt-bindings: net: aspeed: add AST2700 MDIO compatibleJacky Chou
Add "aspeed,ast2700-mdio" compatible to the binding schema with a fallback to "aspeed,ast2600-mdio". Although the MDIO controller on AST2700 is functionally the same as the one on AST2600, it's good practice to add a SoC-specific compatible for new silicon. This allows future driver updates to handle any 2700-specific integration issues without requiring devicetree changes or complex runtime detection logic. For now, the driver continues to bind via the existing "aspeed,ast2600-mdio" compatible, so no driver changes are needed. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com> Link: https://patch.msgid.link/20251120-aspeed_mdio_ast2700-v2-1-0d722bfb2c54@aspeedtech.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-11-25Merge tag 'v6.19-rockchip-dts64-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New boards: QNAP TS233 (2-bay variant of the RK3568 NAS series) and Asus Tinkerboard 3 + 3S. Additional peripherals enabled on 100ASK DshanPi A1, Orange Pi 3B, Indiedroid Nova, QNAP-TSx33 series + LED states on Radxa boards, power-domains for the previously added RK3368 display components. * tag 'v6.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits) arm64: dts: rockchip: enable RTC for 100ASK DshanPi A1 arm64: dts: rockchip: enable USB for 100ASK DshanPi A1 arm64: dts: rockchip: enable button for 100ASK DshanPi A1 arm64: dts: rockchip: add mmc aliases for 100ASK DshanPi A1 arm64: dts: rockchip: remove mmc max-frequency for 100ASK DshanPi A1 arm64: dts: rockchip: Enable i2c2 on Orange Pi 3B arm64: dts: rockchip: Use default-state for power LED for Radxa boards arm64: dts: rockchip: fix PCIe 3.3V regulator voltage on 9Tripod X3568 v4 arm64: dts: rockchip: Add power-domain to RK3368 VOP controller arm64: dts: rockchip: Add power-domain to RK3368 DSI controller arm64: dts: rockchip: Add host wake pin for wifi on Indiedroid Nova arm64: dts: rockchip: Correct pinctrl for pcie for Indiedroid Nova arm64: dts: rockchip: Define regulator for pcie2x1l2 on Indiedroid Nova arm64: dts: rockchip: Add clk32k_in for Indiedroid Nova arm64: dts: rockchip: Add Asus Tinker Board 3 and 3S device tree dt-bindings: arm: rockchip: Add Asus Tinker Board 3/3S dt-bindings: arm: rockchip: merge Asus Tinker and Tinker S arm64: dts: rockchip: add QNAP TS233 devicetree dt-bindings: arm: rockchip: add TS233 to RK3568-based QNAP NAS devices arm64: dts: rockchip: move common qnap tsx33 parts to dtsi ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-11-25dt-bindings: PCI: Add Renesas RZ/G3S PCIe controller bindingClaudiu Beznea
The PCIe IP available on the Renesas RZ/G3S complies with the PCI Express Base Specification 4.0. It is designed for root complex applications and features a single-lane (x1) implementation. Add binding documentation for it. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251119143523.977085-2-claudiu.beznea.uj@bp.renesas.com
2025-11-24dt-bindings: riscv: Add Svrsw60t59b extension descriptionChunyan Zhang
Add description for the Svrsw60t59b extension (PTE Reserved for SW bits 60:59) extension which was ratified recently in riscv-non-isa/riscv-iommu. Link: https://lkml.kernel.org/r/20251113072806.795029-7-zhangchunyan@iscas.ac.cn Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Chunyan Zhang <zhangchunyan@iscas.ac.cn> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexandre Ghiti <alex@ghiti.fr> Cc: Alexandre Ghiti <alexghiti@rivosinc.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Andrew Jones <ajones@ventanamicro.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Axel Rasmussen <axelrasmussen@google.com> Cc: Christian Brauner <brauner@kernel.org> Cc: Conor Dooley <conor@kernel.org> Cc: David Hildenbrand <david@redhat.com> Cc: Deepak Gupta <debug@rivosinc.com> Cc: Jan Kara <jack@suse.cz> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Lorenzo Stoakes <lorenzo.stoakes@oracle.com> Cc: Michal Hocko <mhocko@suse.com> Cc: Mike Rapoport <rppt@kernel.org> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Peter Xu <peterx@redhat.com> Cc: Rob Herring <robh@kernel.org> Cc: Suren Baghdasaryan <surenb@google.com> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: Yuanchu Xie <yuanchu@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-11-24Add RSPI support for RZ/T2H and RZ/N2HMark Brown
Merge series from Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>: Add support for RZ/T2H and RZ/N2H.
2025-11-24dt-bindings: nvmem: imx-ocotp: Add support for i.MX94Alice Guo
Add the compatible string "fsl,imx94-ocotp" to the imx-ocotp device tree binding documentation to support the i.MX94. Signed-off-by: Alice Guo <alice.guo@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20251114110636.143268-8-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-11-24dt-bindings: nvmem: don't check node namesWolfram Sang
Node names are already and properly checked by the core schema. No need to do it again. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20251114110636.143268-7-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-11-24dt-bindings: nvmem: mediatek: efuse: Add compatible for MT8189 SoCLouis-Alexis Eyraud
Add compatible string for the eFuse layout on MT8189 SoC, that is compatible with MT8186. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20251114110636.143268-6-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-11-24nvmem: layouts: u-boot-env: add optional "env-size" propertyJascha Sundaresan
Some devices reserve a larger NVMEM region for the U-Boot environment than the actual environment data length used by U-Boot itself. The CRC32 in the U-Boot header is calculated over the smaller data length, causing CRC validation to fail when Linux reads the full partition. Allow an optional device tree property "env-size" to specify the environment data size to use for CRC computation. v2: add missing $ref line to DT binding Signed-off-by: Jascha Sundaresan <flizarthanon@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20251114110636.143268-5-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-11-24dt-bindings: nvmem: Support MediaTek MT8189 evb board efuseJack Hsu
add compatible string for mt8189 evb board dts node of efuse Signed-off-by: Jack Hsu <jh.hsu@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20251114110636.143268-3-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-11-24dt-bindings: nvmem: qfprom: Add sa8775p compatibleAkhil P Oommen
Document compatible string for the QFPROM on Lemans platform. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20251114110636.143268-2-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-11-24dt-bindings: iommu: qcom_iommu: Allow 'tbu' clockKonrad Dybcio
Some IOMMUs on some platforms (there doesn't seem to be a good denominator for this) require the presence of a third clock, specifically relating to the instance's Translation Buffer Unit (TBU). Stephan Gerhold noted [1] that according to Qualcomm Snapdragon 410E Processor (APQ8016E) Technical Reference Manual, SMMU chapter, section "8.8.3.1.2 Clock gating", which reads: For APPS TCU/TBU (TBU to TCU interface is asynchronous) Software should turn ON clock to APPS TCU - During APPS TCU register programming sequence For GPU TCU/TBU (TBU to TCU interface is synchronous) Software should turn ON clock to GPU TBU - During GPU TLB invalidation sequence <===================== Software should turn ON clock to GPU TCU - During GPU TCU register programming sequence - While GPU master clock is Active The clock should be turned on at least during TLB invalidation on the GPU SMMU instance. This is corroborated by Commit 5bc1cf1466f6 ("iommu/qcom: add optional 'tbu' clock for TLB invalidate"). This is also not to be confused with qcom,sdm845-tbu, which is a description of a debug interface, absent on the generation of hardware that this binding describes. Allow this clock. [1] https://lore.kernel.org/linux-arm-msm/aPX_cKtial56AgvU@linaro.org/ Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
2025-11-24dt-bindings: display: bridge: simple: document the ASL CS5263 DP-to-HDMI bridgeEttore Chimenti
The ASL CS5263 is a high-performance DP1.4 to HDMI2.0b converter, designed to connect a DP1.4 source to an HDMI2.0b sink. The CS5263AN integrates a DP1.4 compliant receiver, and a HDMI2.0b compliant transmitter. Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org> Signed-off-by: Georg Gottleuber <ggo@tuxedocomputers.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20251121142623.251118-3-ggo@tuxedocomputers.com
2025-11-24dt-bindings: vendor-prefixes: Add ASL Xiamen TechnologyEttore Chimenti
ASL Xiamen Technology Co. Ltd. is a Chinese high-speed interface and display system chip design company. Adding it to the vendor prefixes. Link: https://www.asl-tek.com/ Signed-off-by: Ettore Chimenti <ettore.chimenti@linaro.org> Signed-off-by: Georg Gottleuber <ggo@tuxedocomputers.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20251121142623.251118-2-ggo@tuxedocomputers.com
2025-11-24Merge tag 'icc-6.19-rc1' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 6.19 This pull request contains the interconnect changes for the 6.19-rc1 merge window. The core and driver changes are listed below. Core changes: - kbps_to_icc() macro optimization Driver changes: - Switch all Qualcomm RPMh interconnect drivers to use the dynamic node IDs and drop support for non-dynamic ID allocation - Add new driver and BWMON support for the Kaanapali SoC - Add QoS support for the SM6350 SoC - Add QoS support for the SA8775p SoC - Fix missing link from SNOC_PNOC to the USB 2 on MSM8996 SoC that includes also a dts change that has been acked by the maintainer - Drop the QPIC interconnect and BCM nodes for the SDX75 SoC, as these should be handled by the rpmh-clk driver - Other misc fixes Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.19-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc: (40 commits) interconnect: qcom: sm6350: enable QoS configuration interconnect: qcom: sm6350: Remove empty BCM arrays interconnect: qcom: icc-rpmh: Get parent's regmap for nested NoCs dt-bindings: interconnect: qcom,sm6350-rpmh: Add clocks for QoS dt-bindings: interconnect: qcom-bwmon: Document Kaanapali BWMONs interconnect: qcom: icc-rpmh: drop support for non-dynamic IDS interconnect: qcom: sm8750: convert to dynamic IDs interconnect: qcom: sm8650: convert to dynamic IDs interconnect: qcom: sm8550: convert to dynamic IDs interconnect: qcom: sm8450: convert to dynamic IDs interconnect: qcom: sm8350: convert to dynamic IDs interconnect: qcom: sm8150: convert to dynamic IDs interconnect: qcom: sm7150: convert to dynamic IDs interconnect: qcom: sm6350: convert to dynamic IDs interconnect: qcom: sdx75: convert to dynamic IDs interconnect: qcom: sdx65: convert to dynamic IDs interconnect: qcom: sdx55: convert to dynamic IDs interconnect: qcom: sdm670: convert to dynamic IDs interconnect: qcom: sc7180: convert to dynamic IDs interconnect: qcom: sar2130p: convert to dynamic IDs ...
2025-11-24Merge tag 'coresight-next-v6.19' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next Suzuki writes: coresight: Updates for Linux v6.19 The changes for Linux v6.19 include : - Support for static TPDM - Fixes to TMC-ETR with CATU where buffer wasn't available to CATU in perf mode - Clean ups to the component operations to accept coresight_path - Fixes to the ETM4x/ETM3x driver Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> * tag 'coresight-next-v6.19' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux: coresight: etm4x: Remove the state_needs_restore flag coresight: etm4x: Remove the redundant DSB coresight: etm4x: Properly control filter in CPU idle with FEAT_TRF coresight: etm4x: Add context synchronization before enabling trace coresight: etm4x: Correct polling IDLE bit coresight: etm3x: Always set tracer's device mode on target CPU coresight: etm4x: Always set tracer's device mode on target CPU coresight: Change device mode to atomic type coresight: change the sink_ops to accept coresight_path coresight: change helper_ops to accept coresight_path coresight: tmc: add the handle of the event to the path coresight: tpdm: remove redundant check for drvdata coresight: tpdm: add static tpdm support dt-bindings: arm: document the static TPDM compatible coresight: ETR: Fix ETR buffer use-after-free issue
2025-11-24dt-bindings: perf: fsl-imx-ddr: Add compatible string for i.MX8QM, i.MX8QXP ↵Frank Li
and i.MX8DXL Add compatible string fsl,imx8qm-ddr-pmu, fsl,imx8qxp-ddr-pmu, which fallback to fsl,imx8-ddr-pmu and fsl,imx8dxl-db-pmu (for data bus fabric). Add clocks, clock-names for fsl,imx8dxl-db-pmu and keep the same restriction for existing compatible strings. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Will Deacon <will@kernel.org>
2025-11-24spi: dt-bindings: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2HCosmin Tanislav
The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have four SPI peripherals. Compared to the previously supported RZ/V2H, these SoCs have a smaller FIFO, no resets, and only two clocks: PCLKSPIn and PCLK. PCLKSPIn, being the clock from which the SPI transfer clock is generated, is the equivalent of the TCLK from V2H. Document them, and use RZ/T2H as a fallback for RZ/N2H as the SPIs are entirely compatible. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251119161434.595677-11-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-24dt-bindings: net: wireless: mt76: introduce backoff limit propertiesSven Eckelmann (Plasma Cloud)
Introduce path backoff limit properties in mt76 binding in order to specify beamforming and non-beamforming backoff limits for 802.11n/ac/ax. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Sven Eckelmann (Plasma Cloud) <se@simonwunderlich.de> Link: https://patch.msgid.link/20251007-backoff-table-support-v3-2-fd6e2684988f@simonwunderlich.de Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-11-24dt-bindings: net: wireless: mt76: Document power-limits country propertySven Eckelmann (Plasma Cloud)
The commit 22b980badc0f ("mt76: add functions for parsing rate power limits from DT") added filtering of the power limits based on two properties: * regdomain * country If either the country or the regdomain matches, the power limits are applied and the search is aborted. If none of the two is defined for the power limit, it is a global (or "fallback") power limit. The last "fallback" power limit in the list will be returned when not matching regdomain or country was found. The idea is here to allow to specify "overwriting" country limits in front of the list - just in case a regdomain is shared but a country has additional limitations. But this property was forgotten to be defined in commit 2de6ccebe0e7 ("dt-bindings:net:wireless:mediatek,mt76: introduce power-limits node"). Signed-off-by: Sven Eckelmann (Plasma Cloud) <se@simonwunderlich.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251007-backoff-table-support-v3-1-fd6e2684988f@simonwunderlich.de Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-11-23dt-bindings: clock: rockchip: Add RK3506 clock and reset unitFinley Xiao
Add device tree bindings for clock and reset unit on RK3506 SoC. Add clock and reset IDs for RK3506 SoC. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251121075350.2564860-2-zhangqing@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-11-21Merge tag 'imx-bindings-6.19' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX dt-bindings update for 6.19: - New board support: Protonic PRT8ML, Toradex SMARC iMX95, Skov Rev.C HDMI, i.MX 95 Verdin Evaluation KitPHYTEC phyBOARD-Segin-i.MX91 board, Skov i.MX8MP variant - One imx-iomuxc-gpr update from Fabio Estevam to document CSI mux - A couple of fpga-qixis bindings updates from Ioana Ciornei - One embedded-controller update from Mathew McBride to add Traverse Ten64 board controller * tag 'imx-bindings-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: fsl: add Toradex SMARC iMX95 dt-bindings: arm: fsl: add Skov Rev.C HDMI support dt-bindings: arm: fsl: Add PHYTEC phyBOARD-Segin-i.MX91 board dt-bindings: fsl,fpga-qixis: describe the gpio child node found on LS1046AQDS dt-bindings: fsl,fpga-qixis-i2c: add support for LX2160ARDB FPGA dt-bindings: arm: fsl: Add Protonic PRT8ML dt-bindings: arm: imx: document i.MX 95 Verdin Evaluation Kit (EVK) dt-bindings: embedded-controller: add Traverse Ten64 board controller dt-bindings: soc: imx-iomuxc-gpr: Document the CSI mux dt-bindings: arm: fsl: add compatible for Skov i.MX8MP variant Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-11-21Merge tag 'anlogic-initial-6.19-v2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/newsoc Initial Anlogic Platform Support Add bindings for the serial and timer peripherals, and a basic soc dtsi for the Anlogic dr1v90 SoC. The Milianke MLKPAI FS01 is the first board for this SoC. Add myself as maintainer for this platform for the time being. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'anlogic-initial-6.19-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: MAINTAINERS: Setup support for Anlogic tree riscv: defconfig: Enable Anlogic SoC riscv: dts: anlogic: Add Milianke MLKPAI FS01 board riscv: dts: Add initial Anlogic DR1V90 SoC device tree riscv: Add Anlogic SoC famly Kconfig support dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER dt-bindings: riscv: Add Anlogic DR1V90 dt-bindings: riscv: Add Nuclei UX900 compatibles dt-bindings: vendor-prefixes: Add Anlogic, Milianke and Nuclei
2025-11-21Merge branch 'bst/newsoc' into soc/newsocArnd Bergmann
This patch series introduces platform support for Black Sesame Technologies (BST) C1200 SoC and CDCU1.0 ADAS 4C2G board. BST is a leading automotive-grade computing SoC provider focusing on intelligent driving, computer vision, and AI capabilities for ADAS and autonomous driving applications. You can find more information about the SoC and related boards at: https://bst.ai This series provides the foundational platform enablement including device tree bindings, SoC and board device trees, platform configuration, and maintainer information. MMC/SDHCI driver support will be submitted in a separate patch series. * bst/newsoc: MAINTAINERS: add Black Sesame Technologies (BST) ARM SoC support arm64: defconfig: enable BST platform support arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs dt-bindings: arm: add Black Sesame Technologies (bst) SoC dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd. Link: https://lore.kernel.org/all/20251016120558.2390960-1-yangzh0906@thundersoft.com/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-11-21dt-bindings: arm: add Black Sesame Technologies (bst) SoCAlbert Yang
Add device tree bindings for Black Sesame Technologies Arm SoC, it consists several SoC models like C1200, etc. Signed-off-by: Albert Yang <yangzh0906@thundersoft.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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