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Add the documentation for the peripheral clocks required by iMX8QM SATA
to access the HSIO MIX regions.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Documentation of device-tree entry describing messaging
unit (MU) used to communicate with SECO core on i.MX8.
Signed-off-by: Stephane Dion <stephane.dion_1@nxp.com>
(cherry picked from commit 238c7e4dab3b500c61b7def62dcd940b9c103658)
(cherry picked from commit 610cf8e7345367e980ad694343af2d5d73a60cef)
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Add new pmic pca9450 driver for i.mx8mn-evk board.
Signed-off-by: John Lee <john.lee@nxp.com>
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
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commit 5f3e2bf008c2221478101ee72f5cb4654b9fc363 upstream.
Some TCP peers announce a very small MSS option in their SYN and/or
SYN/ACK messages.
This forces the stack to send packets with a very high network/cpu
overhead.
Linux has enforced a minimal value of 48. Since this value includes
the size of TCP options, and that the options can consume up to 40
bytes, this means that each segment can include only 8 bytes of payload.
In some cases, it can be useful to increase the minimal value
to a saner value.
We still let the default to 48 (TCP_MIN_SND_MSS), for compatibility
reasons.
Note that TCP_MAXSEG socket option enforces a minimal value
of (TCP_MIN_MSS). David Miller increased this minimal value
in commit c39508d6f118 ("tcp: Make TCP_MAXSEG minimum more correct.")
from 64 to 88.
We might in the future merge TCP_MIN_SND_MSS and TCP_MIN_MSS.
CVE-2019-11479 -- tcp mss hardcoded to 48
Signed-off-by: Eric Dumazet <edumazet@google.com>
Suggested-by: Jonathan Looney <jtl@netflix.com>
Acked-by: Neal Cardwell <ncardwell@google.com>
Cc: Yuchung Cheng <ycheng@google.com>
Cc: Tyler Hicks <tyhicks@canonical.com>
Cc: Bruce Curtis <brucec@netflix.com>
Cc: Jonathan Lemon <jonathan.lemon@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit cd6f35b8421ff20365ff711c0ac7647fd70e9af7)
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The rpmsg i2s audio is supported with codec wm8524 in imx8mn
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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Add power domains for each dma channel so that edma channel could
know the power state of every dma channel anytime and clear easily
unexpected interrupt which triggered before the last partition reset.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: S.j. Wang <shengjiu.wang@nxp.com>
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This is an reset driver to implement a reset controller
device DISPMIX on IMX8MM and IMX8MN platforms. Dispmix
reset is used to reset or enable related buses and clks
for the submodules in DISPMIX.
All the dispmix resets are divided into three subgroups:
sft_rstn, clk_en and mipi_rst, and each of them contains
several reset lines to control several different modules
on and off in DISPMIX which doesn't require the standard
reset flow, but only line assert and deassert operations.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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EASRC (Enhanced ASRC) is a new IP module found on i.MX8 MN. It is
different from old ASRC module.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
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i.MX8MM contains USDHC which support eMMC V5.1 (including CMDQ and
HS400ES), besides i.MX8MM also support bus frequency, so add a new
esdhc_soc_data for i.MX8MM.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
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Add a compatible string which includes 'imx8mn' for both
LCDIF and DSIM drivers.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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The added format is V4L2_PIX_FMT_YUV24, this is a packed
YUV 4:4:4 format, with 8 bits for each component, 24 bits
per sample.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
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The code sample is waiting for an async. crypto op completion.
Adapt sample to use the new generic infrastructure to do the same.
This also fixes a possible data coruption bug created by the
use of wait_for_completion_interruptible() without dealing
correctly with an interrupt aborting the wait prior to the
async op finishing.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit aba973c69e3658e3190d8983eed7dddd3c44dd1e)
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Add binding documentation for TI's HyperBus memory controller present on
AM654 SoC.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Add DT binding documentation for HyperFlash devices.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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It is an experimental feature, and tested by internal team for
Carplay feature.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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Add a new property 'pref-rate' support which can be used to
assign a different clock frequency for the DPHY PLL reference
clock in the dtb file. And if this property does not exist,
the default clock frequency for the reference clock will be
used. And according to the spec, the DPHY PLL reference clk
frequency should be in [6MHz, 300MHz] range.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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Add virtual i2c driver to send SRTM i2c messages to M4.
Each virtual I2C bus has a specal bus id, which is abstracted by M4.
Each SRTM message include a bus id for the bus which the device is on.
Virtual i2c rpmsg bus will bind rpbus nodes with compatible string
"fsl,i2c-rpbus". And "rpmsg-i2c-channel" will probe only one rpmsg
channel for all rpbuses.
This virtual i2c driver depends on CONFIG_I2C and CONFIG_RPMSG.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
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Added content_type property to drm_connector_state
in order to properly handle external HDMI TV content-type setting.
v2:
* Moved helper function which attaches content type property
to the drm core, as was suggested.
Removed redundant connector state initialization.
v3:
* Removed caps in drm_content_type_enum_list.
After some discussion it turned out that HDMI Spec 1.4
was wrongly assuming that IT Content(itc) bit doesn't affect
Content type states, however itc bit needs to be manupulated
as well. In order to not expose additional property for itc,
for sake of simplicity it was decided to bind those together
in same "content type" property.
v4:
* Added it_content checking in intel_digital_connector_atomic_check.
Fixed documentation for new content type enum.
v5:
* Moved patch revision's description to commit messages.
v6:
* Minor naming fix for the content type enumeration string.
v7:
* Fix parameter name for documentation and parameter alignment
in order not to get warning. Added Content Type description to
new HDMI connector properties section.
v8:
* Thrown away unneeded numbers from HDMI content-type property
description. Switch to strings desription instead of plain
definitions.
v9:
* Moved away hdmi specific content-type enum from
drm_connector_state. Content type property should probably not
be bound to any specific connector interface in
drm_connector_state.
Same probably should be done to hdmi_picture_aspect_ration enum
which is also contained in drm_connector_state. Added special
helper function to get derive hdmi specific relevant infoframe
fields.
v10:
* Added usage description to HDMI properties kernel doc.
v11:
* Created centralized function for filling HDMI AVI infoframe, based
on correspondent DRM property value.
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180515135928.31092-2-stanislav.lisovskiy@intel.com
[vsyrjala: clean up checkpatch multiple blank lines warnings]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Implement mode_valid and check functions from
drm_simple_display_pipe_funcs such that we can filter-out modes that
cannot be driven by this controller.
Add 3 new clocks:
- video_pll: this is the PLL that provides the pixel clock; it's rate
needs to be set such that the pixel clock can be achieved
- osc_25: this is an oscillater that can be used as source clock for the
video_pll; default freq is 25MHz
- osc_27: same as above, but with freq of 27MHz
Depending on the display mode used, the video_pll needs to have it's
clock source a 25MHz or 27MHz oscillator. Also, the video_pll rate needs
to be set to a rate that can be evenly divided to obtain the required
pixel clock. All these settings (clock source and video_pll rate) are
saved in mode_valid, then applied before mode needs to be set in the
check function.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
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Add new partition reset interrupt group to know M4 reset and restore
back at rpmsg level later.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
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The description of dmas pointed to the common description of dma,
and the introduction of dmas was unclear. Add a doc link to sdma
introduction.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
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In order to support 44kHz and 48kHz sample rate together, we need to
reconfigure the parent clock of mclk.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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Add "fsl,imx8mm-usb" compatible string.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
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Some platforms may want to use USB PHY charger detection function
when VBUS is there, add one flag for it. The user can enable it
at firmware.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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This is an adapter card made for the 4.3", 800x480, LCD panel Seiko
43WVFIG. The LCD panel is a 24bit DPI bus, while the adapter card has
two ports: 18-bit and 24-bit data input. For the 18-bit data input, the
adapter card is demuxing some of the data lines, in order to feed all of
the 24 lines needed by the LCD.
This driver handles both this use-cases.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Add driver for Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480)
TFT with Touch-Panel.
Datasheet available at:
http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf
Seiko 43WVF1G panel has two power supplies: avdd and dvdd and they
require a specific power on/down sequence.
For this reason the simple panel driver cannot be used to drive this
panel, so create a new one heavily based on simple panel.
Based on initial patch submission from Breno Lima.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1500567179-6967-1-git-send-email-marco.franchi@nxp.com
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This patch is to add CAN wakeup function on MX8 platforms and update the
binding file fsl-flexcan.txt.
For MX8, the function "flexcan_irq()" should not call "flexcan_exit_stop_mode()"
due to firmware(SCU) cannot make SC IPC calls from an interrupt context.
If not exit stop mode in ISR, it will continuously enter wakeup ISR for the reason
that system will respond IRQ before call CAN system resume.
To fix the issue, we can exit stop mode during noirq resume stage.
For wakeup case, it should not set pinctrl to sleep state by
pinctrl_pm_select_sleep_state.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
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Add xen,i2c bindings
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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FLEXCAN has supported selecting the clock source to the CAN Protocol Engine (PE).
It's SoC Implementation dependent. Refer to RM for detailed definition of each SoC.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
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tree
Normally CAN FD capable device must work on FD mode as it has different
statically claimed bittiming capability.
This patch provides users to disable CAN FD capability if users want
to only work at normal mode.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
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Add "spi-slave" attribute for recognizing slave mode.
If it is not in slave mode, please delete this attribute.
Usage can be found at spi-fsl-lpspi.txt.
Modify "Makefile" to build "imx7ulp-evk-spi-slave.dtb".
Signed-off-by: Xiaoning Wang <xiaoning.wang@nxp.com>
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On imx8qm mek, the cs42888 is connected with i2c in cm41 domain,
but wm8960 is connected with i2c1, which is not in m4 domain.
So we only need to eable rpmsg for cs42888.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 9d2368aef40e4d107e4deee1a2c7e191c1afe644)
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According to AK5558 MCLK frequence must not exceed 36.864 MHz.
Limit maximum supported rate as function of max MCLK frequency,
sample bits and number of slots.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 236796cad225daa39d5b77d763a1d964dd4de4c9)
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Pixel combiner found in i.MX8 SoCs may combine two display
streams(one master and the other slave) to drive a high
pixel rate display. This patch adds DT property descriptions
in imx-drm DT documentation for pixel combiner.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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Add two parameters which are used to tune USB signal for picophy,
picophy is used at imx7d and imx845.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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The existing implementation calculates mclk rate as function
of audio sample rate multiplied to multiplier taken from Table 5.
However this is not accurate for Manual Setting Mode - tables 3 & 4 from
AK4458 RM defines rate (LRCK/FS) and frame width (MCLK/16fs..1152fs) ranges
as parameters to calculate mclk frequency. Aside of this - adjust
bclk:mclk ratio from machine driver as function of "compatible" id.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 527b8b7032dcb75c14bb2790330ab96743d83b16)
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Add output IOs defalut voltage set in device tree by add property like:
out-default = /bits/ 16 <mask val>;
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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support more codecs, codec is specified by compatible string
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 7c92a75fcf83ec0aa3fe6773e4cb5f5e88a1ff09)
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Add two new message command I2S_TX_POINTER and I2S_RX_POINTER,
which are used to get the hw pointer in m4 side. For in low
power audio mode, m4 won't send notification every period, the
notification only be sent when hw pointer reach end of buffer,
so we need these command to get the position of hw pointer,
user can use it to calculate the timestamp.
Restructure send message and recv message together for i2s_rpmsg,
that every send message has a recv message. so the
i2s_send_message can store the recv message indepedently. one
reason is that the receive message is async withe send message.
The low power audio is disabled in default, user need to enabled
it by add "fsl,enable-lpa" in dts.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 753e7b819609ad4791e32069a124d4411c720947)
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i.MX8QM/i.MX8QXP has pad type/definition change on B0, update
binding doc accordingly.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit fd1e1f035e7cd2b0fd74549ba16172b5a10779cf)
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Using new "fsl,tx-d-cal" for dts, and update document accordingly.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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Add a new property 'video-mode' binding for panel rm67191
which is used to specify a video data transfer mode.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 9dba8643d7b9c73a2b20ef517c79bb799f5ade3d)
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The resources retrieved by CAAM driver was wrong as the size
was not correct hence future uses might have issues.
before:
[ 3.010744] caam 30900000.caam:
sm res: [start: 0000000000100000,
end: 0000000000107ffe,
name: /caam-sm@00100000,
flags:0x200 desc:0x0] -> size: 0x7fff
modif to actual size:
[ 3.012495] caam 30900000.caam:
sm res: [start: 0000000000100000,
end: 0000000000107fff,
name: /caam-sm@00100000,
flags:0x200 desc:0x0] -> size: 0x8000
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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Enable CAAM driver for i.MX8 family:
- Use a Job ring for RNG instantiation rather than DECO, even
for i.MX6/7 families.
- Use of aliased CAAM registers instead of original registers in page 0
since page 0 is no more accessible in i.MX8 family except mScale.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
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Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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Add dts binding doc for i.MX8MM TMU.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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Use a specific compatible string for 850D in order to limit DSD MCLK
frequency for platforms newer than 850D.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
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Add devicetree binding doc for i.MX8MM pinctrl driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
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