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2018-09-27i2c: sw-edid: add a driver which simulates edidMax Krummenacher
This adds a driver which simulates a i2c bus with an attached EDID memory. The memory content is read from the device tree. This allows to simulate EDID data which may differ from an attached display. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-21Merge tag 'tegra-l4t-r21.7' into toradex_tk1_l4t_r21.7-nextMarcel Ziswiler
Merge NVIDIA's latest Linux for Tegra aka L4T R21.7 Linux kernel changes from git://nv-tegra.nvidia.com/linux-3.10.git commit: e78bb38b883c42edf81766a1d557aed74458e08f Conflicts involved missing 24-bit LVDS support and a single whitespace aka tab difference in drivers/video/tegra/dc/sor.c. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-04-28Documentation: Document array_index_nospecMark Rutland
Commit f84a56f73ddd upstream. Document the rationale and usage of the new array_index_nospec() helper. Change-Id: I4b804638bbe9811b82d34cd58314cbb1738d7d25 Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kees Cook <keescook@chromium.org> Cc: linux-arch@vger.kernel.org Cc: Jonathan Corbet <corbet@lwn.net> Cc: Peter Zijlstra <peterz@infradead.org> Cc: gregkh@linuxfoundation.org Cc: kernel-hardening@lists.openwall.com Cc: torvalds@linux-foundation.org Cc: alan@linux.intel.com Link: https://lkml.kernel.org/r/151727413645.33451.15878817161436755393.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Jeetesh Burman <jburman@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1698397 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Tested-by: Bibek Basu <bbasu@nvidia.com>
2018-03-28pwm-backlight: Add power supply supportThierry Reding
Backlights require a power supply to work properly. This commit adds a regulator to power up and power down the backlight. Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit 22ceeee16eb8f0d04de3ef43a5174fb30ec18af9)
2018-03-28pwm-backlight: Use new enable_gpio fieldThierry Reding
Make use of the new enable_gpio field and allow it to be set from DT as well. Now that all legacy users of platform data have been converted to initialize this field to an invalid value, it is safe to use the field from the driver. Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit 8265b2e4e62632b01f998095d1bbda4d281629fe)
2018-01-19mm: larger stack guard gap, between vmasSri Krishna chowdary
commit 1be7107fbe18eed3e319a6c3e83c78254b693acb upstream. Stack guard page is a useful feature to reduce a risk of stack smashing into a different mapping. We have been using a single page gap which is sufficient to prevent having stack adjacent to a different mapping. But this seems to be insufficient in the light of the stack usage in userspace. E.g. glibc uses as large as 64kB alloca() in many commonly used functions. Others use constructs liks gid_t buffer[NGROUPS_MAX] which is 256kB or stack strings with MAX_ARG_STRLEN. This will become especially dangerous for suid binaries and the default no limit for the stack size limit because those applications can be tricked to consume a large portion of the stack and a single glibc call could jump over the guard page. These attacks are not theoretical, unfortunatelly. Make those attacks less probable by increasing the stack guard gap to 1MB (on systems with 4k pages; but make it depend on the page size because systems with larger base pages might cap stack allocations in the PAGE_SIZE units) which should cover larger alloca() and VLA stack allocations. It is obviously not a full fix because the problem is somehow inherent, but it should reduce attack space a lot. One could argue that the gap size should be configurable from userspace, but that can be done later when somebody finds that the new 1MB is wrong for some special case applications. For now, add a kernel command line option (stack_guard_gap) to specify the stack gap size (in page units). Implementation wise, first delete all the old code for stack guard page: because although we could get away with accounting one extra page in a stack vma, accounting a larger gap can break userspace - case in point, a program run with "ulimit -S -v 20000" failed when the 1MB gap was counted for RLIMIT_AS; similar problems could come with RLIMIT_MLOCK and strict non-overcommit mode. Instead of keeping gap inside the stack vma, maintain the stack guard gap as a gap between vmas: using vm_start_gap() in place of vm_start (or vm_end_gap() in place of vm_end if VM_GROWSUP) in just those few places which need to respect the gap - mainly arch_get_unmapped_area(), and and the vma tree's subtree_gap support for that. Bug 1946430 Change-Id: I9a66aabc34b687996fb971e01bb0ef30a3d4de7d Original-patch-by: Oleg Nesterov <oleg@redhat.com> Original-patch-by: Michal Hocko <mhocko@suse.com> Signed-off-by: Hugh Dickins <hughd@google.com> Acked-by: Michal Hocko <mhocko@suse.com> Tested-by: Helge Deller <deller@gmx.de> # parisc Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> [wt: backport to 4.11: adjust context] [wt: backport to 4.9: adjust context ; kernel doc was not in admin-guide] [wt: backport to 4.4: adjust context ; drop ppc hugetlb_radix changes] Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1509390 GVS: Gerrit_Virtual_Submit Tested-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2017-11-29Merge tag 'tegra-l4t-r21.6' into toradex_tk1_l4t_r21.6Marcel Ziswiler
Merge NVIDIA's latest Linux for Tegra aka L4T R21.6 Linux kernel changes from git://nv-tegra.nvidia.com/linux-3.10.git commit: b271e8fa67a6d9c4600274a25636cfe00fdd1b68 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
2017-09-20rtc: ds1307: support m41t0 variantBhuvanchandra DV
The m41t0 variant is very similar to the already supported m41t00 variant, with the notable exception of the oscillator fail bit. The data sheet notes: If the oscillator fail (OF) bit is internally set to a '1,' this indicates that the oscillator has either stopped, or was stopped for some period of time and can be used to judge the validity of the clock and date data. The bit will get cleared with a regular write of the system time, so no changes are needed to clear it. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> (backported from commit 8566f70c8a90f3914b06e934852596ba94aaa381)
2016-08-24spi: tegra: support polling modeKrishna Yarlagadda
Added support to use polling mode instead of interrupts through a property in dt Bug 1679083 Change-Id: Ic82ab592822cc96bacda05124d38ddd913e09af9 Reviewed-on: http://git-master/r/840233 (cherry picked from commit cd1c4db5adc8317572106099da37fa434245e699) Reviewed-on: http://git-master/r/1009988 (cherry picked from commit b29ce03a6b7ebb306ff157640470dd5ab99c6f6b) Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/1175213 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2016-08-24spi: tegra: option to boost register accessKrishna Yarlagadda
SPI register access for T210 and earlier chips depend on SPI clock frequency. Provided an option to set SPI clock at max frequency for register access. Bug 1675625 Change-Id: Ie52c83cd4602604822462d9f02ddf31ead83aafc Reviewed-on: http://git-master/r/1009782 (cherry picked from commit a2ccd28f2850538064668568432fee5d70a22e82) Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/1174581 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2015-02-12tegra: add jetson-tk1 board_info DT node docShreshtha SAHU
Bug 200006918 Change-Id: Ibd9a004e10316ab817ca85c9093b094a5cb4fed3 Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com> Reviewed-on: http://git-master/r/557204 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-09-03pwm: Add sysfs interfaceH Hartley Sweeten
Add a simple sysfs interface to the generic PWM framework. /sys/class/pwm/ `-- pwmchipN/ for each PWM chip |-- export (w/o) ask the kernel to export a PWM channel |-- npwm (r/o) number of PWM channels in this PWM chip |-- pwmX/ for each exported PWM channel | |-- duty_cycle (r/w) duty cycle (in nanoseconds) | |-- enable (r/w) enable/disable PWM | |-- period (r/w) period (in nanoseconds) | `-- polarity (r/w) polarity of PWM (normal/inversed) `-- unexport (w/o) return a PWM channel to the kernel Based on work by Lars Poeschel. Bug 200028381 Change-Id: I0c9c6ad2ca7173e6fc3fbe1d3cd3963cde00539a Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Rob Landley <rob@landley.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Bibek Basu <bbasu@nvidia.com> (cherry picked from commit 76abbdde2d95a3807d0dc6bf9f84d03d0dbd4f3d) Reviewed-on: http://git-master/r/455068 (cherry picked from commit b1824bc0325f84ea04dab7d6d4f7c887c80b1982) Reviewed-on: http://git-master/r/488690 GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com> Tested-by: Winnie Hsu <whsu@nvidia.com>
2014-06-16mfd: as3722: Documentation for oc_pg_ctrl maskingBibek Basu
Update Documentation for device tree update for optional oc_pg_ctrl_masking feature Bug 1518725 Bug 1419425 Change-Id: I309533849d48d61aefebd8f477e79b79ed4127fb Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/423185 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> GVS: Gerrit_Virtual_Submit
2014-06-05Merge branch 'linux-3.10.40' into rel-21Ishan Mittal
Bug 200004122 Conflicts: drivers/cpufreq/cpufreq.c drivers/regulator/core.c sound/soc/codecs/max98090.c Change-Id: I9418a05ad5c56b2e902249218bac2fa594d99f56 Signed-off-by: Ishan Mittal <imittal@nvidia.com>
2014-05-27staging: iio: cm3217: add optional value in DT.steven
Add below optional value can be overrid by DT for project. If no add in DT will load default value. 1)integration-time. Default:"480000" 2)max-range. Default:"78643.2" 3)resolution. Default:"307" 4)power-consumed. Default:"1670" Bug 1496947 Change-Id: I8718bf5636042bc801574c8e4177a12e5a948540 Signed-off-by: steven <skao@nvidia.com> Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/395755 Reviewed-on: http://git-master/r/411415 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Mitch Luban <mluban@nvidia.com>
2014-05-09Merge commit 'refs/changes/86/405286/2' of ssh://git-master:12001/linux-3.10 ↵Mandar padmawar
into promotion_build
2014-05-07mfd: as3722: Documentation for Backup Battery ChargeBibek Basu
Update Documentation for device tree update for optional backup battery charging feature Bug 1508216 Change-Id: I4ebd7af6814cddbebd4503c311d3cade7add3bd5 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/405115 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2014-05-06media: media: gspca: sn9c20x: add ID for Genius Look 1320 V2Wolfram Sang
commit 61f0319193c44adbbada920162d880b1fdb3aeb3 upstream. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-06power: bq2419x: configure PWR ON REG when safety timer expiresVenkat Reddy Talla
enable safety timer and configure power on register from ISR and resume path when safety timer expired. set rtc alarm timer based on parameter value passed through dt file only when battery in CHARING done state and high charging current cable connected to wake up device from LP0. Bug 1440235 Change-Id: I2fb8121c6183a8367c8bd869f43373062fdbb630 Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Reviewed-on: http://git-master/r/392334 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Iff93242bdc368f711d06eec1b4ec4ff844df5978 Reviewed-on: http://git-master/r/404465 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-05-05Doc: DT: mfd: ams: add DT documentation for as3722Bibek Basu
Add Devicetree binding documentation for as3722 from upstream. This is based on mainline Commit https://patchwork.kernel.org/patch/2975721/ Contributed by: Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Florian Lobmaier <florian.lobmaier@ams.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Change-Id: Ie8a17d9aaad883ef59f928f389ac6b6233bbaa6f Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/405114 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2014-04-30arm64: module: ensure instruction is little-endian before manipulationWill Deacon
Relocations that require an instruction immediate to be re-encoded must ensure that the instruction pattern is represented in a little-endian format for the manipulation code to work correctly. This patch converts the loaded instruction into native-endianess prior to encoding and then converts back to little-endian byteorder before updating memory. Change-Id: I84a8946f66e6eb303d81b7b9198d95cca6b8d42f (cherry picked from commit 122e2fa0d310d262cb85cf0b003032e5d2bc2ae7) Signed-off-by: Will Deacon <will.deacon@arm.com> Tested-by: Matthew Leach <matthew.leach@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Ishan Mittal <imittal@nvidia.com>
2014-04-30arm64: mm: permit use of tagged pointers at EL0Will Deacon
TCR.TBI0 can be used to cause hardware address translation to ignore the top byte of userspace virtual addresses. Whilst not especially useful in standard C programs, this can be used by JITs to `tag' pointers with various pieces of metadata. This patch enables this bit for AArch64 Linux, and adds a new file to Documentation/arm64/ which describes some potential caveats when using tagged virtual addresses. (cherry picked from commit d50240a5f6ceaf690a77b0fccb17be51cfa151c2) Conflicts: Documentation/arm64/tagged-pointers.txt Change-Id: I4366318cc1b049e8e9f642fc502e8d0b04e2ed24 Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-04-30arm64: Expand arm64 image headerRoy Franz
Expand the arm64 image header to allow for co-existance with PE/COFF header required by the EFI stub. The PE/COFF format requires the "MZ" header to be at offset 0, and the offset to the PE/COFF header to be at offset 0x3c. The image header is expanded to allow 2 instructions at the beginning to accommodate a benign intruction at offset 0 that includes the "MZ" header, a magic number, and the offset to the PE/COFF header. (cherry picked from commit 4370eec05a887b0cd4392cd5dc5b2713174745c0) Change-Id: If4f180805b305af50f612ef10b37b58c27dfba4d Signed-off-by: Roy Franz <roy.franz@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-04-23input: touch: maxim: add device tree supportAndrew Tran
-update maxim touch driver to support device tree. -add sample maxim touch device tree in documentation Bug 1468560 Change-Id: Id7a99ca9bdeb53f7d817e33874dac9bca48965a9 Signed-off-by: Andrew Tran <atran@nvidia.com> Reviewed-on: http://git-master/r/383999 (cherry picked from commit 86384c3e1db348509887c7bbdbe9f3e3c5be8941) Reviewed-on: http://git-master/r/383268 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mitch Luban <mluban@nvidia.com>
2014-04-23video: tegra: dc: nvidia,dc-connection propertyMin-wuk Lee
nvidia,dc-connection property will indicate if target dc device is used for internal lcd or external display. For internal lcd, it will get dc output type from selected panel node among device tree multiple panel nodes: It can be TEGRA_DC_OUT_DSI or TEGRA_DC_OUT_DP, etc. For external display, dc output type will be set to TEGRA_DC_OUT_HDMI. Bug 1371533 Change-Id: I94f7f0a2e93c5550aa2ea8f7e2069e52bdc799df Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/395028 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-04-13power: lc709203f: Update DT document for battery current meaurementLaxman Dewangan
The lc709203f driver provided the property to measure battery current now. The battery current can be read from the IIO interface with monitor. This patch explain about the properties on nodes to measure the current. bug 1413219 Change-Id: Ib1346f445f90d3a40cbf7ab7338c382ae8b3d120 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/395551
2014-04-13iio: meter: ina3221: add dt binding header for iio channel supportLaxman Dewangan
Update the INA3221x DT binding documents and add dt-binding header to use the macro from DTS file. The updates details how it can be instantiated as iio channels and client driver use this from DT node for measuring different parameters of different channels. It also details the index for different signal monitor which is require for iio channel consumer interface. bug 1413219 Change-Id: I1c31322d4d905983e16ef132c0bd75af29fd0583 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/395549
2014-04-10video: tegra: dc: panel detection from DTMin-wuk Lee
This is driver side change to work with reorganized display system device tree for proper panel detection from among multiple panel nodes in device tree level. Bug 1371533 Change-Id: Iad0b1aacfc6633945c6696b524e43a87150e9c90 Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/384373 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2014-04-09Doc: DT: add DT binding doc for palams-ldousb-in selction driver.Mallikarjun Kasoju
Bug 1451748 Change-Id: I634ac9226ce763ec2518e08c74d163886e114609 Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/394188 GVS: Gerrit_Virtual_Submit
2014-04-03Documentation:tegra: tegra camera ioctlsAnton Kondratenko
Provide initial documentation for tegra camera ioctls Bug 1466413 Change-Id: I5d460ec3e98f10ea03f0f0a452d20e93d5c19c7a Signed-off-by: Anton Kondratenko <akondratenko@nvidia.com> Reviewed-on: http://git-master/r/390380 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2014-03-26power: power_supply_extcon: add dt supportLaxman Dewangan
Add DT support for the power_supply-extcon driver Added DT binding documents also. Change-Id: Id7d612032cac82eecadae6c24a3c1e0c82b60a27 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/387063
2014-03-21power: lc709203f:implement interrupt featureVenkat Reddy Talla
implement interrupt support to generate low voltage/soc events when battery voltage measured below threshold value. update binding doc with lc709203f parameters. Bug 1474634 Change-Id: I89f3b009548132d1e00bc28fb202e1f6babdfab1 Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Reviewed-on: http://git-master/r/383844 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2014-03-19power: bq2477x: Add adapter detection through GPIOChaitanya Bandi
Added support for AC adapter detection through GPIO in bq2477x charger. Bug 1457299 Change-Id: I344d264312142121342403194aa5adeaec66d47d Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/380285 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2014-03-19power: bq2477x: Add device tree supportChaitanya Bandi
Added device tree support for bq2477x. Change-Id: I5dc928c609c8b4d6d9e8d09f46382307315f4f1c Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/381886 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2014-03-13Merge branch 'linux-3.10.33' into dev-kernel-3.10Deepak Nibade
Bug 1456092 Change-Id: Ic563f451abb08754fea0e2bbf0ce065ca2e6e770 Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2014-03-13Merge branch 'linux-3.10.33' into dev-kernel-3.10Deepak Nibade
Bug 1456092 Change-Id: I3021247ec68a3c2dddd9e98cde13d70a45191d53 Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2014-03-12misc: tegra: fuse: add dt support for tegra fuseSalona Sinha
Add bindings file for tegra-fuse driver and add tegra fuse specific read and write functions to tegra-fuse driver. Bug 1449516 Change-Id: I1d15dd1341b27eb370fd56be0ecce40726701499 Signed-off-by: Salona Sinha <salonas@nvidia.com> Reviewed-on: http://git-master/r/367716 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Shardar Mohammed <smohammed@nvidia.com> Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com> Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
2014-03-10power: bq2419x: add thermal support for charging voltageLaxman Dewangan
The maximum charging voltage depends on the battery temperature. Add DT porperty and mechanims to set different charging voltage for different temperature. bug 1472161 Change-Id: Ia6fa3ee84cfd1f9ad8359e8249ffb268330f90cf Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/379575 GVS: Gerrit_Virtual_Submit
2014-03-10video: tegra: dc: properties update for DTMin-wuk Lee
1) New device tree properties are added for tmds configuration. - version - pad_ctls0_mask - pad_ctls0_setting 2) For "nvidia,out-max-pixclk", device tree needs to write in pico seconds unit. Bug 1371533 Change-Id: I73cb0605144f3951aea172cde7a527aeffbb368d Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/378810 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2014-03-10Merge branch 'android-3.10' into dev-kernel-3.10Deepak Nibade
Bug 1456092 Change-Id: Idd03c5e52e7aac49f4adede54802ca66f22d2ee3 Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2014-03-10Merge branch 'android-3.10' into dev-kernel-3.10Deepak Nibade
Bug 1456092 Change-Id: I87b6b883c382000fc0dfee7c8d8f36269f504e46 Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2014-03-04staging: iio: light: ltr558: Add ltr659 supportSri Krishna chowdary
- Add regulator support for vdd, vled - Check sensor's presence during probe - Add device tree support and the bindings file Bug 1469642 Change-Id: Ib6e80149bd424852ee3e343e92ac091204c87f2f Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/377082 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2014-03-03staging: iio: light: max44005: configure gainSri Krishna chowdary
- Add support to configure gain from dt - Also get als_resolution from dt - Add als_resolution sysfs - Add dt bindings for max44005 Bug 1462476 Change-Id: I58f05a0971cf063ab14f4cd331b30e537cf989a5 Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/369337 (cherry picked from commit 0928174f846de5e6ffce0dee31c3a538ea8fadfe) Reviewed-on: http://git-master/r/374281 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2014-02-27cpufreq: cpufreq-cpu0: add dt node parsing for cooling device propertiesEduardo Valentin
This patch changes the cpufreq-cpu0 driver to consider if a cpu needs cooling (with cpufreq). In case the cooling is needed, the cpu0 device tree node needs to be properly configured with cooling device properties. In case these properties are present,, the driver will load a cpufreq cooling device in the system. The cpufreq-cpu0 driver is not interested in determining how the system should be using the cooling device. The driver is responsible only of loading the cooling device. Describing how the cooling device will be used can be accomplished by setting up a thermal zone that references and is composed by the cpufreq cooling device. Change-Id: Ie5f85e314cb45f977d9484220e4778cccaad8b4c Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: cpufreq@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com> Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com> # for the NVIDIA downstream kernel Signed-off-by: Christina Guertin <cguertin@nvidia.com> Reviewed-on: http://git-master/r/356897 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2014-02-27thermal: introduce device tree parserEduardo Valentin
This patch introduces a device tree bindings for describing the hardware thermal behavior and limits. Also a parser to read and interpret the data and feed it in the thermal framework is presented. This patch introduces a thermal data parser for device tree. The parsed data is used to build thermal zones and thermal binding parameters. The output data can then be used to deploy thermal policies. This patch adds also documentation regarding this API and how to define tree nodes to use this infrastructure. Note that, in order to be able to have control on the sensor registration on the DT thermal zone, it was required to allow changing the thermal zone .get_temp callback. For this reason, this patch also removes the 'const' modifier from the .ops field of thermal zone devices. Change-Id: I5f6150963b24b702b230746f669ebaaac507cac5 Cc: Zhang Rui <rui.zhang@intel.com> Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com> Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com> # for the NVIDIA downstream kernel Signed-off-by: Christina Guertin <cguertin@nvidia.com> Reviewed-on: http://git-master/r/356894 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2014-02-24ARM: tegra: Add Tegra13 DFLL binding compatibilityAlex Frid
Added Tegra DFLL binding compatibility with T132 SoC. Bug 1442709 Change-Id: Ib15b9a73e634d4de97d1a17079c5637b27d3b86f Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/373259 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2014-02-24iio: meter: ina219: add DT binding document for ina219 driverLaxman Dewangan
Add devicetree binding document and example for the iio/meter based ina219 driver. Change-Id: I7d3fac2b852992f3e91982964b356d049094aa1c Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/372860 GVS: Gerrit_Virtual_Submit
2014-02-20video: tegra: dc: use macro for DTMin-wuk Lee
For following properties' item, dc macro is utilized from this change. Macro is defined in /include/dt-bindings/display/tegra-dc.h. - nvidia,dc-flags - nvidia,out-type - nvidia,out-flags - nvidia,fb-flags - nvidia,out-align - nvidia,out-order Bug 1371533 Change-Id: I33eed200f9ac3f43e5ad57b2059455b41430727f Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/367575 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-02-20video: tegra: dc: add two DT propertiesMin-wuk Lee
Add two device tree properties. 1. nvidia,out-rotation to specify panel rotation. 2. nvidia,dsi-ulpm-not-support. With enabled, dsi do not enter ulpm mode. Bug 1371533 Change-Id: Ie6bfb35aec5ed01f5161754873ede598b687f384 Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Change-Id: I3a2fbd5e6b8335428ba9b7a0411669c918c582d1 Reviewed-on: http://git-master/r/367623 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-02-20ARM: tegra: add DT binding for pcie-tegraJay Agarwal
Add documentation for device tree binding of NVIDIA's Tegra pcie host controller driver. Describing all compatible values used for different Tegra SoCs in details in this documentation. Change-Id: I7664d1d9ad32c5928b15cd55a538a8ef0a531306 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/369806 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-11-16 13:24:28 +0000