summaryrefslogtreecommitdiff
path: root/arch/arm/Kconfig
AgeCommit message (Collapse)Author
2014-04-30kernel: remove CONFIG_USE_GENERIC_SMP_HELPERSChristoph Hellwig
We've switched over every architecture that supports SMP to it, so remove the new useless config variable. Conflicts: arch/arm/Kconfig block/blk-mq.c Change-Id: Ic19c3ac07a38a1636d6aa2fed5e55a58833f9b2c Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Jan Kara <jack@suse.cz> Cc: Jens Axboe <axboe@kernel.dk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> (cherry picked from commit 0a06ff068f1255bcd7965ab07bc0f4adc3eb639a) Signed-off-by: Ishan Mittal <imittal@nvidia.com>
2014-03-17Kconfig: sysedp: update sysedp management in KconfigTimo Alho
- Remove EDP_FRAMEWORK configuration - Include drivers/edp/Kconfig from drivers/Kconfig Change-Id: I925d933830fd85ae58320bf979d82a7df9a87f53 Signed-off-by: Timo Alho <talho@nvidia.com> Reviewed-on: http://git-master/r/380410 Reviewed-by: Steve Rogers <srogers@nvidia.com> Reviewed-by: Sivaram Nair <sivaramn@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2014-01-13sched_clock: Make ARM's sched_clock generic for all architecturesStephen Boyd
Nothing about the sched_clock implementation in the ARM port is specific to the architecture. Generalize the code so that other architectures can use it by selecting GENERIC_SCHED_CLOCK. Bug 1399318 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [jstultz: Merge minor collisions with other patches in my tree] Signed-off-by: John Stultz <john.stultz@linaro.org> (cherry picked from commit 38ff87f77af0b5a93fc8581cff1d6e5692ab8970) Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com> Change-Id: Iaac325635344ef4adee8fa0f9ca11aee089bce0f
2013-10-17Revert "Revert "ARM: smp_twd: convert to use CLKSRC_OF init""Ajay Nandakumar
This reverts commit ddb49eadadb47df43a5cec0bc3a39cd5ee718121. Now that we have OF based init with CLKSRC_OF, convert smp_twd init function to use it and covert all callers of twd_local_timer_of_register. Bug 1379817 Change-Id: Ie0bad574361f805081fc050a91e1e3a60513da2d Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com> Reviewed-on: http://git-master/r/299479 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-27ARM: mm: Implement ARCH_SUPPORTS_DEBUG_PAGEALLOCHiroshi Doyu
Implement the archtecture backend of ARCH_SUPPORTS_DEBUG_PAGEALLOC for ARM. Bug 1365298 Change-Id: I4375debadd45bb458186bae6aeae551ff1de3a08 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/276263
2013-09-14arm: tegra: enable multiple cpuidle driver supportPrashant Gaikwad
Bug 1254336 Change-Id: I5617e60913417a520a8b767f074c9c159850b0be Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/258119 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2013-09-14ARM: tegra: enable soc timers for cpu eventsSeshendra Gadagottu
When TEGRA_SOC_TIMERS is enabled use SOC timers instead of ARM core private timers for cpu clock events. Bug 1314282 Change-Id: Ie8c43f7e2215b4450b62a98922ab167d366fe053 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/252669 (cherry picked from commit 530946bacdc91069f4284748bf0edf67a8748831) Reviewed-on: http://git-master/r/256961 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2013-09-14UPSTREAM Revert Android "ARM: convert build of appended dtb zImage to list ↵Dan Willemsen
of dtbs" This reverts commit 5e9468632ea81e7d17fc9bd4457acbaffda7b370. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-09-14ARM: tegra14x: enable soc timers for cpu eventsSeshendra Gadagottu
Enable use of SOC timers instead of A9 core private timers for cpu clock events. Bug 1243194 Change-Id: If17076b802bb25ea46a1b6503d285bc9c5ced6ff Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/225019 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
2013-09-14ARM errata: A memory read can stall indefinitely in the L2 cacheBo Yan
Define a configuration option for platform to implement Change-Id: I352c644a33ebbf809e450004a01394f07f2903b7 Signed-off-by: Bo Yan <byan@nvidia.com> Reviewed-on: http://git-master/r/212781 (cherry picked from commit 91250495671135d9d815da3e65777844957216e1) Reviewed-on: http://git-master/r/216183 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2013-09-14ARM errata: Writing ACTLR.SMP when the L2 cache has been idle for an ↵Bo Yan
extended period may not work correctly This workaround is for ARM errata 799270 which is applicable to Cortex-A15 up to revision R2P4. The workaround is to read from a device register and create a data dependency between this read and the modification of ACTLR. Change-Id: I26813f17a8a9c6a90446ddeb943ef318e3c69770 Signed-off-by: Bo Yan <byan@nvidia.com> Reviewed-on: http://git-master/r/212770 (cherry picked from commit 2340401e2dec7228bcc5d9074c310d0146454736) Reviewed-on: http://git-master/r/213135 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14arch: arm: lib: optimize memcpy for cortex-A15Chandler Zhang
The LDRD/STRD instruction is faster than LDM/STM on Cortex-A15. Also optimized preload cache size for Cortex-A15. Added USE_LDRDSTRD_OVER_LDMSTM to turn on LDRD/STRD optimization. Added ARM_PLD_SIZE, default 32. Should set to 64 for Cortex-A15. Bug 1185248 Change-Id: I4fa8c25bcd9b7823a11018817a4d17e3357ae681 Signed-off-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-on: http://git-master/r/211599 GVS: Gerrit_Virtual_Submit Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2013-09-14arm: errata: 761320: Full cache line writes to the same memory region from ↵Krishna Reddy
at least two processors might deadlock processor Under very rare circumstances, full cache line writes from (at least) 2 processors on cache lines in hazard with other requests may cause arbitration issues in the SCU, leading to processor deadlock. This erratum can be worked around by setting bit[21] of the undocumented Diagnostic Control Register to 1. Change-Id: I83f919ead5ef4f90f50fa3f38f2cc31ab6bfc31e Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/170582 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
2013-09-14ARM: add tegra timer HZ configJin Qian
Change-Id: Ie556857bbc265429bcef6f47f352ab87ba333716 Signed-off-by: Jin Qian <jqian@nvidia.com> Reviewed-on: http://git-master/r/160042 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14arm: tegra: Add NET_IP_ALIGN in mach memory.hMohan T
NET_IP_ALIGN needs to be define in mach memory.h to support Unaligned skb DMA access in network drivers like USB rndis and usbnet. Bug 1025704 Change-Id: I7517410f0b311721f2157cfbc36ba4f5db3f1583 Signed-off-by: Mohan T <mohant@nvidia.com> Reviewed-on: http://git-master/r/148675 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> GVS: Gerrit_Virtual_Submit Rebase-Id: Re61813f29d2aa2a65961e2f50556d9e8dfb88c4e
2013-09-14kernel: Modify schedule interval to 1ms only for ARCH_TEGRADiwakar Tundlam
Bug 954903 Change-Id: I8187b71384c694795bb41dafa3a3800d45110d22 Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-on: http://git-master/r/141381 Reviewed-by: Mitch Luban <mluban@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Rebase-Id: R18750367857cecd64ebc8d359c3842f2c2289a26
2013-09-14kernel: Modify default schedule interval to 1msMitch Luban
Modifies the OS default system scheduling interval to 1ms. Bug 954903 Change-Id: I306c2183bd94df3147aab636c9d7d2f813e4fa30 Signed-off-by: Mitch Luban <mluban@nvidia.com> Reviewed-on: http://git-master/r/130300 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> Rebase-Id: R0c684efb614bced86026f8a13d031d1e79797a46
2013-09-14ARM: adding Kconfig for EDP frameworkSivaram Nair
Change-Id: I178f7ee104cf7ba6786ebbb171160bd30b458780 Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> Reviewed-on: http://git-master/r/115709 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rc4a3eddcbbcd28fa9c31e08d3c9278c4ad2e7900
2013-09-14ARM: tegra: Increase meminfo array sizeHiro Sugawara
SOCs supporting full 4GB physical memory need fragmented physical memory information passed in kernel command line. Change-Id: I19501a3f03db2467c746384cf1a9e390b1a6742d Signed-off-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-on: http://git-master/r/118116 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R6a30bf4f74415b2c59b417b7dd7a04a32a261f53
2013-09-14ARM: Enable LOCAL_TIMERS for ARCH timer supportBo Yan
Just like local timer in A9, arch timer in A15 is for local CPU too. Thus local timer support is needed even when arch timer is in system , however, arch timer can't co-exist with SMP TWD. Change-Id: Ibcdc73eed36035c6f5b3560d632226a74b6bc9e7 Signed-off-by: Bo Yan <byan@nvidia.com> Reviewed-on: http://git-master/r/116350 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rfbc8085f86ebb189be9cbfea3143267e78524fe0
2013-09-14ARM: config for PCIe frameworkVidya Sagar
Bug 815499 Change-Id: I6ce9a2bb4afbfd797fc5a0bf0d1027bdc0c1459d Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: http://git-master/r/109745 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R433a5f3dcd61af15b7a4611b3ae9b8123935472b
2013-09-14ARM: use ARM_ARCH_TIMER instead of LOCAL_TIMERVarun Wadekar
Change-Id: Id149dcec5f531e249960603f27693775a56b3f4e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/113242 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com> Tested-by: Bo Yan <byan@nvidia.com> Rebase-Id: Rebc0db942508d5a7b008005b6102c190575fe27c
2013-09-14ARM: tegra: smp: Add support for Cortex-A15 boot_secondaryScott Williams
Cortex-A15 does not have a memory-mapped SCU in the PERIPHBASE aperture. Instead, the number of CPUs present is obtained from the architectural L2 Cache Control (L2CTLR) register. Enable HAVE_ARM_SCU only on platforms that have a memory-mapped SCU and add the necessary conditionals to prevent access to the memory-mapped SCU address range on platforms that don't. Change-Id: I4027d034fe79339fab0030a44780240785206cba Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/79341 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mark Stadler <mastadler@nvidia.com> Reviewed-by: Jeff Smith <jsmith@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Rebase-Id: R62dcd56e7abed8ef5cef60325c6ca52fbfb43b22
2013-09-14arch: arm: config: disabling pcie in defconfigJay Agarwal
Pcie powermanagement issues are yet to be resolved, so modifying the defconfig to not to enable the driver by default bug: 878874 Change-Id: Ie8787342b1ccf9e22486129633d15d566d50e4e0 Signed-off-by: Krishna Kishore <kthota@nvidia.com> Reviewed-on: http://git-master/r/64772 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> Rebase-Id: R8c6fb516b3d6f7ffaab077ee33df170eeb8a11f3
2013-09-14Merge commit 'a88f9e27498afaea615ad3e93af4f26df1f84987' into ↵Dan Willemsen
after-upstream-android Conflicts: arch/arm/common/Kconfig arch/arm/mm/Makefile arch/arm/mm/cache-l2x0.c arch/arm/mm/mmu.c drivers/input/Kconfig drivers/input/Makefile drivers/power/Kconfig kernel/futex.c
2013-09-14Merge branch 'buckets/cpuquiet' into after-bucketsDan Willemsen
2013-09-14ARM: Config for cpuquiet frameworkSai Charan Gurrappadi
Change-Id: I61b19497d88821f39cec8605f24028c7d7fda126 Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com> Reviewed-on: http://git-master/r/105268 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> Rebase-Id: R4b2015e74701c236211df3bec5771de3acbb569a
2013-09-14ARM: errata: 716044: an uncacheable load multiple can cause a deadlock.Krishna Reddy
Under some rare circumstances, an uncacheable load multiple instruction (LDRD, LDM, VLDM, VLD1, VLD2, VLD3, VLD4) can cause a processor deadlock. Change-Id: Ibd79aa8182dce37d0be9892f2310735e1123618a Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/95914 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R87f0be6dfa8d8ac812cb46deb8c4466f622e580c
2013-09-14arm: include: make module space configurableMursalin Akon
Make the module space a configurable option. The default value remains 16. The main goal of this CL is to enable large module, such as resman module of nvidia. Change-Id: I8a775a6a23c1a75562917d8ab8e4bbe29f08d7e5 Signed-off-by: Mursalin Akon <makon@nvidia.com> (cherry picked from commit 40aaad75bd32822137033fc7972d41ee30ff7bc9) Reviewed-on: http://git-master/r/91322 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Eric Brower <ebrower@nvidia.com> Reviewed-by: Allen Martin <amartin@nvidia.com> Rebase-Id: R547b58892f5c3d7b1d7ca2b9b5488e8d1f36de5c
2013-09-14ARM: errata: 752520: Faulty arbitration between PLD and Cacheable TLB ↵vdumpa
requests may create a system deadlock. Under rare circumstances, PLDs may interfere with a Cacheable page table walk, creating a processor deadlock. The erratum can only happen when the Data Cache and MMU are enabled, with the TLB descriptors marked as L1 cacheable, so that Page Table Walks are performed as cache linefills. This workaround sets a bit in the diagnostic register of the Cortex-A9, causing PLD operations treated as NOP. (cherry-picked from b501cafea7328bc578f67e3e846ab9d25b7ec1b0) Change-Id: Ic4039b83de43530bae7ce705162441bea74e1e98 Reviewed-on: http://git-master/r/54095 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Ra35e48e21c1d62b6480a9d67d1413dd5d0df3f53
2013-09-14ARM: Cortex-A9: Enable dynamic clock gatingDan Willemsen
Enable dynamic high level clock gating for Cortex-A9 CPUs, as described in 2.3.3 "Dynamic high level clock gating" of the Cortex-A9 TRM. This may cut the clock of the integer core, system control block, and Data Engine in certain conditions. Add ARM errata 720791 to avoid corrupting the Jazelle instruction stream on earlier Cortex-A9 revisions. Original-Change-Id: I48e51d907e593f26982ea91b0a811553f68e3c86 Signed-off-by: Todd Poynor <toddpoynor@google.com> Rebase-Id: R7ae4d4825e9171bca2471fe776ecf363e75b9ca6
2013-09-14[ARM] tegra: add FIQ supportIliyan Malchev
Signed-off-by: Iliyan Malchev <malchev@google.com> Rebase-Id: R5d3030622c808763b31ca6c1453997b02521f41b
2013-09-14ARM: tegra: Move COMMON_CLK selection to Tegra2x/3xDan Willemsen
Downstream, only Tegra2x & 3x will support common clock for now. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-09-13Revert "ARM: tegra: select SPARSE_IRQ"Dan Willemsen
This reverts commit c5a4d6b07ac98405f347c796bc74f4367e516898. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-09-13Revert "ARM: tegra: move timer.c to drivers/clocksource/"Dan Willemsen
This reverts commit 1711b1e10224dbebc885b7bf7ca2f03f51ff9f4a. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-09-13Revert "ARM: tegra: expose chip ID and revision"Dan Willemsen
This reverts commit d591fdf8e23ef2abf57bdfbc4b596bf1a43d15b4. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-09-13Revert "ARM: tegra: convert to multi-platform"Dan Willemsen
This reverts commit 9002722560ba86a2f59811e3d11a2575bf47e1f6. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-08-30Revert "ARM: Push selects for TWD/SCU into machine entries"Dan Willemsen
This reverts commit 4c3ffffdbca2e6f6f5125fa7b149d87a13f92c94. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-08-30Revert "ARM: smp_twd: convert to use CLKSRC_OF init"Dan Willemsen
This reverts commit da4a686a2cfb077a8bfc1697f597e7f86235b822. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-08-11ARM: 7791/1: a.out: remove partial a.out supportWill Deacon
commit acfdd4b1f7590d02e9bae3b73bdbbc4a31b05d38 upstream. a.out support on ARM requires that argc, argv and envp are passed in r0-r2 respectively, which requires hacking load_aout_binary to prevent argc being clobbered by the return code. Whilst mainline kernels do set the registers up in start_thread, the aout loader has never carried the hack in mainline. Initialising the registers in this way actually goes against the libc expectations for ELF binaries, where argc, argv and envp are passed on the stack, with r0 being used to hold a pointer to an exit function for cleaning up after the dynamic linker if required. If the pointer is NULL, then it is ignored. When execing an ELF binary, Linux currently zeroes r0, then sets it to argc and then finally clobbers it with the return value of the execve syscall, so we actually end up with: r0 = 0 stack[0] = argc r1 = stack[1] = argv r2 = stack[2] = envp libc treats r1 and r2 as undefined. The clobbering of r0 by sys_execve works for user-spawned threads, but when executing an ELF binary from a kernel thread (via call_usermodehelper), the execve is performed on the ret_from_fork path, which restores r0 from the saved pt_regs, resulting in argc being presented to the C library. This has horrible consequences when the application exits, since we have an exit function registered using argc, resulting in a jump to hyperspace. This patch solves the problem by removing the partial a.out support from arch/arm/ altogether. Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: Ashish Sangwan <ashishsangwan2@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-11ARM: move vector stubsRussell King
commit 19accfd373847ac3d10623c5d20f948846299741 upstream. Move the machine vector stubs into the page above the vector page, which we can prevent from being visible to userspace. Also move the reset stub, and place the swi vector at a location that the 'ldr' can get to it. This hides pointers into the kernel which could give valuable information to attackers, and reduces the number of exploitable instructions at a fixed address. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-07-01ARM: convert build of appended dtb zImage to list of dtbsColin Cross
Allow CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE_NAMES to specify a space separated list of dtbs to append to the zImage, and name the resulting file zImage-dtb Change-Id: I36d9108a2349bdbb373e95076dcb1417d8c7dce6 Signed-off-by: Colin Cross <ccross@android.com> Conflicts: arch/arm/boot/Makefile scripts/Makefile.lib
2013-07-01ARM: add config option to build zImage/dtb comboErik Gilling
Allows a defconfig to set a default dtb to concatenate with a zImage to create a zImage-dtb.<dtb name> Signed-off-by: Erik Gilling <konkers@android.com> Change-Id: I34b643b1c49228fbae88a56e46c93c478089620d
2013-07-01ARM: add option to flush console before rebootDima Zavin
If the console_lock was held while the system was rebooted, the messages in the temporary logbuffer would not have propogated to all the console drivers. This force releases the console lock if it failed to be acquired. Change-Id: I193dcf7b968be17966833e50b8b8bc70d5d9fe89 Signed-off-by: Dima Zavin <dima@android.com>
2013-06-24ARM: 7773/1: PJ4B: Add support for errata 4742Gregory CLEMENT
This commit fixes the regression on Armada 370 (the kernal hang during boot) introduced by the commit: "ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead". When coming out of either a Wait for Interrupt (WFI) or a Wait for Event (WFE) IDLE states, a specific timing sensitivity exists between the retiring WFI/WFE instructions and the newly issued subsequent instructions. This sensitivity can result in a CPU hang scenario. The workaround is to insert either a Data Synchronization Barrier (DSB) or Data Memory Barrier (DMB) command immediately after the WFI/WFE instruction. This commit was based on the work of Lior Amsalem, but heavily modified to apply the errata fix dynamically according to the processor type thanks to the suggestions of Russell King and Nicolas Pitre. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Willy Tarreau <w@1wt.eu> Cc: <stable@vger.kernel.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-17ARM: 7759/1: decouple CPU offlining from reboot/shutdownStephen Warren
Add comments to machine_shutdown()/halt()/power_off()/restart() that describe their purpose and/or requirements re: CPUs being active/not. In machine_shutdown(), replace the call to smp_send_stop() with a call to disable_nonboot_cpus(). This completely disables all but one CPU, thus satisfying the requirement that only a single CPU be active for kexec. Adjust Kconfig dependencies for this change. In machine_halt()/power_off()/restart(), call smp_send_stop() directly, rather than via machine_shutdown(); these functions don't need to completely de-activate all CPUs using hotplug, but rather just quiesce them. Remove smp_kill_cpus(), and its call from smp_send_stop(). smp_kill_cpus() was indirectly calling smp_ops.cpu_kill() without calling smp_ops.cpu_die() on the target CPUs first. At least some implementations of smp_ops had issues with this; it caused cpu_kill() to hang on Tegra, for example. Since smp_send_stop() is only used for shutdown, halt, and power-off, there is no need to attempt any kind of CPU hotplug here. Adjust Kconfig to reflect that machine_shutdown() (and hence kexec) relies upon disable_nonboot_cpus(). However, this alone doesn't guarantee that hotplug will work, or even that hotplug is implemented for a particular piece of HW that a multi-platform zImage runs on. Hence, add error-checking to machine_kexec() to determine whether it did work. Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Will Deacon <will.deacon@arm.com> Tested-by: Zhangfei Gao <zhangfei.gao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-17ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrectJon Medhurst
On Cortex-A9 before version r1p0, the LoUIS bit field of the CLIDR register returns zero when it should return one. This leads to cache maintenance operations which rely on this value to not function as intended, causing data corruption. The workaround for this errata is to detect affected CPUs and correct the LoUIS value read. Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Jon Medhurst <tixy@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-05-15Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds
Pull ARM fixes from Russell King: "A small number of fixes for stuff from the last merge window, and in one case (IRQ time accounting) the previous merge window." * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7720/1: ARM v6/v7 cmpxchg64 shouldn't clear upper 32 bits of the old/new value ARM: 7715/1: MCPM: adapt to GIC changes after upstream merge ARM: 7714/1: mmc: mmci: Ensure return value of regulator_enable() is checked ARM: 7712/1: Remove trailing whitespace in arch/arm/Makefile ARM: 7711/1: dove: fix Dove cpu type from V7 to PJ4 ARM: finally enable IRQ time accounting config
2013-05-09Merge branch 'late/fixes' into fixesOlof Johansson
* late/fixes: ARM: OMAP2+: Fix unmet direct dependencies for SERIAL_OMAP ARM: ux500: always select ABX500_CORE ARM: SIRF: select SMP_ON_UP only on SMP builds ARM: SPEAr: conditionalize l2x0 support ARM: imx: build CPU suspend code only when needed ARM: OMAP: build SMP code only for OMAP4/5 ARM: tegra: Tegra114 needs CPU_FREQ_TABLE ARM: default machine descriptor for multiplatform Signed-off-by: Olof Johansson <olof@lixom.net>
2013-05-09Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds
Pull removal of GENERIC_GPIO from Grant Likely: "GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it is possible to do so which has been causing confusion and breakage. This branch does the work to completely eliminate GENERIC_GPIO." * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: gpio: update gpio Chinese documentation Remove GENERIC_GPIO config option Convert selectors of GENERIC_GPIO to GPIOLIB blackfin: force use of gpiolib m68k: coldfire: use gpiolib mips: pnx833x: remove requirement for GENERIC_GPIO openrisc: default GENERIC_GPIO to false avr32: default GENERIC_GPIO to false xtensa: remove explicit selection of GENERIC_GPIO sh: replace CONFIG_GENERIC_GPIO by CONFIG_GPIOLIB powerpc: remove redundant GENERIC_GPIO selection unicore32: default GENERIC_GPIO to false unicore32: remove unneeded select GENERIC_GPIO arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB arm: remove redundant GENERIC_GPIO selection mips: alchemy: require gpiolib mips: txx9: change GENERIC_GPIO to GPIOLIB mips: loongson: use GPIO driver on CONFIG_GPIOLIB mips: remove redundant GENERIC_GPIO select
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-13 22:45:37 +0000