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The pcie dts node is dulicated, remove none-used one.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
(cherry picked from commit c8b814b448d9ab3485d1f6c146da6dff03c63706)
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Fix IPU2 DI(Display Interface) clocks for iMX6QP SABRESD. The upstream
version uses ldb_di0_podf and ldb_di1_podf as clock parents for ipu_di,
which fails to work on iMX6QP SABRESD. This patch fixes clock tree by:
- setting ipu_di selectors to ldb_di_div_sel in imx6q clock driver
- matching "ldb_di0", "ldb_di1" clock names with
IMX6QDL_CLK_LDB_DI0_DIV_SEL, IMX6QDL_CLK_LDB_DI1_DIV_SEL; otherwise,
ldb_di0_div_sel and ldb_di1_div_sel will not be recognized as LDB clk parents
and will not drive the Display Interface.
Signed-off-by: Cristina Ciocan <cristina-mihaela.ciocan@nxp.com>
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In order to pass the pcie gen2 electronic compliance
tests, the external oscillator is manatory required.
Enable pcie external osc support on imx6qp platforms
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
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Add dtsi and dts file for i.MX6QP
Signed-off-by: Bai Ping <b51503@freescale.com>
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I.MX6Quad Plus has a slightly different version of PCIe core than reqular
i.MX6Quad.
Tested-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
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The i.MX6Quad Plus processor is an high performance SOC of i.MX6 family.
It has enhanced graphics performance and increased overall memory bandwidth
compared to i.MX6Q. Most of the design are same as i.MX6Quad/Dual, so code
for i.MX6Quad can be resued by this chip. The revision number is identied as
i.MX6Q Rev2.0, but actually it is a new chip, as we did many change to the
overall architecture.
This patch adds basic dtsi file support for the new i.MX6Quad Plus processor.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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