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According to the datasheet the SPI clock (for read) must not exceed
1 / 55ns for i.MX6Q/D and 1 / 43ns for i.MX6DL/S.
Reflect that correctly in the device tree.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronize with imx6dl-colibri-eval-v3.dts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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The invalid value of #address-cells in the imx6 pcie host controller node
causes of_irq_parse_raw() to incorrectly advance through an interrupt-map
table of more than one interrupt. We also take the opportunity to drop the
unused #size-cells here.
This patch resolves this issue and allows proper interrupt mapping for an
imx6 pcie host connected to a P2P bridge when using legacy interrupts.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-samsung-soc <linux-samsung-soc@vger.kernel.org>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: linux-tegra <linux-tegra@vger.kernel.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@linaro.org>
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This stream-lines the drive strength pad settings across both the MMC
and the SD slots.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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This adds explicit okay status' to adv7180 and max9526 nodes to be more
in-line with the Evaluation board device-tree.
Please note that this does not have any functional effect as by default
any node is enabled anyway.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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This fixes the Ethernet PHY reset and interrupt handling.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Clarify exact Apalis iMX6Q/D module type and Ixora carrier board in
model node.
While at it also make sure the compatible node fits into 80 char length
lines.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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The ldb driver which controls the LVDS output got heavily overhauled and
its configuration from the cmdline seem no longer working.
This adds a configuration to the device tree which can be activated from the
cmdline with:
video=mxcfb0:dev=ldb
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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We do provide the line in jack, so add it in the routing.
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This allows for easier disabling of unused cameras.
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Increase SPEED field from 50MHz to 100MHz the avoid pixel flickering on RGB666 at Full HD resolutions.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
(cherry picked from commit a700491ac9cc18d27ddfadee3a7787039485ed40)
Conflicts:
arch/arm/boot/dts/imx6qdl-colibri.dtsi
commit 5202ebd189bac35987bf79335fe4568aabbf2b0e:
The capacitive touch 10" display does react badly react badly to the
current pad control settings.
E.g. only the upper half of the display was somewhat readable with the
lower half being whitish.
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While at it cleanup node names.
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Use commit e11011a0578101b2f0f9a066d13beeb2c2da5fcc on all device-trees:
Rather than defining our own KEY_WAKEUP include the official input
dt-bindings.
While at it update copyright date range as well.
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Prepare for the needed changes to use the capacitive touch controller
on Fusion F07, Fusion F10A displays.
In order to use it uncomment the define PCAP and recompile and deploy
the device tree
Forward port of 3.10.17, commit e5925f53b4c6021d03a7a694d0512712036e83e6
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Use USBC_DET feature of Standard Colibri SODIMM pin 137 for USB
device/host switching using the generic extcon USB GPIO implementation.
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Rather than defining our own KEY_WAKEUP include the official input
dt-bindings.
While at it update copyright date range as well.
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Use consistently MXM3<space><number> or SODIMM<space><number>
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rename imx6q-apalis-eval_v1_0.dtb to imx6q-apalis_v1_0-eval.dtb
The v1_0 denotes the Apalis module version, not the evaluation board version.
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The WEIM signals are not accessible so remove the driver from the config and
set it to disabled in the device tree.
(cherry picked from commit 6c2f7b22f5aa9572d35a3ddd7d14b653cf606550)
Conflicts:
arch/arm/configs/apalis_imx6_defconfig
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gst-inspect mfw_v4lsrc
gst-launch mfw_v4lsrc capture-mode=5 device=/dev/video2 ! mfw_v4lsink
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In imx6sl/sx dts, the lcdif display bpp is setting to 16,
and sii902x hdmi driver bpp is 32.
The sii902x driver will overwrite the display bpp when it loading,
but some module such as v4l2 output driver is misses bpp change event.
So align sii902x hdmi driver bpp with lcdif display bpp.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit 0fd274cc93a71c8636551c17d7d4157e97fe5cf2)
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default
SDb WP pin is not connected by default on MX6Q CPU2 board, so we removed it
in DTS file. BTW, SDb slot is designed for WiFi slot, it is ok to disable WP
for old CPU board also.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 2efa09eb28d7404933725bc25b528641a9dc10f9)
(cherry picked from commit dd6e28f2932284494c89bb4897ad84c01db969d8)
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Fix the clock index for cfg clock and use MACRO instead of hard-codes.
This patch fixes the following issue.
-----------------------------------------------------------
root@imx6qdlsolo:~# /unit_tests/mxc_v4l2_capture.out -d /dev/video1 1.yuv
in_width = 176, in_height = 144
out_width = 176, out_height = 144
top = 0, left = 0
mipi csi2 can not receive sensor clk!
...
ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0
VIDIOC_DQBUF failed.ERROR: v4l2 capture: VIDIOC_QBUF: buffer already queued
-----------------------------------------------------------
Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit 6e4ee449de591d3cfb93575ca639ca32944832bc)
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-Add vadc to generic pm domain
-Add vadc clk to dispmix management
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit 9c3199fa95d0b219234b511c364f6a9d4aec75cd)
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since the pcie is power-ed by disp_mix domain,
add disp_mix domain into pcie device node.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
(cherry picked from commit 9ba62b896a873bf35df95b7d1c899021f3d7e9d6)
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enable imx6qdl pcie support on imx_3.14 kernel
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
(cherry picked from commit 87326992bc29c36abdd3c8a23f8766cfa136ab37)
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Add support to leave PLL1 enabled since its required whenever ARM-PODF is
changed. With this patch PLL1 is set to bypassed mode (and enabled) whenever
ARM is sourced from step_clk.
Also change imx6dl.dtsi to use #defines instead of hard-coded numbers for
busfreq clocks.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
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Add hwrng support for i.MX6SL.
1. Add RNG driver. This driver originated as fsl-rngc.c. It
has been modified to support device tree. The name has been
changed since it supports both b and c variants of RNG.
2. Added clock and compatible info to the device tree data.
3. Added the entry in the options in the Kconfig for hwrng.
(cherry picked from commit 1f3f2c0647b7319c4e23293a61512e4191593513)
[<vicki.milhoan@freescale.com>: Edited to apply to 3.14]
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit 586166b87eee2e5ec40331032aed8c8eaec884f3)
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LDO2p5 cannot be disabled in low power idle mode when the USB driver
enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy
regulator that the USB driver will enable when VBUS wakeup is required.
This patch is copied from commit 7d849e4d9ebca3c as code the structure has
changed too many. directly cherry-pick has too many conflicts to resolve
Signed-off-by: Bai Ping <b51503@freescale.com>
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(cherry-pick from f9759787e60ad3422d2119f9f25ac320ca58f5df)
confilict: arch/arm/boot/dts/imx6sx.dtsi
The dts file arch has changed in 3.14. Add QoS description in
imx6sx dts manually and solve the conflict.
Date Feb 2, 2015
Signed-off-by: Shawn Xiao <b49994@freescale.com>
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Remove csi1_v4l2_cap item from imx6sx-sdb-lcdif.dts file.
The item is not used in dts now.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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-Sii902x hdmi daughter connect to lcdif1 interface,
move this function to lcdif1 dts.
-Sii902x hdmi driver share the reset pin with ov5640 driver,
one driver will been reset by the other driver,
so move sii902x reset pin configure to licdif1 dts.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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The cause is EPDC works not stable if DISP mix is enabled.
Signed-off-by: Robby Cai <r63905@freescale.com>
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disable gpmi nand module in imx6qdl default dts since it conflicts with
uart3
Signed-off-by: Allen Xu <b45815@freescale.com>
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Clean up enet property and enebale enet2 multi-queue.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Enable sii902x driver in imx6sl/sx board
Signed-off-by: Sandor Yu <R01008@freescale.com>
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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Add egalax touch to i2c2 bus, which can make lvds0 touch screen
work.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Use macros instead of numbers to represent CAAM clocks in the
imx6sx device tree source.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
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This patch adds the imx6qdl.dtsi DTS support for crypto/caam. CAAM
clocking support is also included.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
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