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change regulator-init-microvolt for ams-as3722.
Bug 1634862
Change-Id: Ie4b9d1976fca9f8bdebfb039ef2c0337e1b55dfd
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/794739
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
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dap2_sclk direction should be input to
take care of the bidirectional nature of the clk
for codec as master and interface as master
Bug 1643925
Change-Id: Iab4f1a30edd3542fbfc0e1f53dd6ea9f604ed42f
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/778298
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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psci status node should also be checked along with
compatible node to enable secure fimrware
Bug 200124907
Change-Id: Ieb336bc7d1cc2c68d94157222770a6da6a8dcfd1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/772755
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Added AR0261 sensor support
Bug 200089114
Signed-off-by: Tushar Khinvasara <tkhinvasara@nvidia.com>
Change-Id: I8f6d6c6ea4905d9087fd6281bc8b215ec0a73fdb
Reviewed-on: http://git-master/r/741716
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ming Wong <miwong@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Bug 200044433
Change-Id: I792062649c247229270678a44d10323d2744b569
Signed-off-by: Kassey Li <kasseyl@nvidia.com>
Reviewed-on: http://git-master/r/721561
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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This patch adds MIPI CSI/DSIB pad control mux register
from the APB misc block to tegra pinctrl.
Without writing to this register, the dsib pads are
muxed as csi, and cannot be used.
The register is not yet documented in the TRM, here is
the description:
70000820: APB_MISC_GP_MIPI_PAD_CTRL_0
[31:02] RESERVED
[01:01] DSIB_MODE [CSI=0,DSIB=1]
[00:00] RESERVED
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
BUG=chrome-os-partner:30799
TEST=Tested on ryu
(cherry picked from commit 489c8251776de8838547207acce199f50846ded1)
Change-Id: I424f488131e51ac793814d98d018162f0644509e
Reviewed-on: https://chromium-review.googlesource.com/219832
Reviewed-on: http://git-master/r/668725
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/723409
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Updates based on v11 of Jetson_TK1_customer_pinmux.xlsm
configure pee2 as gpio
Added CSI_CD/DSI_B Muxing Option
Disable open drain for pwr_i2c
Bug 1551864
Change-Id: I708505e8664cbb56b7b4ac32e14e2e20618a3114
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/707204
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Bug 1598204
Change-Id: I453d18ce570e57c0feab8dc3b24cc2c957b95301
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/672147
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Bug 1600299
Change-Id: I63f4d597bcc8b960407a7291fde6aa2ddb5bec25
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/674099
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Set Sata Enable to output High to get sata working
Bug 1551864
Bug 200070681
Change-Id: Ifb01377df3f597304b303487f91a26053e2f1fb6
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/670552
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Change-Id: I1c00d571e294ccf1c4d795bb90e71defd3395293
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/591333
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
(cherry picked from commit b87d110ddc52048944862fb8bf019922333b1dd5)
Reviewed-on: http://git-master/r/665999
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>
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Bug 200062768
Change-Id: I18211dfd4735c868a03bbc62d7f9cea4d0d1af05
Signed-off-by: Jitendra Kumar <jitendrak@nvidia.com>
Reviewed-on: http://git-master/r/662717
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Bug 1557711
Change-Id: I25dd3b4efb8e25c010f0173b8509785ebb9a9a3d
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/662418
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Update pinmux for jetson-tk1 based on
Jetson_TK1_customer_pinmux.xlsm V08
Bug 1551864
Change-Id: I3caee3e1485c95ff1a72b43529aa3c105397b5ac
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/655141
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Added DVFS support for CD575MI SKU 0x80 always on personality
CPU DVFS: Max Freq 1912Mhz. Switch to PLLX below 0 DegC
and fixed voltage
SOC DVFS: Vmax 1000mv constant. Lesser freq below 0 DegC
EMC dvfs max freq 792Mhz
GPU DVFS: Max Freq 756Mhz and thermal bump up of voltage
by 50mv below 0 DegC
Bug 1563635
Change-Id: Ifa66f4d9905be120a3534acd8f3ab9c2b58eea37
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/557951
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Bug 1552628
Bug 1576621
Change-Id: Icc881724f0e4e5c0346aa44ffeb80dc8d498919c
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/598929
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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add support for dual ar0330
Bug 1552628
Change-Id: I6ccd6ea0886f17710de3e241c408788cc608dce9
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/558147
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Add ar0261 and ar0330 in the dts
Bug 1552628
Change-Id: I341c979f7980f3635b28cd24f2b2295375096430
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/562569
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Added NVD9A951 camera module support for Jetson TK1.
Bug 1359310
Change-Id: I5be95fdf16de00fe662f20f52ded9de16aa4aa4e
Signed-off-by: Tushar Khinvasara <tkhinvasara@nvidia.com>
Signed-off-by: Mihir Thakkar <mthakkar@nvidia.com>
Reviewed-on: http://git-master/r/555463
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Adds tegra124-pm359-camera-a00.dtsi file and
support for camera module NVD9A951 which consists of
imx135 sensor and dw9718 focuser.
Bug 1359310
Change-Id: I6b377255471566a1e95b2ace8c3f18c5aa230c3f
Signed-off-by: Tushar Khinvasara <tkhinvasara@nvidia.com>
Signed-off-by: Mihir Thakkar <mthakkar@nvidia.com>
Reviewed-on: http://git-master/r/555462
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Continuous press & release of power key during resume
cause power key to generate continious interrupt
leading to hang of device. So add debounce time
Bug 200037478
Change-Id: Ia3081700af3291813450dda7205f842f511e63db
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/499296
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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PMC should be suspended as soon as interrupt-
controller bus is suspended so that no wake signal
is entertained in between leading to abnormal
system behaviour
Bug 200036432
Change-Id: I4de7462a8c0588f8cecde270a97c39040748a4b6
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/498280
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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Move the pimx DT node before gpio node to make sure that
pinmux get registered before the gpio.
Bug 200033491
Change-Id: I55d5a5c1a1570c16d8332ba224e0ed9a1f7c257c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/412630
(cherry picked from commit 463019f3158b58906f5b4c81463e5b0b1067576f)
Reviewed-on: http://git-master/r/498813
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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Bug 200010474
Change-Id: I7c7090c96c9ab5ac5cd3bfd280a3723cfe123ed1
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/441115
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Fix a kernel panic seen on t132ref caused by
find_vdd_map_entry() returning 0.
bug 1522642
Change-Id: Ib132b9feeb85a7b7bacfa7aeceb646aa89d54ece
Signed-off-by: Zheng Liu <zhliu@nvidia.com>
Reviewed-on: http://git-master/r/440520
GVS: Gerrit_Virtual_Submit
Tested-by: Mike Thompson <mikthompson@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Support HS200 on SDMMC4.
Bug 200000521
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/428765
(cherry picked from commit 3784a9ea0ed50b9044e6a7c4adb96b887e19f627)
Change-Id: Ie334b7c303d5e243c7090b601b5ff32822f578d4
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/433891
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
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New release DVFS table generated by
EMC_REG_CAL_V5.0.18
bug 1521750
Change-Id: Ib06001da111e22f0d9ab53d32e8e1adb45e6fbe8
Signed-off-by: Robert Shih <rshih@nvidia.com>
Reviewed-on: http://git-master/r/427216
(cherry picked from commit 580db20a208c9a600db35754e958824704f4b69c)
Reviewed-on: http://git-master/r/432482
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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This commit removes laguna comptability strings for
jetson-tk1 boards.
bug 1509239
Change-Id: Ifef547aa19f479c3adc03cc7c3557aa9372e1cb2
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: http://git-master/r/406015
(cherry picked from commit ff3d39e0cef851b60d11106db68bdccd2f37c646)
Reviewed-on: http://git-master/r/426781
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Lowered VDD_CPU minimum limit for PMICs used on Tegra13 platforms to
650mV (from 700mV).
Bug 1511506
Change-Id: Ib8c51f75a5a1582aa8c0117ee05ed044de5894a9
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/424905
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
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For all SDMMC controllers, E_INPUT of CLK pad should be
enabled since loopback CLK (Zi of CLK pad) is used to
latch RESP/DATA coming from external device.
If not enabled, you will see RESP/DATA time outs.
Bug 1521217
Change-Id: I66e9bb98d1d1740fc519001f93d45a7baaba46fa
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/426671
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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It is from characterization team's request since there is no rtc tracking
in TN8.
Bug 1519080
Change-Id: Ic773aac0bcd443723dba498488a8b5864db1b36b
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/419840
(cherry picked from commit dff02e75865cd08e8bbdd69574b3610bfbc49259)
Reviewed-on: http://git-master/r/421372
Signed-off-by: Jiukai Ma <jiukaim@nvidia.com>
Reviewed-on: http://git-master/r/424037
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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update address/size of memory-controller
node to 64 bit
Bug 1396089
Change-Id: I1d83959edf990a7d2a179152ac07aa9c87ff903c
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/416393
(cherry picked from commit 2bf9ad2147e328c073fad29e0f8e80d65f173fcf)
Reviewed-on: http://git-master/r/423808
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Enable ac_ok_mask for OC_PG signal
Bug 1518725
Bug 1419425
Change-Id: Ief0ab18d80551b2f4c55090bcccf1f3c573569c8
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423037
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
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AS3722 sd4 regulator is not OTP programmed. So by default
voltage is 0. We need to provide initial minV and maxV so
as to initialize the regulator properly.
Bug 1454868
Change-Id: I004cee04f97e49ab22f680970bdf8c1941f5e3f1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/420636
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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into promotion_build
Change-Id: I9418a05ad5c56b2e902249218bac2fa594d99f56
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pcie is not available in all the platforms based
on T124 or T132. So, by default keep it disabled.
Otherwise there are probe errors seen
Bug 1518254
Change-Id: Id869a36dcbb8b46434d91c4f1c1ad4ed5a37c63b
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/418724
(cherry picked from commit d2238db744c35a539d1f219b5c57bc8949d6cd73)
Reviewed-on: http://git-master/r/420375
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Pass correct values for maximum detection range and
power consumed in milli Amps.
Bug 1503943
Change-Id: I78903fc777ceb56aeca6c1fa5b70412be4850a67
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/415397
(cherry picked from commit 3158de305a6543b2f33ecf8e125a6661df872694)
Reviewed-on: http://git-master/r/419965
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Update PMC values to realistic values proven working
for laguna_t124.
Bug 1501662
Change-Id: I0feb7a6ecee075b6c7115c046cbabe82395ade41
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/411458
(cherry picked from commit a7a43726e6509200042478d9f24ae57c4256a06d)
Reviewed-on: http://git-master/r/419484
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Many GPIOs registered as interrupt are not applicable for PM375,
new file added for PM375 to support GPIOs which are applicable for
PM375.
Added file: tegra124-jetson_tk1-keys-pm375-0000-c00-00.dtsi
Bug 1475519
Change-Id: Ic7cdae2afa43751b3ba045f08c62dbb2c36b6562
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/382467
Cherry-picked from 72c6e07c4757f00697316b39c61e8dd0fa3ccb59
Reviewed-on: http://git-master/r/403369
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
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When touch rail get enabled, there is chances of parent rail to be
short and drop the voltage output of parent rail to be 0V. This can
cause the malfunctioning of system which depends on parent rail.
Add the SW-WAR for enabling touch rail on P1761-A03 designs.
- Enable LDO3 (3.3V) to load switch output.
- Enable load switch and then disable parent rail.
bug 1494740
Change-Id: I283438f421fa72a284bbb8a539c59d0bffee911c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/418247
(cherry picked from commit e77e1c375c9d6fd27a162c338ce67a106c5a3fc6)
Reviewed-on: http://git-master/r/419341
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
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comment from system engineering:
Since the maximum input voltage of the BQ2419x is 17V
it is safe to set the maximum voltage to 16V for all
platforms. 15V is too low. 17V leaves less margin.
voltage reduced to 16V
(cherry picked from commit 7a5749bcbbf9f563690d30f80790a1c678f395c5)
Change-Id: I71632197b6d9ca962250623e5575350adf7b7782
Reviewed-on: http://git-master/r/417480
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/418807
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Bug 1466561
Change-Id: I4ce0962a48465a0423c883b41103bdc885ceaa0d
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/418144
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
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Bug 200004122
Conflicts:
drivers/cpufreq/cpufreq.c
drivers/regulator/core.c
sound/soc/codecs/max98090.c
Change-Id: I9418a05ad5c56b2e902249218bac2fa594d99f56
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
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new maxim wall charger can be programmed to handle up to
20v output. Tegra cannot handle loads this high.
define a device tree entry that allows the maximum
board voltage to be known.
bug 1321188
bug 1456402
bug 1459867
(cherry picked from commit db194a402ced2dc582fadcc1aa71155391e1b3d6)
Change-Id: Ibb418dfac64bf226e026c9ec4a0fa6cafc4a5c6e
Reviewed-on: http://git-master/r/409830
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/417039
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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It is observed that there is huge amount of debounce on the
signal of transtion when smart cover flipped.
Keep the safe value of debounce time of the signal from sensor to
200ms.
bug 200005902
Change-Id: Ic232f832c0ddb7da468ba8aa432985bdba1210e1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/416628
Reviewed-on: http://git-master/r/417767
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- Touch regulator for P1761 A03 is ldousb.
Change-Id: I39aea58540d8795c20305eef976536632bc56672
Signed-off-by: Jordan Nien <jnien@nvidia.com>
Reviewed-on: http://git-master/r/416004
(cherry picked from commit b68f6794d0eaeb43aece0422008d23e46ca915b0)
Reviewed-on: http://git-master/r/416972
Reviewed-by: Alex Chen <alchen@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
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No need to pull up/down for touch INT per Raydium suggestion.
Bug 200002716
Change-Id: I52f4543916637eec8224557fd450e29273e8b3b2
Signed-off-by: Jordan Nien <jnien@nvidia.com>
Reviewed-on: http://git-master/r/412997
(cherry picked from commit 023b46f87d6d251ca7a4d51ea6f2fcd92325babf)
Reviewed-on: http://git-master/r/414796
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Chen <alchen@nvidia.com>
Reviewed-by: Tony Hsiao <thsiao@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
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initrd_start and size should be decided by bootloader.
No need to hardcode in dts file.
Bug 200004406
Change-Id: Ic204b8d1a8a45a46729fd3560ad3622640f5d01d
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/410672
(cherry picked from commit da686c9e12a72f4dbbf76687f0a0535bcceecb3d)
Reviewed-on: http://git-master/r/411912
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Enable seamless mode for tn8 panel
Bug 1454698
Bug 1493541
Change-Id: Ibd1586d1c445e19e69f37fb44f910de6ebcdf647
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/401239
(cherry picked from commit 5faa10bb038a97d2f5133d79173e015081ddf68b)
Reviewed-on: http://git-master/r/416041
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
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Disable lock property for USB pins as the regulator
is enabled disabled using that pin as fixed regulator
Bug 200006135
Change-Id: I168f999abb9e794c18e94151b7d1c65692fadb5b
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/416476
Tested-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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