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2012-05-24ARM: CPU hotplug: fix abuse of irqdesc->nodeRussell King
irqdesc's node member is supposed to mark the numa node number for the interrupt. Our use of it is non-standard. Remove this, replacing the functionality with a test of the affinity mask. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-30Merge remote branch 'fsl-linux-sdk/imx_3.0.15' into imx_3.0.15_4.6.6Xinyu Chen
Conflicts: arch/arm/configs/imx6_defconfig arch/arm/configs/imx6_updater_defconfig arch/arm/mach-mx6/board-mx6q_sabreauto.c arch/arm/mach-mx6/board-mx6q_sabresd.c arch/arm/mach-mx6/clock.c arch/arm/mach-mx6/localtimer.c drivers/cpufreq/Makefile drivers/cpufreq/cpufreq_interactive.c drivers/input/keyboard/gpio_keys.c drivers/media/video/mxc/capture/Kconfig drivers/media/video/mxc/capture/mxc_v4l2_capture.c drivers/mmc/card/block.c drivers/mmc/host/sdhci-esdhc-imx.c drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c drivers/usb/otg/fsl_otg.c drivers/video/mxc/mxc_ipuv3_fb.c include/linux/fsl_devices.h include/linux/mmc/host.h sound/soc/imx/Kconfig sound/soc/imx/Makefile sound/soc/imx/imx-hdmi-dma.c sound/soc/imx/imx-wm8958.c
2012-03-26ENGR00177757 Fix suspend/resume issue when enable localtimerAnson Huang
Need to disable localtimer's PPI when suspend, or ARM core will run into exception when resume. Signed-off-by: Anson Huang <b20788@freescale.com>
2012-02-02Merge branch 'android-3.0' into imx_3.0.15_androidXinyu Chen
Conflicts: drivers/misc/Kconfig drivers/misc/Makefile drivers/net/wireless/Makefile kernel/power/main.c sound/soc/soc-core.c
2012-01-09ENGR00156314-2 [mx6q]gic: save/restore mode for suspend/resumeTony Lin
add code to gic.c for common gic state save/restore. Signed-off-by: Tony Lin <tony.lin@freescale.com>
2012-01-09ENGR00154056-1 [MX6]Enable dormant modeAnson Huang
Enable dormant mode on MX6, need to re-init gic and l2 cache, so we must remove the gic init and l2 cache init routine's __INIT section. Signed-off-by: Anson Huang <b20788@freescale.com>
2011-11-14ARM: common: fiq_debugger: dump sysrq directly to console if enabledDima Zavin
If the fiq console is enabled, then don't filter the console output while sysrq command is in progress. Change-Id: I9389d757373a5fdca5cbf61f0723667510d3ae88
2011-11-14ARM: common: fiq_debugger: add irq context debug functionsDima Zavin
This code is moved here from the drivers/misc/kernel_debugger. Change-Id: Iccf21c4313a8516a917125ca93f64baa5f354228 Signed-off-by: Dima Zavin <dima@android.com>
2011-10-28ARM: common: fiq_debugger: make uart irq be no_suspendDima Zavin
Change-Id: I8e3d2a95c0ddc2706b021cd33534fe2fd302268e Signed-off-by: Dima Zavin <dima@android.com>
2011-10-25ARM: common: fiq_debugger: protect the uart state from the sleep timerDima Zavin
Change-Id: I6b834d5cab96c3466042f758feb69eae6893ec49 Signed-off-by: Dima Zavin <dima@android.com>
2011-10-25ARM: common: fiq_debugger: add suspend/resume handlersDima Zavin
Change-Id: If6eb75059fdf4867eb9a974d60b9d50e5e3350d4 Signed-off-by: Dima Zavin <dima@android.com>
2011-10-25ARM: common: fiq_debugger: add uart_enable/disable platform callbacksDima Zavin
This allows the platform specific drivers to properly enable and disable the uart at the appropriate times. On some platforms, just managing the clock is not enough. Change-Id: I5feaab04cfe313a4a9470ca274838676b9684201 Signed-off-by: Dima Zavin <dima@android.com>
2011-10-25ARM: common: fiq_debugger: add non-fiq debugger supportDima Zavin
Add irq-only support to the debugger. This allows the debugger to always run at irq context. This introduces limitations to being able to debug certain kinds of issues, but it is still very useful as a debugging tool. Change-Id: I1e4223e886cb2d90ef5ed31419bdd5cdd7f904ca Signed-off-by: Dima Zavin <dima@android.com>
2011-10-25ARM: common: fiq_debugger: peek the 0th char in ringbufDima Zavin
ringbuf_consume advances the tail ptr, so peek should always just peek at offset 0 Change-Id: I8d3d22d2ec1e563d73b53ccbad302e6d74e64e53 Signed-off-by: Dima Zavin <dima@android.com>
2011-10-25ARM: common: fiq_debugger: fix the cleanup on errors in probeDima Zavin
Change-Id: I58bd0604c0520b13e11bf02836eb4ddbadba1372 Signed-off-by: Dima Zavin <dima@android.com>
2011-10-25ARM: common: fiq_debugger: do not disable debug when console is enabledDima Zavin
Change-Id: I5f8074a860f9b143ee0c87296683bbf2cffb5a36 Signed-off-by: Dima Zavin <dima@android.com>
2011-07-12Merge commit 'v3.0-rc7' into android-3.0Colin Cross
2011-07-03ARM: dmabounce: fix map_single() error return valueRussell King
When map_single() is unable to obtain a safe buffer, we must return the dma_addr_t error value, which is ~0 rather than 0. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-14ARM: common: fiq_debugger: Fix build for 2.6.39 irq changesColin Cross
Signed-off-by: Colin Cross <ccross@android.com> Change-Id: I68147c0a17f9cd1b7693826754edc55b1bb09592
2011-06-14ARM: fiq_debugger: Add help commandDmitry Shmidt
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
2011-06-14ARM: fiq_debugger: make fiq_debugger be in debug mode by defaultDima Zavin
Adds a config option that controls whether or not the console is on at boot, defaulting to no. Change-Id: Id4a3cad1c9dd4fb3c2b8c2298ca5d385a8bd0f8d Signed-off-by: Dima Zavin <dima@android.com>
2011-06-14[ARM] fiq_debugger: Print local timer irqs countRebecca Schultz Zavin
Prints the number of local timer irqs on each cpu when the irqs command is executed. Change-Id: Ic70fa9f528d98996fabb2d0cc80e937c5b239c1a Signed-off-by: Rebecca Schultz Zavin <rebecca@android.com>
2011-06-14[ARM] fiq glue: Align fiq stacksColin Cross
Change-Id: I956f05d0b0ce48572e611765e56a439dc036c052 Signed-off-by: Colin Cross <ccross@android.com>
2011-06-14[ARM] fiq debugger: Allow selection of target cpuColin Cross
Change-Id: I676bac08ba12dfa506aea16800fc80432b4bc83d Signed-off-by: Colin Cross <ccross@android.com>
2011-06-14ARM: fiq debugger: Add tty to fiq debuggerColin Cross
Change-Id: I80347cdb70cda104b96562c63f972c1f217e3822 Signed-off-by: Colin Cross <ccross@google.com>
2011-06-14ARM: Add generic fiq serial debuggerIliyan Malchev
Change-Id: Ibb536c88f0dbaf4766d0599296907e35e42cbfd6 Signed-off-by: Iliyan Malchev <malchev@google.com> Signed-off-by: Arve Hjønnevåg <arve@android.com>
2011-06-14ARM: Add fiq_glueArve Hjønnevåg
Change-Id: I27d2554e07d9de204e0a06696d38db51608d9f6b Signed-off-by: Arve Hjønnevåg <arve@android.com> Signed-off-by: Colin Cross <ccross@android.com>
2011-05-25Merge branch 'for-rmk' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable Conflicts: arch/arm/Kconfig arch/arm/mach-exynos4/mach-nuri.c
2011-05-23Merge branch 'devel-stable' into for-linusRussell King
Conflicts: arch/arm/Kconfig arch/arm/mach-ns9xxx/include/mach/uncompress.h
2011-05-23Merge branches 'consolidate-clksrc', 'consolidate-flash', ↵Russell King
'consolidate-generic', 'consolidate-smp', 'consolidate-stmp' and 'consolidate-zones' into consolidate
2011-05-23clockevents: ARM sp804: obtain sp804 timer rate via clksRussell King
This allows platforms to specify the rate of the SP804 clockevent via the clk subsystem. While ARM boards clock these at 1MHz, BCMRing also has SP804 timers but are clocked at different rates. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23clockevents: ARM sp804: allow clockevent name to be specifiedRussell King
This allows platforms to specify the clcokevent name upon registration. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23clocksource: ARM sp804: obtain sp804 timer rate via clksRussell King
This allows platforms to specify the rate of the SP804 clocksource via the clk subsystem. While ARM boards clock these at 1MHz, BCMRing also has SP804 timers but are clocked at different rates. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23clocksource: ARM sp804: allow clocksource name to be specifiedRussell King
This allows platforms to specify the clocksource name upon registration, which is necessary should they wish to register more than one sp804 clocksource. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23clocksource: convert ARM 32-bit down counting clocksourcesRussell King
Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources to generic mmio clocksource infrastructure. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-12ARM: use ARM_DMA_ZONE_SIZE to adjust the zone sizesRussell King
Rather than each platform providing its own function to adjust the zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this adjustment. This ensures that the actual DMA zone size and the ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with each other, and moves this complexity out of the platform code. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-12ARM: S5P6442: Removing ARCH_S5P6442Kukjin Kim
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-05-11ARM: GIC: Convert GIC library to use the IO relaxed operationsSantosh Shilimkar
The GIC register accesses today make use of readl()/writel() which prove to be very expensive when used along with mandatory barriers. This mandatory barriers also introduces an un-necessary and expensive l2x0_sync() operation. On Cortex-A9 MP cores, GIC IO accesses from CPU are direct and doesn't go through L2X0 write buffer. A DSB before writel_relaxed() in gic_raise_softirq() is added to be compliant with the Barrier Litmus document - the mailbox scenario. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com>
2011-05-11ARM: gic: use handle_fasteoi_irq for SPIsWill Deacon
Currently, the gic uses handle_level_irq for handling SPIs (Shared Peripheral Interrupts), requiring active interrupts to be masked at the distributor level during IRQ handling. On a virtualised system, only the CPU interfaces are virtualised in hardware. Accesses to the distributor must be trapped by the hypervisor, adding latency to the critical interrupt path in Linux. This patch modifies the GIC code to use handle_fasteoi_irq for handling interrupts, which only requires us to signal EOI to the CPU interface when handling is complete. Cascaded IRQ handling is also updated to use the chained IRQ enter/exit functions to honour the flow control of the parent chip. Note that commit 846afbd1 ("GIC: Dont disable INT in ack callback") broke cascading interrupts by forgetting to add IRQ masking. This is no longer an issue because the unmask call is now unnecessary. Tested on Versatile Express and Realview EB (1176 w/ cascaded GICs). Tested-and-reviewed-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Tested-and-acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-04-24ARM: Use struct syscore_ops instead of sysdevs for PM in common codeRafael J. Wysocki
Convert some ARM architecture's common code to using struct syscore_ops objects for power management instead of sysdev classes and sysdevs. This simplifies the code and reduces the kernel's memory footprint. It also is necessary for removing sysdevs from the kernel entirely in the future. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-04-13Merge branch 'fix' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into fixes
2011-04-10ARM: 6872/1: arch:common:Makefile Remove unused config in the Makefile.Justin P. Mattock
The patch below removes an unused config variable found by using a kernel cleanup script. Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-31Fix common misspellingsLucas De Marchi
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-29arm: Fold irq_set_chip/irq_set_handlerThomas Gleixner
Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29arm: Reorder irq_set_ function callsThomas Gleixner
Reorder irq_set_chip() irq_set_chip_data() irq_set_handler() to irq_set_chip() irq_set_handler() irq_set_chip_data() so the next patch can combine irq_set_chip() and irq_set_handler() to irq_set_chip_and_handler(). Automated conversion with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29arm: Cleanup the irq namespaceThomas Gleixner
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29arm: gic: Use proper accessor functionsThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-16Merge branch 'misc' into develRussell King
Conflicts: arch/arm/Kconfig
2011-03-09ARM: 6777/1: gic: Add hooks for architecture specific extensionsSantosh Shilimkar
Few architectures combine the GIC with an external interrupt controller. On such systems it may be necessary to update both the GIC registers and the external controller's registers to control IRQ behavior. This can be addressed in couple of possible methods. 1. Export common GIC routines along with 'struct irq_chip gic_chip' and allow architectures to have custom function by override. 2. Provide architecture specific function pointer hooks within GIC library and leave platforms to add the necessary code as part of these hooks. First one might be non-intrusive but have few shortcomings like arch needs to have there own custom gic library. Locks used should be common since it caters to same IRQs etc. Maintenance point of view also it leads to multiple file fixes. The second probably is cleaner and portable. It ensures that all the common GIC infrastructure is not touched and also provides archs to address their specific issue. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Colin Cross <ccross@android.com> Tested-by: Colin Cross <ccross@android.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-26ARM: 6762/1: Update number of VIC for S5P6442 and S5PC100Kukjin Kim
The S5P6442 and S5PC100 SoCs have 4 VICs. However, default VIC number is defined 2 in arch/arm/common. So can be happened some problem on it. Basically, it requires for suspend and resume. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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