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Makes it consistent with VMALLOC_START
Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Andreas Fenkart <andreas.fenkart@streamunlimited.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Otherwise more complicated uart configuration won't be possible.
We can use r1 for tmp register for both head.S and debug.S.
NOTE: This patch depends on another patch to add the the tmp register
into all debug-macro.S files. That can be done with:
$ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/"
arch/arm/*/include/*/debug-macro.S
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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PrPMC1100 is handled by IXDP425 platform code, there is no need for
duplicate set of macros. Remove them.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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IXP4xx CPUs can indirectly access the whole 4 GB PCI MMIO address space (using
the non-prefetch registers). Previously the available space depended on the CPU
variant, since one of the IXP43x platforms needed more than the usual 128 MB.
1 GB should be enough for everyone, and if not, we can trivially increase it.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Instead of including the heavy linux/mm.h for VMALLOC_START, test the addresses
against PCI MIN and MAX addresses. Indirect PCI uses 1:1 mapping for MMIO space
making this change possible.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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clarity.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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The indexes were signed, so negatives were possible.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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The repetitive in/out functions must preserve order, not value.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Clock generators used by IXP4xx processors are usually 33.333 MHz, sometimes
33.33 MHz and few platforms use 33 MHz. The timers tick twice as fast,
that means 66.666, 66.66 or 66 MHz. Current 66.666666 MHz means 10 ppm
offset from the usual 66.666 MHz.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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The body of the mach-ixp4xx arch_idle() is mysteriously
disabled by an #if 0 .. #endif. Normally one would expect
to find a call to cpu_do_idle() there, but that call is
disabled, even though cpu_do_idle() is implemented for
XScale cores (and ixp4xx is one).
The explanation can be found in the ixp42x developer's manual
which states that the XScale core clock and power management
registers aren't implemented on ixp42x [3.5.2.2].
Also, the disabled code has suffered from bit rot:
- it checks hlt_counter which is obsolete, as that variable
and all related code now is private to kernel/process.c
- it passes too many parameters to cpu_do_idle()
So this patch:
- adds a comment before the #if 0 to explain why
cpu_do_idle() mustn't be called on ixp4xx
- removes the obsolete test of hlt_counter and the
obsolete parameter to cpu_do_idle()
This is purely a documentation fixup and changes no
generated code. Even so, it has been tested on an
ixp420 machine (ds101).
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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2.6.31-rc kernels don't boot on my ixp4xx box (ds101), because the libata
driver doesn't find the PCI IDE controller any more. 2.6.30 was fine.
I traced this to a PCI update (1f82de10d6b1d845155363c895c552e61b36b51a)
in 2.6.30-git19. Diffing the kernel boot logs from 2.6.30-git18 and
2.6.30-git19 illustrates the breakage:
> --- dmesg-2.6.30-git18 2009-08-04 01:45:22.000000000 +0200
> +++ dmesg-2.6.30-git19 2009-08-04 01:45:46.000000000 +0200
> @@ -26,6 +26,13 @@
> pci 0000:00:02.2: PME# supported from D0 D1 D2 D3hot
> pci 0000:00:02.2: PME# disabled
> PCI: bus0: Fast back to back transfers disabled
> +pci 0000:00:01.0: BAR 0: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 1: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 2: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 3: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 4: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:02.0: BAR 4: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:02.1: BAR 4: can't allocate I/O resource [0x10000-0xffff]
> bio: create slab <bio-0> at 0
> SCSI subsystem initialized
> NET: Registered protocol family 2
> @@ -44,11 +51,7 @@
> console [ttyS0] enabled
> serial8250.0: ttyS1 at MMIO 0xc8001000 (irq = 13) is a XScale
> Driver 'sd' needs updating - please use bus_type methods
> -PCI: enabling device 0000:00:01.0 (0140 -> 0141)
> -scsi0 : pata_artop
> -scsi1 : pata_artop
> -ata1: PATA max UDMA/100 cmd 0x1050 ctl 0x1060 bmdma 0x1040 irq 28
> -ata2: PATA max UDMA/100 cmd 0x1058 ctl 0x1064 bmdma 0x1048 irq 28
> +pata_artop 0000:00:01.0: no available native port
> Using configured DiskOnChip probe address 0x50000000
> DiskOnChip found at 0x50000000
> NAND device: Manufacturer ID: 0x98, Chip ID: 0x73 (Toshiba NAND 16MiB 3,3V 8-bit)
The specific change in 1f82de10d6b1d845155363c895c552e61b36b51a responsible
for this failure turned out to be the following:
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -193,7 +193,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
> res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
> if (type == pci_bar_io) {
> l &= PCI_BASE_ADDRESS_IO_MASK;
> - mask = PCI_BASE_ADDRESS_IO_MASK & 0xffff;
> + mask = PCI_BASE_ADDRESS_IO_MASK & IO_SPACE_LIMIT;
> } else {
> l &= PCI_BASE_ADDRESS_MEM_MASK;
> mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
Every arch except arm's ixp4xx defines IO_SPACE_LIMIT as an all-bits-one
bitmask, typically -1UL but sometimes only a 16-bit 0x0000ffff. But ixp4xx
defines it as 0xffff0000, which is now causing the PCI failures.
Russell King noted that ixp4xx has 64KB PCI IO space, so IO_SPACE_LIMIT
should be 0x0000ffff. This patch makes that change, which fixes the PCI
failures on my ixp4xx box.
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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comments.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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OMAP wishes to pass state to the boot loader upon reboot in order to
instruct it whether to wait for USB-based reflashing or not. There is
already a facility to do this via the reboot() syscall, except we ignore
the string passed to machine_restart().
This patch fixes things to pass this string to arch_reset(). This means
that we keep the reboot mode limited to telling the kernel _how_ to
perform the reboot which should be independent of what we request the
boot loader to do.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (407 commits)
[ARM] pxafb: add support for overlay1 and overlay2 as framebuffer devices
[ARM] pxafb: cleanup of the timing checking code
[ARM] pxafb: cleanup of the color format manipulation code
[ARM] pxafb: add palette format support for LCCR4_PAL_FOR_3
[ARM] pxafb: add support for FBIOPAN_DISPLAY by dma braching
[ARM] pxafb: allow pxafb_set_par() to start from arbitrary yoffset
[ARM] pxafb: allow video memory size to be configurable
[ARM] pxa: add document on the MFP design and how to use it
[ARM] sa1100_wdt: don't assume CLOCK_TICK_RATE to be a constant
[ARM] rtc-sa1100: don't assume CLOCK_TICK_RATE to be a constant
[ARM] pxa/tavorevb: update board support (smartpanel LCD + keypad)
[ARM] pxa: Update eseries defconfig
[ARM] 5352/1: add w90p910-plat config file
[ARM] s3c: S3C options should depend on PLAT_S3C
[ARM] mv78xx0: implement GPIO and GPIO interrupt support
[ARM] Kirkwood: implement GPIO and GPIO interrupt support
[ARM] Orion: share GPIO IRQ handling code
[ARM] Orion: share GPIO handling code
[ARM] s3c: define __io using the typesafe version
[ARM] S3C64XX: Ensure CPU_V6 is selected
...
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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As Al did for Versatile in 2ad4f86b60b649fd7428265c08d73a3bd360c81b,
add a typesafe __io implementation for platforms to use. Convert
platforms to use this new simple typesafe implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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When ISA_DMA_API is unset, we're not implementing the ISA DMA API,
so there's no point in publishing the prototypes via asm/dma.h, nor
including the machine dependent parts of that API.
This allows us to remove a lot of mach/dma.h files which don't contain
any useful code. Unfortunately though, some platforms put their own
private non-ISA definitions into mach/dma.h, so we leave these behind
and fix the appropriate #include statments.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Move the definition of MAX_DMA_ADDRESS from mach/dma.h to mach/memory.h,
thereby placing it along side its relative, ISA_DMA_THRESHOLD.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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mach/io.h doesn't need linux/mm.h.
mach/dma.h doesn't need linux/device.h, asm/page.h or mach/hardware.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Let's provide an overridable default instead of having every machine
class define __virt_to_bus and __bus_to_virt to the same thing. What
most platforms are using is bus_addr == phys_addr so such is the default.
One exception is ebsa110 which has no DMA what so ever, so the actual
definition is not important except only for proper compilation. Also
added a comment about the special footbridge bus translation.
Let's also remove comments alluding to set_dma_addr which is not
(and should not) be commonly used.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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According to the documentation gpio_free should only be called from task
context only. To make this more explicit add a might sleep to all
implementations.
This patch changes the gpio_free implementations for the arm architecture.
DaVinci is skipped on purpose to simplify the merge process for patches
switching it over to use gpiolib as per request by David Brownell.
Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Cc: David Brownell <david-b@pacbell.net>
Cc: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add asm/cputype.h, moving functions and definitions from asm/system.h
there. Convert all users of 'processor_id' to the more efficient
read_cpuid_id() function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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