Age | Commit message (Collapse) | Author |
|
Fix the bug in Fuse read for VPU and GPU disablers of iMX53. The
disablers are located at Fuase Bank 0. Also need to enable the clks
before reading the IIM.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
Add Android RAM console cupport for iMX53 SMD and align the
imx5_android_defconfig with google's defconfig.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
Add fastboot and recovery methods with Android reboot
commands.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
Conflicts:
arch/arm/plat-mxc/dvfs_core.c
drivers/input/keyboard/mpr121.c
drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c
include/linux/i2c/mpr.h
sound/soc/imx/imx-wm8962.c
|
|
iMX53 SMD fails to resume since soc_regulator and pu_regulator
are non-existent and these regulator variable needs to be
init'ed to -ENODEV to avoid crash at wakeup.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
Port 3.0.35 linux kernel to iMX53 SMD for Jellybean bringup.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
* Fix imx_dma_data duplicate struct definition
* Rename struct as name conflicts with imx_dma_data
struct defined at arch/arm/plat-mxc/include/mach/dma.h
* Update copyrigth year.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
Add support for scaling the bus frequency (both DDR
and ahb_clk).
The DDR and AHB_CLK are dropped to 24MHz when all devices
that need high AHB frequency are disabled and the CORE
frequency is at the lowest setpoint.
The DDR is dropped to 400MHz for the video playback usecase.
In this mode the GPU, FEC, SATA etc are disabled.
To scale the bus frequency, its necessary that all cores
except the core that is executing the DDR frequency change
are in WFE. This is achieved by generating interrupts on
un-used interrupts (Int no 139, 144, 145 and 146).
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
The host driver needs to differentiate wakeup event.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
|
|
* Board mx53-ard cs42888 supportted sample rate settings,
pass them trough mxc_audio_codec_platform_data
* Update copyrigth year 2012
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
|
|
In order to save the power consumption, enable the
PDDQ mode of AHCI PHY when there is no sata disk
on the port
Signed-off-by: Richard Zhu <r65037@freescale.com>
|
|
In order to save the power consumption, enable the
PDDQ mode of AHCI PHY when there is no sata disk
on the port
Signed-off-by: Richard Zhu <r65037@freescale.com>
|
|
The change impact the mx5 bbg and loco build.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
|
|
Change dvfs driver and cpufreq driver to use regulator API to set cpu voltage.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
|
|
- Added V3P3 regulator definitions to board file
- Added V3P3 GPIO defines and setup in board files
- Changed V220 panel timings to match settings used for certification
Signed-off-by: Danny Nold <dannynold@freescale.com>
|
|
Add clock enable code to arch.
OCOTP driver missed code to enable clock in driver.
Thus if ocotp clock is not enabled in clock.c, ocotp will not work.
We will remove ocotp clock enable code in board file and leave this
operation to driver.
Signed-off-by: Terry Lv <r65388@freescale.com>
|
|
1.add new board level file related to new pmic driver
2.support for new board id for RevB of LOCO,so it can support
both RevA and RevB boards
Signed-off-by: Robin Gong <B38343@freescale.com>
|
|
* Add spdif block clock divider settings and spdif_clk_set_rate
function to mxc_spdif_platform_data.
Signed-off-by: Alan Tull <alan.tull@freescale.com>
|
|
adjust dma zone max size to 184M.
keep default size as 96M.
Signed-off-by: Jason Chen <b02280@freescale.com>
|
|
Add support for CPUFREQ for SMP system.
Added support for 1GHz, 800MHz, 400MHz and 160MHz.
Added support for scaling the voltage along with frequency.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
Enable CPUFREQ on 2.6.38
Remove the dependency between CPUFREQ and bus_freq driver.
Allow for CPUFREQ and DVFS-CORE to co-exist.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
add EASI ARCH codes.
Signed-off-by: Gary Zhang <b13634@freescale.com>
|
|
- Add VGA support. The command option to use VGA as primary
display: video=mxcfb0:dev=vga,VGA-XGA,if=GBR24 ard-vga
For VGA, Need to disable Ethernet and short PIN 1-2 of J14
and J16.
- Add LVDS support. The default display is LVDS0. LVDS1 needs
further modification on ldb driver
Signed-off-by: Lily Zhang <r58066@freescale.com>
|
|
This patch adds platform changes to system files, including:
1. Add viim platform deivce.
2. Add viim menu.
Signed-off-by: Terry Lv <r65388@freescale.com>
|
|
Audio capture not support in 2.6.38 kernel, it is caused
by not setting ssi correctly in clock and sync method.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
|
|
make ldb support two ipu in separate mode.
Signed-off-by: Jason Chen <b02280@freescale.com>
|
|
when we need enable 1080p 32bpp display and play a 1080p h264 clip,
it may meet memory allocation fail issue. This patch fix this issue.
Signed-off-by: Jason Chen <b02280@freescale.com>
|
|
based on the 2.6.38 kernel mainline, refer to linux std hwmon
architeture, add the standalone ahci temperature monitor driver
on fsl i.mx53 platforms.
Signed-off-by: Richard Zhu <r65037@freescale.com>
|
|
change for mx51_bbg, mx53_evk, mx6q_sabr platform.
Signed-off-by: Jason Chen <b02280@freescale.com>
|
|
imx5 MSL files change.
Signed-off-by: Jason Chen <jason.chen@freescale.com>
|
|
As well as some warnings for compiling
Fix the build error reported by Alan Tull, the error message is:
arch/arm/mach-mx5/usb_dr.c: In function 'mx5_usb_dr_init':
arch/arm/mach-mx5/usb_dr.c:309: error: implicit
declaration of function 'machine_is_mx53_loco'
The below warning message output when compiling mx5x kenrel:
arch/arm/plat-mxc/include/mach/arc_otg.h:36:7:
warning: "CONFIG_ARCH_MX6" is not defined
Signed-off-by: Peter Chen <peter.chen@freescale.com>
|
|
mx5x ahci related modificatoins when enable ahci on mx6q
Signed-off-by: Richard Zhu <r65037@freescale.com>
|
|
Besides, it enables mx50 usb functions at rdp board
And add mxc (except for mx6q) phy specific register file
Signed-off-by: Peter Chen <peter.chen@freescale.com>
|
|
When exiting from LPAPM mode, ARM clock is run at 266.67MHZ for
a few instructions while the voltage is still at 0.85V.
Fix this issue by setting the ARM-PODF divider before
switching the parent.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
Port bus_freq driver from 2.6.35 to 2.6.38
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
Use community spi_imx for spi nor.
m25p80 is now supported with spi_imx.
Signed-off-by: Terry Lv <r65388@freescale.com>
|
|
Fix system hang due to long time video playback. This issue is only
on i.MX51 platfrom due to changing vpu clock parent in vpu_enable/
disable. Set vpu clock parent to axi_a forever to fix it.
Signed-off-by: Sammy He <r62914@freescale.com>
|
|
S/PDIF tx and rx using ASoC layer.
Signed-off-by: Alan Tull <alan.tull@freescale.com>
|
|
Add iram info to vpu platform data for each platform in linux/arch folder.
Disable iram on MX51 and enable iram on MX53 platform.
And remove VPU_IRAM_SIZE usage.
Signed-off-by: Sammy He <r62914@freescale.com>
|
|
When ARM is in WAIT mode, the SCC RAM clock is disabled since
1 is written to the CCGR register by default. At that point, if SAHARA
tries to access a key or some other piece of data stored in the SCC RAM,
then it might hang.
To prevent this scenario, SCC RAM is added to dependency list
for SCC clock, and SCC clock is added to dependency list for SAHARA.
Signed-off-by: Anish Trivedi <anish@freescale.com>
|
|
- Removed __initdata from regulator_init_data structure declaration. This
protects the MAX17135 regulator from having its structure overwritten, which
was causing a bug when writing large chunks of memory.
Signed-off-by: Danny Nold <dannynold@freescale.com>
|
|
Port low power mode drivers to 2.6.38
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
- Add appropriate bit settings to ANADIG_MISC to improve APLL signal integrity
and prevent intermittent PxP lockups
Signed-off-by: Danny Nold <dannynold@freescale.com>
|
|
- Ported EPDC driver MSL layer code to 2.6.38
- Ported PxP driver MSL layer code to 2.6.38
- Ported Maxim 17135 EPD PMIC driver MSL layer code to 2.6.38
Signed-off-by: Danny Nold <dannynold@freescale.com>
|
|
add dma device for mx50.
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
add the DMA support for platform mx50.
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
add the gpmi device for mx508.
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
add gpmi support for mx508.
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
Add sgtl5000 support for imx51 babbage in 2.6.38 kernel
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
|
|
Add camera pin and clk configuration
Signed-off-by: Sun Yuxi <b36102@freescale.com>
|