linux-toradex.git - Linux kernel for Apalis and Colibri modules

Age	Commit message (Expand)	Author
2012-10-12	ENGR00222835 MX6x-Fix incorrect enabling/disabling of PLL1	Ranjani Vaidyanathan
2012-10-12	ENGR00222134 MX6x - Fix race-conditions in low power code.	Ranjani Vaidyanathan
2012-10-12	ENGR00221975 Fix race condition in clock code.	Ranjani Vaidyanathan
2012-10-12	ENGR00221643 [MX6]Fix race condition of pfd 400 usecount	Anson Huang
2012-10-12	ENGR00221457 MX6DL clock:Set PLL3_PFD_540M to 540MHz	Liu Ying
2012-10-12	ENGR00221440 MX6x-Fix race-condition in checking bus_freq variables	Ranjani Vaidyanathan
2012-10-12	ENGR00221277 MX6DL/S - Set AXI clock to 270MHz	Ranjani Vaidyanathan
2012-10-12	ENGR00221281 [MX6X] Fix BogoMIPS value is not correct	Nancy Chen
2012-10-12	ENGR00221102-2 MX6Q: increase VPU frequence to 352Mhz	Robin Gong
2012-10-12	ENGR00220370 [MX6]Fix BUS freq suspend/resume fail in low bus mode	Anson Huang
2012-10-12	ENGR00218789 mx6: clock: keep PLL3 enable and power bit all the time	make shi
2012-10-12	ENGR00220154 GPT mx6: move mx6_timer_rate to clock.c	Robin Gong
2012-10-12	ENGR00220153 cpufreq mx6: new cpu set point and add VDDSOC/PU adjust	Robin Gong
2012-10-12	ENGR00219193 improve gpu3d core clock to 528M	Xianzhong
2012-10-12	ENGR00216855 suspend resume fail related with clock glitch	Richard Liu
2012-10-12	ENGR00218747 - MX6Q/MX6DL: WAIT mode support for MX6QTO1.2/MX6DLTO1.1	Ranjani Vaidyanathan
2012-10-12	ENGR00216848 MX6 DL dual display failed on HDMI and LVDS	Sandor Yu
2012-10-12	ENGR00216109 MX6Q/DL clock: VDOA needs OCRAM clock and DDR clock enabled	Wayne Zou
2012-10-12	ENGR00215893 [MX6]No need to set high bus when hdmi_clk is enabled	Anson Huang
2012-10-12	ENGR00215607: CAAM: kernel can't boot up sometimes	Terry Lv
2012-10-12	ENGR00215041-1 MX6 clock:Support clko2 to be clko's parent clk	Liu Ying
2012-10-12	ENGR00215195 MX6 PM:Add necessary info for waitmode to help debug system issue	Lin Fuzhen
2012-10-12	ENGR00214607 [MX6]Fix CPUFreq change flow issue	Anson Huang
2012-10-12	ENGR00214199 [MX6]Need to lower ipg_perclk to 6M before init GPT	Anson Huang
2012-10-12	ENGR00180919 [MX6]Update clock tree if BUS freq is changed	Anson Huang
2012-10-12	ENGR000212647 MX6 - Fix IPU and AXI default clock frequency	Ranjani Vaidyanathan
2012-10-12	ENGR00212523 [MX6]Need to enable gpt serial clock for Arik TO1.0	Anson Huang
2012-10-12	ENGR00211670- CPUFREQ-Set CPU to maximum frequency before entering STOP mode	Ranjani Vaidyanathan
2012-10-12	ENGR00209617 MX6x - Add WAIT mode workaround	Ranjani Vaidyanathan
2012-10-12	ENGR00209520-02 - MX6SL MSL : Adjust FEC clock name.	Fugang Duan
2012-10-12	ENGR00181068: MX6 Source IPU_HSP and AXI clocks from 540M PFD.	Ranjani Vaidyanathan
2012-10-12	ENGR00181191 MX6: set ipu2_clk parent from pll2_pfd_400M	Wayne Zou
2012-10-12	ENGR00180185: MX6-Add support for low power audio playback	Ranjani Vaidyanathan
2012-10-12	ENGR00179722: MLB: set correct mlb sys clock in mx6dl	Terry Lv
2012-10-12	ENGR00180096 change NAND clock source to pll2_pfd_400M	Allen Xu
2012-10-12	ENGR00180075 MX6: change CLKO source to pll4_audio_main_clk	Gary Zhang
2012-10-12	ENGR00179782: i.mx6: consolidate mx6q/dl_revision() support	Jason Liu
2012-10-12	ENGR00179804 change NAND clock source from pll2_pfd_352M to pll2_pfd_400M	Allen Xu
2012-10-12	ENGR00179685 MX6 clock:Cleanup LDB DI parent clock	Liu Ying
2012-10-12	ENGR00179747: MX6DL-Fix boot failure	Ranjani Vaidyanathan
2012-10-12	ENGR00179647 MX6 clock:Correct LDB DI pclk for MX6Q TO1.1	Liu Ying
2012-10-12	ENGR00179574: MX6- Add bus frequency scaling support	Ranjani Vaidyanathan
2012-10-12	ENGR00178597 [MX6DL/S] Multi-instance test in GC880 cause system hang	Larry Li
2012-10-12	ENGR00177241-1 mx6 close APBH DMA clock when no I/O operation	Allen Xu
2012-10-12	ENGR00178875-1 VDOA: Add vdoa support on i.MX6 SOC platform	Wayne Zou
2012-10-12	ENGR00178915: imx6 clock fix build warnings	Adrian Alonso
2012-10-12	ENGR00178763: MX6-Fix TO1.0 boot-fail issue	Ranjani Vaidyanathan
2012-10-12	ENGR00176366: MX6-Switch ARM_CLK to PLL2_400MHz when ARM freq is below 400MHz.	Ranjani Vaidyanathan
2012-10-12	ENGR00178128 mx6 pcie: pass PCIEX1 CT network card verifications	Richard Zhu
2012-10-12	ENGR00177310-2 mx6 clock: change _clk_clko_round_rate	Lily Zhang