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path: root/arch/arm/mach-shmobile/intc-sh7372.c
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2011-11-05ARM: mach-shmobile: Use common INTC IRQ code on sh7372Magnus Damm
Make use of INTC_IRQ_PINS_32() for INTCA on sh7372. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-10-22ARM: mach-shmobile: sh7372 A4R support (v4)Magnus Damm
This change adds support for the sh7372 A4R power domain. The sh7372 A4R hardware power domain contains the SH CPU Core and a set of I/O devices including multimedia accelerators and I2C controllers. One special case about A4R is the INTCS interrupt controller that needs to be saved and restored to keep working as expected. Also the LCDC hardware blocks are in a different hardware power domain but have their IRQs routed only through INTCS. So as long as LCDCs are active we cannot power down INTCS because that would risk losing interrupts. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-08-29ARM: mach-shmobile: Remove 3DG/SGX from sh7372 INTCSMagnus Damm
This patch removes support for the SGX interrupt source in the sh7372 INTCS controller. The SGX hardware block included in sh7372 is already hooked up to the ARM Cortex-A8 core using the INTCA controller, so SGX users are encouraged to make use of that interrupt source instead. Removing support for the SGX interrupt source in INTCS simplifies the sh7372 power management code by allowing us to assume that only INTCA needs to be powered on to operate the SGX hardware. If the INTCS interrupt source would be kept then the kernel would be forced to deal with additional dependencies that does not follow the regular power domain hiearachy. With this patch in place we can safely power down INTCS while the SGX is operating. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-05-24ARM: arch-shmobile: Use multiple irq vectors for SDHISimon Horman
This patch reverts "ARM: mach-shmobile: sh7372 SDHI vector merge" and supplies 3 IRQ resources for each SDHI block. Some blocks have a 4th IRQ, but this is used for DRM feathres that I do not have access tot he documentation for and are almost certainly tainted by licensing issues. So the 4th IRQ is not hooked-up even if it exists. Cc: Chris Ball <cjb@laptop.org> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-03-29arm: Cleanup the irq namespaceThomas Gleixner
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-01-18ARM: mach-shmobile: sh7372 INTCS MFIS2 interrupt updateMagnus Damm
Enable the MFIS2 interrupt source in the INTCS interrupt controller included in the sh7372 processor. The priority field is constantly enabled to let the interrupt through to both the ARM side and the SH side. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-12ARM: mach-shmobile: sh7372 Enable SDIO IRQsArnd Hannemann
This patch enables the interrupt generation for SDIO IRQs of the sdhi controllers of the SoC. To make sure interrupts are handled announce the MMC_CAP_SDIO_IRQ capability on AP4EVB. Tested with a b43-based SDIO wireless card. Signed-off-by: Arnd Hannemann <arnd@arndnet.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-08ARM: mach-shmobile: intc-sh7372: fix interrupt numberTony SIM
Signed-off-by: Tony SIM <chinyeow.sim.xt@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-14ARM: mach-shmobile: sh7372: modify INTCS tableKuninori Morimoto
Add ignored device name by comment-out in INTCS. And MSIOF which has been forgotten is added Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-05-20ARM: mach-shmobile: sh7372 INTCS supportMagnus Damm
Add support for the sh7372 INTCS interrupt controller. INTCS is the interrupt controller for the sh7372 SuperH processor core. It is tied into the INTCA interrupt controller which interfaces to the ARM processor. INTCS support is implemented using a new INTC table together with a chained interrupt handler that ties into the already supported INTCA controller. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-15ARM: mach-shmobile: intc-sh7372: modify wrong addressKuninori Morimoto
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-15ARM: mach-shmobile: sh7372 SDHI vector mergeMagnus Damm
Merge the SDHI vectors for sh7372 using the recently merged INTC force_enable/disable feature. With this in place SDHI hotplug is supported using the drivers sh_mobile_sdhi and tmio_mmc. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-15ARM: mach-shmobile: intc-sh7372 tidyupKuninori Morimoto
This patch is based on Rev 0.5 manual Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-09ARM: mach-shmobile: sh7372 INTCA supportMagnus Damm
Add support for the sh7372 INTCA hardware block. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>