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Add machine support for t132 pm375.
bug 1522642
Change-Id: I842150ecccb722a93b7b80b3c87dcf1ceb13e7b5
Signed-off-by: Zheng Liu <zhliu@nvidia.com>
Reviewed-on: http://git-master/r/440518
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Mike Thompson <mikthompson@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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Move cl-dvfs to DT for automatic voltage value
detection.
Bug 200017706
Change-Id: I3467c6e34648e6478b4929a47869ba71f0b251a0
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/434018
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
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Use the API provided by tegar-pmc driver for configuring the PMC
interrupt polarity at appropriate location for Laguna and Norrin.
Remove extra function calls and macros used locally for achieving this.
Change-Id: Ic5e990453fd9bc2b61f433a7850708a34a4d0fa7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/397149
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The device registration of AMS AS3722 PMIC has been moved to DT
for all platforms and hence it is not require to have macros and
header inclusion for board files.
Removing the macro definition and heade inclusion for this file.
Change-Id: I694f6e466eb2777c3e5afde9981a97146d412cb7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/397148
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TCA6416 device has been moved to DT for its registration and so it
is not require to have macro for this device and header inclusion of
this device.
Remove the macro and header inclusio from different board source
files.
Change-Id: I39a06417bc12acdbc8ff430acc7a6a449a0060d8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/397147
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Support for pm375
Bug 1454434
Change-Id: I90c89658985208665f61a8b38390fa6d4bd14074
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/387706
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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bug 1431845
Change-Id: I4752b0521fb9a68f3e2a19ce8ca9f0d0cd4396e4
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/350755
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Move laguna T124 power tree to device tree
Bug 1423355
Change-Id: I050a3938442e5da614b3b93edf1bf12790516772
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/354904
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Remove non-required header include as linux/pca954x.h from
different board files.
Change-Id: Ied77ac30a3bed5c320fd2159724788b78aa7324c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/357110
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Move laguna T124 tca6416 gpio expander to device tree
Bug 1423355
Change-Id: Ifb6d0061d6eb70a61f0b88449868d8a070f1f306
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/356341
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Bug 1343366
Change-Id: I68432967e4d77ccd04ee05e880b572e390510c0f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/349108
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Add platforma support for detection of
new AMS PMIC for SD0 reg for
PM374 FAB B board & PM359C board
Bug 1425474
Change-Id: Id6b92f3d5f48648973736350177478374da2a7da
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/346287
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Removed core edp trip-points from Tegra12 platforms (core edp limits
are not applicable on those platforms).
Change-Id: Id31a08b5020ad16bbf5d84cf0eed19ed04ee473f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/345562
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Re-named, and re-arranged trip-points installation interfaces, so that
interface name reflects module/parameter subject to thermal control,
instead of designated thermal zone (the latter may change on different
platforms creating a confusion with old names).
Change-Id: Ie3714d14103b85720598cf9da44e0abf51326ac5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/344606
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Register bq24715 battery charger driver only when a battery
is connected to the platform (When it is specified through
ODM data that battery has been connected).
Bug 1271064
Change-Id: I0d6fc482c3e4d6f4512c3a06575f9525a197b906
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/336900
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Pass bq24715 charger platform data for the Laguna platform
Bug 1271064
Change-Id: I472a97b479b656864e652f31fdc560f34053904b
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/336179
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Bug 1405054
Change-Id: I505e3b8a132b425462459de0a470f9f6c89a245a
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/333403
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Added core rail Vmax trip-points to PLL thermal zone on Tegra12
platforms. Made sure pid governor is installed in PLL zone (for
consistency with all other SOC-THERM zones, and to avoid incorrect
cooling device state reporting by default step-wise governor).
Bug 1413311
Change-Id: Ib06fd98ab39dc9a4411b571778600569d801b242
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/335923
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Add cpu voltage cap trip points for ardbeg, loki and laguna.
Bug 1349095
Change-Id: Ia1fe0cd2adb86fef1fefc61ad3fbf3b49467879e
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/329932
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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The platform specific information is defined in as3722-plat.h and
hence removing the inclusion of as3722-reg.h which mainly defined
register sets and unrelated to platform.
Change-Id: I12faff44d91d7b6c918f5fd00af57ee590b516a3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/330341
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The OC and tracking parameters are moved to regulator specific
platform data and hence removing this duplicated parameters from
board power file of Laguna and Ardbeg.
Change-Id: I00112df0b1d284679a85dfdcb51ef32a583f7196
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/329619
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Pass the over current trip configuration parameters through regulator
constraints to move this parameter out of regulator platform data and
to make these parameter handled by regulator core.
Change-Id: Iad120da7220ccfd4fd38e2d7479172e073ebebe9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/329617
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Enable MEM zone for temperature sensing on Shield-ERS, Loki and Laguna.
Bug 1342361
Change-Id: I290ff3a711ca0d456087be015502bee2a0e2ecc8
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/300895
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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Bug 1307919
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Change-Id: I6b6ef6dae353f3618a55b7bc84b36e5bf7115584
Reviewed-on: http://git-master/r/328513
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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The gpio driver of AS3722 gpio-as3722 is not used as all functionality
moved to pincontrol driver.
Hence platform data for this driver is not used and hence removing the
gpio configuration table of AS3722 from board files.
Change-Id: Ib39d929b6dc77e3378df3544bf154a447094e3ba
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328690
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Ardbeg and Laguna platform uses the AS3722 device.
Pass the default configuration of this device for
these platforms.
Change-Id: Ifa77a0983110fcf6c95cf80dd1e60e105d58a745
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328688
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Remove AS3722 platform data usage from board file as it is not
used by driver.
Change-Id: Ic6c879afffb742d92b1f9796200a4605ee7ad4d1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328287
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Enable CLK32K out from AS3722 for Laguna and Ardbeg platform using
ams AS3722 PMIC.
Change-Id: I3e6334ba3088d9f44f7d3b9eaa05b956c55e200e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328284
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Reduced GPU regulators minimum constraints to 650mV on Tegra12
platforms: ardbeg, loki, and laguna.
Change-Id: I8772b86c1fef8b8a55c0c7a1c4b7d85012c6542b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/309414
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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avdd_dsi_csi regulator is owned by vi.0 and vi.1. With the wrong name
of owner like "vi", driver will fail to get this regulator:
"nvhost_vi_init: couldn't get regulator"
Bug 1377330
Bug 1398103
Change-Id: Ibba0e8afc5c353e0a7f41f6996313afc7e0f0f2e
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/289323
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add correct fixed regulator support for all
three falvors of Laguna
Bug 1381552
Bug 1372221
Change-Id: I76734f030e10620b3aac6a6d0b33756c25300f66
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/299549
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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move the sdmmc0 regulator to SD5.
correct dev_name for pwrdet_sdmmc regulator
Bug 1382004
Bug 1382018
Change-Id: I5c8b5f46fdf34b2010e7aa1ff587acfc2da9d86f
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/301761
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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SATA_RX and SATA_TX are connected from PEX power domain of
tegra. So added required power tree entry for enabling
PEX power domain.
Bug 1376043
Change-Id: I20bfc76b7552d0391fd78513e3339f3d8f542960
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/303295
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Tested-by: Venkata Jagadish <vjagadish@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Temperature threshold Values taken from new tegra12x margining
spreadsheet.
Updated Shield-ERS and Loki board-files with thresholds for T580 SKU
and Laguna board-file with thresholds for T570 SKU.
Bug 1393423
Change-Id: I3044fc6e571f81d0ddc09a5ff14469c411e8dd1a
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/299048
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1. Remove the WAR of removing pcie devices in
suspend and creating them from scratch in resume
2. Remove bypassing pcie config space access in
pcie bus noirq suspend/resume calls
3. Convert tegra pcie suspend/resume to noirq calls
except enable_features in resume
4. Make pcie sd4 regulator always ON with external
control
5. Avoid adding pcie host device for runtime power
management as it conflicts with noirq calls
Change-Id: Ia6236f15e124a63a08a36b167a346c8282f5271a
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/300465
Reviewed-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Set GPU scaling trip-points in SOC-THERM or NCT thermal zones on
Tegra12 platforms (zone selection depends on thermal fuses settings).
As a result GPU scaling cooling device is binded with the respective
thermal zone, and enables GPU thermal DVFS.
Bug 1273253
Change-Id: I51fca20fd49d6dd42cff1219653ac5a7d541827f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/289547
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Remove the GPU regulator always_on flag. This allows
the GPU to be railgated.
Bug 1385539
Change-Id: I19e5df467a9eefab3e06971867113cb63d2ccb57
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/289332
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jong Kim <jongk@nvidia.com>
Tested-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add regulator for touch driver
Bug 1372324
Change-Id: I2ac5cf9acc9c92d63ec21d2e20e40e33b0aa045b
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/279202
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 8fdb108f9b170facbd8eb8ab483ce4e170fe02c3)
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
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Change-Id: I8defc1e34f097ed843698684db042747696ec289
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/267757
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Use macro for setting external control in place of the direct
number when populating AMS AS3722 regulator platform data.
Change-Id: Id8e00b3d6ec14b8ba3d12d1280d7a46f4e4586a9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267919
GVS: Gerrit_Virtual_Submit
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T124 platforms i.e. Ardbeg, Laguna, TN8 and Loki used only with
T124 SoC and hence config CONFIG_ARCH_TEGRA_12x_SOC is always
enabled for these platforms.
Hence removing of additional macro check from the code to make
code simple.
Change-Id: Ic28c65eef0db9f8d4af57a85ad776de1fbe1f2f1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/265421
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Tegra11x support was added on the T124 platform to support the T114
interposer.
Now there is no need of interposer and hence removing the support for
T114 from T124's platform.
Change-Id: If2cdf50b66e352efe62855fc7d5c01576a8fdba0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/265403
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add delay after fixed regulator initialization.
This prevents the race in accessing hdmi & audio
i2c before enabling the fixed regulator.
Bug 1342355
Change-Id: I4bcad3b8b63f06f6c0c79c37f7cb53c753565c4a
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/263258
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Change USB ID detection method by using AS3722 for laguna to save power
Bug 1347819
Change-Id: I8e6bf028ca3377b51ed1f1bff240d29ec2a7a198
Signed-off-by: Aaron Huang <aaronh@nvidia.com>
Reviewed-on: http://git-master/r/261356
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Until correct cl_dvfs settings are programmed for laguna boards
cl_dvfs shoudl not be enabled
Change-Id: Iffa9bd98277bc32beca177705eb9ad29da4a06fd
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/259776
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Delete fixed_reg_usb2_vbus;
Modify fixed_reg_usb1_vbus to fixed_reg_usb1_usb2_vbus;
Add consumer of fixed_reg_usb2_vbus into fixed_reg_usb1_usb2_vbus;
The change is to correct the configure of GPIO PPF1.
Bug 1343611
Change-Id: I5362712b035cce2c888a1a3070fd5e18559ca469
Signed-off-by: Terry Wang <terwang@nvidia.com>
Reviewed-on: http://git-master/r/258645
Reviewed-by: Hunk Lin <hulin@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Change-Id: Ie71a0195c11b9427b15c50175763a4cdd9e46be1
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/256731
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
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bug 1329929
Change-Id: If5714585c570a7ae328c3cc60683235919698c2b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/256816
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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ldo6 power rail min voltage should be 1.8V
Bug 1323354
Reviewed-on: http://git-master/r/246936
(cherry picked from commit 77ae8456c00701f150aad727ae90ff7709b367c8)
Change-Id: I44a30e7f81feb2aafd0d37915aebf1b5d92ce0d4
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/254851
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Shanker S <shs@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
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Need to call DT_MACHINE_START for each platform so that
ro.hardware property is set according to platform name.
This also enforces one dts file per platform.
Bug 1328162
Change-Id: Ia6091791f664d6b047fc1f69263a9f30e3fd3497
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/252797
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
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