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path: root/arch/arm/mach-tegra/board.h
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2014-11-21arm: tegra12: add support for CD575M 24x7 ChipBibek Basu
Added DVFS support for CD575M Always on behaviour. With this personality configuration for the chip,the lifetime of the chip increases to 5 Yrs Operating Temp : -25 to 105 degC CPU DVFS: Max Freq 1938Mhz. Max Voltage 1.12V SOC DVFS: Max Voltage0 1.01V EMC dvfs max freq 792Mhz GPU DVFS: Max Freq 804Mhz and Ma Voltage 1.09V Bug 1563635 Change-Id: If7fec38b83ae4de8c5435006207fa3cf717384c0 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/594855 GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-03-31arm: tegra: add new API tegra_reserve4 to take vpr sizeKrishna Reddy
With TLK enabled and VPR base and size are selected by kernel. This new API allow bsp specify desired VPR size. Don't use VPR command line args when TLK is enabled. Change-Id: Ie0bba30945fdaf4550d93948e1d33d21c0f9829f Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/390314 Reviewed-by: Alex Waterman <alexw@nvidia.com>
2014-03-27arm: tegra: remove setting unused member buddy_sizeKrishna Reddy
Change-Id: I0345b06e725dadf2b661106e7c34d4d6718ef7c2 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/386366
2014-02-18arm: tegra: define carveout_linear_set on CONFIG_CMAVandana Salve
Define carveout_linear_set on CONFIG_CMA This resolves compilation issues on T132 bug 1279160 Change-Id: I6bfbbca51e05733e9f9182f54a81d477c8298b65 Signed-off-by: Vandana Salve <vsalve@nvidia.com> Reviewed-on: http://git-master/r/367856 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com>
2014-02-12ARM: tegra: Loki: Add 5 inch JDI support for LokiXiaohui Tao
Bug 1447315 Change-Id: Id31961e6063381b5e5097ae8e441e69ec413f962 Signed-off-by: Xiaohui Tao <xtao@nvidia.com> Reviewed-on: http://git-master/r/355782 Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
2014-02-11arm: tegra: dts: Add tegra-diagnostic-modetope yang
Bug 1456186 Change-Id: I0ee4d8475fe69599c118e103cde60d33d0856257 Signed-off-by: tope yang <topey@nvidia.com> Reviewed-on: http://git-master/r/359885 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
2014-02-09ARM: tegra: reserve memory for ramoops by defaultAjay Nandakumar
Reserving memory of 1MB for ramoops by default in tegra_reserve when PSTORE configs are enabled. This way we can enable ramoops on all platforms by just enabling the configs. Bug 1258617 Change-Id: I2074c553cc9c32bca133bc8eb36eb03dc12fbbe1 Signed-off-by: Sumit Singh <sumsingh@nvidia.com> Reviewed-on: http://git-master/r/361425 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com> Tested-by: Sachin Nikam <snikam@nvidia.com>
2014-01-23ARM: Tegra: add support for ramoopsAjay Nandakumar
Ramoops is an oops/panic logger that writes its logs to RAM before the system crashes. This replaces the old methods which uses last_kmsg. the last kernel logs can now be found at /sys/fs/pstore/console-ramoops. If not found it can be manually mounted using the command from shell prompt: mount -t pstore pstore /sys/fs/pstore Bug 1258617 Change-Id: I7507bfe66a36ae882ad1d2a8f4b111bce9a1d8bc Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com> Reviewed-on: http://git-master/r/309549 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2014-01-21ARM: tegra: define USE_OF for ARM64Peng Du
Device tree support is default on ARM64 such that it does't provide a USE_OF config option. However, Tegra board files rely on USE_OF to enable DT code. This change defines USE_OF when ARM64=y as a workaround. Change-Id: Id240ef0d46fba94da2003b0cddcb4d719ed61bb6 Signed-off-by: Peng Du <pdu@nvidia.com>
2014-01-13ARM: tegra: remove API which requires to register pinctrl from board file.Laxman Dewangan
As pinctrl registration is moved to DT for all platforms, it is not require to have function/code to register pinctrl from board files. Removing the same. Change-Id: I6ff0e5b74748fc7dcf75f2eb5a6026d62d15c999 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/354108
2013-12-27arm: tegra: touch: add VENDOR_NONE typeAndrew Tran
need a VENDOR_NONE type to use on system with no touch Bug 1421643 Change-Id: Ib2100c3f10d5497503a7aa5a4b7827b233de48d0 Reviewed-on: http://git-master/r/347172 Reviewed-by: Xiaohui Tao <xtao@nvidia.com> Tested-by: Xiaohui Tao <xtao@nvidia.com> Reviewed-by: Mitch Luban <mluban@nvidia.com>
2013-12-17ARM: tegra: Support both touch for TN7/TN8Xiaohui Tao
Bug 1423298 Change-Id: I8a8ef9b70fb46ae6a222a786400537ec934d3daf Reviewed-on: http://git-master/r/345501 Reviewed-by: Xiaohui Tao <xtao@nvidia.com> Tested-by: Xiaohui Tao <xtao@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Hon Fei Chong <hchong@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2013-12-12ARM:tegra: Parse cmdline to enable UART over uSD cardAnkita Garg
Check if debug_uartport=5. If yes, set uart_over_sd=true. This variable will be used by specific platform files to setup pinmux for UART over SDMMC3. Bug 1350514 Change-Id: Icffbb86c5c877e7e1325649e26249680eefca0f0 Signed-off-by: Ankita Garg <ankitag@nvidia.com> Reviewed-on: http://git-master/r/334707 Reviewed-by: Tao Xie <txie@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2013-11-19PCI: tegra: Move PCIe driver to drivers/pci/hostJay Agarwal
Made similar as upstream Bug 1380431 Change-Id: Ibac21bfaa92e10598e1d8b571ac1acef7300e488 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/303364 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-11-14arm: tegra: update dma linear map table for VPRVandana Salve
Update the dma linear map table for vpr base and size with CMA VPR base and size when CMA is used for VPR carveout bug 1279160 Change-Id: I38a2c73274a02938d728f4ede4caf8f45aac42c1 Signed-off-by: Vandana Salve <vsalve@nvidia.com> Reviewed-on: http://git-master/r/327251 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com>
2013-10-28ARM: tegra: move irq drivers to drivers/irqchipAjay Nandakumar
Bug 1379891 Change-Id: I18a95deafbc112aa22da66d599e8ffb1c85fedab Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com> Reviewed-on: http://git-master/r/302909 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-10-17Revert "Revert "clocksource: tegra: use the device_node pointer passed to init""Ajay Nandakumar
This reverts commit 0e653907ac1d0be9172419c884b820c11864b567. We've already matched the node, so use the node pointer passed in. The rtc init was intermingled with the timer init, so split this out to a separate init function. Bug 1379817 Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com> Change-Id: I239269bacad3c7e7f0c3fdc63e4d018d53b542a4 Reviewed-on: http://git-master/r/299023 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-10-15arm: ardbeg: board file change for maxim touchXiaohui Tao
Bug 1364399 Change-Id: I4c8f854e7d3c08dcf6d91350c41a490ffdeb2f7e Signed-off-by: Xiaohui Tao <xtao@nvidia.com> Signed-off-by: Hayden Du <haydend@nvidia.com> Reviewed-on: http://git-master/r/289391 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-16arm: tegra: bootloader fb free in late_initcallMin-wuk Lee
At this moment, bootloader framebuffer memory is freed in arch_initcall, whereas, kernel framebuffer begins to be used in dc device register with device_initcall. It has potential bug to display garbage screen in device booting. bootloader framebuffer memory should be freed after dc device register, so move it to late_initcall frame. Bug 1346172 Change-Id: I8038d32fcf710295d387f58641f48a9beeb823b9 Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/269401 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Chao Xu <cxu@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-14ARM: tegra: Pass FB areas to IOMMUHiroshi Doyu
Pass FB areas to IOMMU to set up linear mappings. DC is acccessing to FB over DC being configured IOMMU'able. So older linear mapping needs to be supported too. Bug 1297607 Change-Id: I94e8946bf3a29137825dfffb4e6a0fe19dab78b7 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/263064
2013-09-14ARM: Tegra: Parse memtype commandline argumentGraziano Misuraca
Parse memtype argument and make available through 'tegra_get_memory_type()' call in board.h Change-Id: I6a5dbb3e91c071fb0714dbb52d3a5c99925b03e6 Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com> Reviewed-on: http://git-master/r/192465 (cherry picked from commit 1f56bf3208e9ecbacaaf309c91d283d1e252e69d) Reviewed-on: http://git-master/r/246190 Reviewed-on: http://git-master/r/249744 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2013-09-14ARM: tegra: pci: Parse odmbits to config lanesJay Agarwal
1. Parse odm bits[28:30] passed by boot loader to kernel. 2. Program XBAR config based on above odm bits 3. Program Lane ownership to PCIe based on odm bits 4. Program GPIOs based on odmdata to enable PCIe x1 slot for ERS-S board Bug 1305915 Bug 1299907 Change-Id: I5a252df0577098c8b42dfe3eb745100fad964592 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/241767 Reviewed-by: Seema Khowala <seemaj@nvidia.com>
2013-09-14ARM: tegra: USB1 VBUS and ID ANY wake level supportBitan Biswas
This change enables wakeup from USB cable connect and disconnect for both device(VBUS) and host(ID) cables. - board platform data used to enable the implementation - chip specific wakeups source file added with new API needed to detect VBUS and ID cable connect state - chip specific API exposed to return the USB1_VBUS and USB1_ID wake indices Moved dummy implementation of USB wake support APIs from chip-specific source into common file bug 1286802 bug 1314875 Change-Id: I59cfca82a907d33190a5bc92f33de5986fada43f Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-on: http://git-master/r/231918 (cherry picked from commit 75e8f1f218422013055c4fbcf96ceab059c933a7) Reviewed-on: http://git-master/r/241033 (cherry picked from commit 3f65b627372c37b4726084bec1129b9b2dabfe4f) Change-Id: Iae4db0cec2dbee6feef229b308b2b86340affd17 Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-on: http://git-master/r/242383 (cherry picked from commit ba1bb5314fc5d877ab3bcd4e4530501e4f604dd4) Reviewed-on: http://git-master/r/243438 (cherry picked from commit 7beaa748094e754c0bf7bd5f946c9a314949d2b9) Reviewed-on: http://git-master/r/247106 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14ARM: tegra: Fix tegra_move_framebuffer signatureTerje Bergstrom
tegra_move_framebuffer() actually takes physical addresses and a size parameter. Fix the signature to match that. Bug 1201552 Change-Id: I67d82923a7d915358161f5e1fad5b75e0a50f431 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/217304
2013-09-14ARM: tegra: convert memory vars to phys_addr_tAdeel Raza
Convert memory related variables from unsigned long to phys_addr_t. This is needed because of LPAE which allows physical memory addresses above 4 GB. Also add checks for ensuring that the AVP kernel is loaded below 4 GB. Change-Id: I896e8db69cd1d2ba2499800fec4a6b224bad8ed8 Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: http://git-master/r/210113 GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
2013-09-14ARM: tegra: bonaire: add board filesJin Qian
and the include for host1x init (invoked from board file) Change-Id: I5a7cb2e074f6c7395aec5ede1db31b2bdeae5cb0 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Mark Stadler <mastadler@nvidia.com> Signed-off-by: Jin Qian <jqian@nvidia.com> Reviewed-on: http://git-master/r/82938 Signed-off-by: Mark Stadler <mastadler@nvidia.com>
2013-09-14ARM:tegra: Enable powergate debugfs for all platformsAjay Nandakumar
Enable powergate debugfs for all platforms Bug 1327616 Change-Id: I0217a24202ecc308097f95a3ab3554a6810e4075 Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com> Reviewed-on: http://git-master/r/251619 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Tested-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-09-14ARM:tegra: Add support to parse touch idXiaohui Tao
Support to parse touch panel id for roth Change to parse touch vendor id for ceres and pluto Bug 1253012 Change-Id: I902a1a63efc030cb4b4e82e7301c00027c8e950c Signed-off-by: Xiaohui Tao <xtao@nvidia.com> Reviewed-on: http://git-master/r/221647 Reviewed-on: http://git-master/r/218964 (cherry picked from commit 29178237b3073b45569dcec2fc85bdd7491a1f25) (cherry picked from commit a79f45c5357191fa8da61c8fefe3a79bef8afadb) Reviewed-on: http://git-master/r/229038 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14ARM: tegra14x: Parse LP0 SDRAM related variablesPrashant Malani
Parse SDRAM parameters DRAM location, block size and number of instances saved. These variables are used by the code which copies the packed parameters into scratch regs. Bug 1234031 Bug 1025839 Change-Id: Icbfcf8c424d4fd17fcd903419f1442a8e723c406 Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/207713 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14ARM: tegra: Add NCT access api and sysfs interfaceJoshua Cha
NCT is the acronym for Nvidia Configuration Table. This change provides API to read NCT items from NCT carveout region and create sysfs interface for userspace to read items. Bug 1223662 Change-Id: Id6f887fd9c458f4f9c3dfe27f6a95fbe930cfb00 Signed-off-by: Joshua Cha <joshuac@nvidia.com> Reviewed-on: http://git-master/r/208680 (cherry picked from commit d6234478cd3e92b8c739e806998b9f75e732d714) Reviewed-on: http://git-master/r/226216 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2013-09-14ARM: tegra: PMIC WDT disable command line supportBitan Biswas
PMIC watchdog enable/disable is passed to kernel from fastboot - watchdog=disable indicates watchdog is disabled - Watchdog is enabled when watchdog=enable or argument watchdog is missing bug 1275273 Change-Id: I3b2b5b1916f099e9f7b277e4b29f985647e140ee Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-on: http://git-master/r/224920 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2013-09-14ARM: tegra: Add support to parse display-configPradeep Goudagunta
Add support to parse display-config from linux command line. Which is used to configure avdd_lcd line and other settings. Bug 1229385 Change-Id: I08d2ae9e3aa2e43816aeab1a4043abd358b838a8 Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> Reviewed-on: http://git-master/r/207442 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14ARM: Tegra: Common: Add Roth Related Board TypesMatt Wagner
Add commandline board_info parsing for boards present on Roth Bug 1186719 Change-Id: I6743798c615dae6f66461cc39bd666daa7a2f6f9 Signed-off-by: Matt Wagner <mwagner@nvidia.com> Reviewed-on: http://git-master/r/170345 (cherry picked from commit 2715cada53c70bcb7d1ccfe719a9741a6a1a542a) Reviewed-on: http://git-master/r/201992 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2013-09-14arm: tegra: Add support to parse touch typeSeema Khowala
Support to parse touch_type from linux cmd line. touch_id = 0 for Raydium touch_id = 1 for Synaptic Bug 1251187 Change-Id: Ifa2c7d2ade35acef7f514c71e25509a273980ecc Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/210520 Reviewed-by: Harshada Kale <hkale@nvidia.com> Tested-by: Harshada Kale <hkale@nvidia.com>
2013-09-14ARM: tegra: Add support to parse power-configPradeep Goudagunta
Add support to parse power-config from linux command line. Which is used to configure power rails. Bug 1235384 Change-Id: I93e15ff6aeb5121c47475a6c13d12fc81087aa49 Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> Reviewed-on: http://git-master/r/198782 (cherry picked from commit a25474ea298611dad69f1448635afd009549a969) Reviewed-on: http://git-master/r/166775 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14arm: tegra: autodetect BBC memory regionsMartin Chabot
Memory regions are not shown anymore on carveout summary Bug 1180526 Bug 1050961 Change-Id: I9b6bd9b79e26680e95d702ab784c11431bd78d7f Signed-off-by: Martin Chabot <mchabot@nvidia.com> Reviewed-on: http://git-master/r/188229 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14arm: tegra: Added fuse device register common functionSumit Sharma
Added fuse platform device registration function Bug 1016464 Change-Id: I37ea96a1b1030ce1d4bfb25225457865f04fe39e Signed-off-by: Sumit Sharma <sumsharma@nvidia.com> Reviewed-on: http://git-master/r/162343 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2013-09-14arm: tegra: display: handle fbmem2 cmdline parameterJong Kim
Parse and handle fbmem2 cmdline parameter. bug 1175957 Change-Id: I0933825371bf13782e9f4364a4dba078929ae836 Signed-off-by: Jong Kim <jongk@nvidia.com> Reviewed-on: http://git-master/r/170662 Reviewed-on: http://git-master/r/172868 (cherry picked from commit 7959de63b20530d1c13e1fca2f01ad2cb614ded9) Reviewed-on: http://git-master/r/173773 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2013-09-14arm: tegra: display: provide framebuffer clear functionJong Kim
Add tegra_clear_framebuffer function. bug 1175957 Change-Id: I12c249e011ecd839bbe9c5371b8be6e8a4b27bba Signed-off-by: Jong Kim <jongk@nvidia.com> Reviewed-on: http://git-master/r/170661 Reviewed-on: http://git-master/r/172867 (cherry picked from commit 128803a7d97789a2916ab7ef498e19ecd5e7ad07) Reviewed-on: http://git-master/r/173772 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2013-09-14ARM: tegra: tegra_bb driver implementationMartin Chabot
This driver implement integrated icera baseband support use CONFIG_TEGRA_BASEBAND and optional CONFIG_TEGRA_BASEBAND_SIMU Bug 957942 Change-Id: Icf995ee2a74e01bd83f7ea352ea12bbd62472fcd Signed-off-by: Martin Chabot <mchabot@nvidia.com> Reviewed-on: http://git-master/r/120944 Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2013-09-14ARM: Build fix after Tegra14 K3.4 mergeKaz Fukuoka
Change-Id: I174273877fd6500dffd10cce0dd4737f85765cdb Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com> Reviewed-on: http://git-master/r/116282 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
2013-09-14ARM: tegra11: clock: Allow EMC rates above PLLM boot rateAlex Frid
Added kernel command line parameter "emc_max_dvfs". If this parameter is set, and PLLM scaling is enabled, then EMC rate may exceed boot PLLM frequency and reach maximum accepted rate in the EMC DVFS table. Otherwise, EMC scaling rates are limited by boot PLLM rate (this is backward compatible with current EMC maximum rate limitations). Bug 1193281 Change-Id: I0c8b11b8866fe8b2c82dec5a344c04e7feee3c46 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/172141 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14ARM: tegra: init irq from device-treeMayuresh Kulkarni
- enable the intc node - hook irq init via device-tree for boards that support DT - for non-DT boards, fallback to non-dt method - deprecate tegra_init_irq and change tegra_dt_init_irq to check if dtb is passed. If passed, use it to init irq otherwise fall-back to non-dt path bug 1164943 Change-Id: Idd87945df250c3cdef38226a9dbf2d6ffd34ce48 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/147496 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14ARM: tegra: __tegra_move_framebuffer takes devHiroshi Doyu
For T30+ based boards, FB needs to create 1-1 linear mapping, which requires dma mapping API from device itself. Bug 1182882 Bug 1024594 Change-Id: Ifde49919de8c9a1a3ef918a5d531d15e815814c8 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/167310 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2013-09-14ARM: tegra: board: commandline parse for usb port ownerSuresh Mangipudi
Add support for reading the usb_port_owner_info from the linux commandline. Bug 1171854 Change-Id: Ib05c4d4f34ba2ac142e826dac6f4b96392419702 Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-on: http://git-master/r/162050 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14arm: tegra: Read panel id from kernel command lineVineel Kumar Reddy Kovvuri
Change-Id: I6de82f53eadd86a2dd0c44bd06fd412be353d55b Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com> Reviewed-on: http://git-master/r/166589 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14ARM: tegra: Setup core rail maximum current parameterAlex Frid
Bug 1165638 Change-Id: I380da3c2cd36fd3e21bedfdcfd1ba9683ae1ba12 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/164831 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2013-09-14Add nvdumper kernel module to monitor rebootsColin Patrick McCabe
The nvdumper kernel module tracks whether the system has been rebooted cleanly. It does this by writing 'dirty' to a fixed physical memory address when the kernel starts. Then, on a planned reboot, we write 'clean' to this location. The bootloader can then examine this location and see if the reboot was dirty or clean. It will dump the contents of memory after a dirty reboot. Bug 895895 Change-Id: I31e552da9bf6218cefb77f76f7488fcf9a9151b1 Signed-off-by: Joshua Cha <joshuac@nvidia.com> Reviewed-on: http://git-master/r/161969 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14ARM: tegra: Add support to parse pwr_i2c in command lineChaitanya Bandi
Bootloader passes pwr_i2c=1000 if 1Mhz is supported with PWR_I2C. Parsing this is kernel. Bug 1158569 Change-Id: I5c6c87e905dceb9d67ef1f23eaf0b70768481061 Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Reviewed-on: http://git-master/r/159768 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14ARM: tegra: enterprise: enable wl18xx wireless module supportRakesh Goyal
Bug 990784 Change-Id: I173df3f7244e7d0b40ae5aad98c72885ff42fdab Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-on: http://git-master/r/129103 (cherry picked from commit 32b8cc820fc9f3709c23e6b383825d6cdb0a6085) Reviewed-on: http://git-master/r/134792 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> Rebase-Id: R1bdb7f4f1241a8034c7ae556a763a3c8837e4a2d
generated by cgit v1.2.3 (git 2.0.4) at 2024-09-28 04:32:27 +0000