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2010-11-29[Tegra NvRm]: Tristate MCLK if mediaserver crashbyan
for bug 728160 Tristate MCLK if mediaserver crash to save power. This is done by ref-tracking pinmux for MCLK. The change actually also tracks the other 2 external clock sources, so all external clocks are tracked and cleaned up upon user space application crash. Change-Id: Ie2bc40f680586c01a916abbe51c91a7eb2d1cb13 Reviewed-on: http://git-master/r/10451 Reviewed-on: http://git-master/r/11451 Reviewed-by: Bo Yan <byan@nvidia.com> Tested-by: Bo Yan <byan@nvidia.com> Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2010-11-15[arm/tegra] cache kfuses on boottegra-10.9.5Jon Mayo
Cache the fuse contents early in boot before DMA is active to ensure exclusive access on that bus. This cache is exposed at /sys/firmware/fuse/kfuse_raw and it can be read() or mmap()'d. Bug 741232 Change-Id: I83bc991c89beb837ec22b2e03ceac11ab696cb6f Reviewed-on: http://git-master/r/10482 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2010-10-27[[ARM/Tegra] Clean up build warning messagelazhao
Clean up warning message caused by unused variable and improper struct type. Bug 682070 Change-Id: I3409ad22e67252df14d6d14898aa8792a0019574 Reviewed-on: http://git-master/r/8436 Reviewed-by: Lance Zhao <lazhao@nvidia.com> Tested-by: Lance Zhao <lazhao@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2010-10-26[arm/tegra] support RTC alarm interrupt in odm_kitJon Mayo
New API added to odm_kit to register a callback to use on RTC interrupt. Supported added for RTC alarms in the max8907b PMU. Bug 717253 Bug 734529 Change-Id: I34abebd7dd3caf4ef8923fcf651c50f6d245f6b4 Reviewed-on: http://git-master/r/7328 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2010-10-20[ARM/tegra] suspend: Consolidated dvfs/TMON resume.Alex Frid
Moved dvfs resume into finish suspend ops call (from the 1st dvfs thread invocation after suspend). This would guarantee dvfs re-start in case when suspend is aborted by other driver. Bug 742504 (cherry picked from commit 3a8bf2922f2f266381c887f3c05b7a755b40fae2) Added thermal monitor (TMON) suspend/resume functionality. Bug 698425 Bug 746601 (cherry picked from commit d6aa039689b31d311c836fe478c5943470d7203d) Change-Id: I643f5bd9021989af569bd0ebba40af60738a6bdf Reviewed-on: http://git-master/r/8719 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2010-10-19[arm/tegra] kbc: Adding scanning timeout configuration.Laxman Dewangan
Keyboard controller goes to continuous polling mode from wakeup mode if any key is pressed and stay for hw default to 5 second. This parameter was not configurable from odm. It is require to configure this parameter from odm based on platform. Adding support for keeping this time as configurable. The default time still be 5 second if it is not configured from odm. Change-Id: I0fc11cc2a2d64db33b00c048f87081b6181354fa Reviewed-on: http://git-master/r/8644 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Chun-Hung (Alex) Wu <chuwu@nvidia.com> Tested-by: Chun-Hung (Alex) Wu <chuwu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2010-10-13[Android Camera]: ref count for i2c and gpioZhijun He
Code added to track i2c and gpio object types on NVRM reftracker. This can be used to release handles whenever a system crash happens. This can help properly shutdown and deinitialize imager peripherals. Bug 728160 Reviewed-on: http://git-master/r/5877 (cherry picked from commit 2661d755bfb401204cacafcc5f944085c19df627) Change-Id: Iae3d08ef0fa5ef21d1e243249caa386f2a37fc3a Reviewed-on: http://git-master.nvidia.com/r/8261 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2010-10-05[usb-host]Remove controller restart in host mode during resumeVenkat Moganty
During resume from LP0 controller is getting restarted in host mode due to this hcd state is getting changed from the suspend state. Controller state should not be changed for host mode. Fixed this to restart the controller only in OTG mode. Bug 724437 (cherry picked from commit cbea530301ae3d9a4a7271d11c819bfc8de8f892) Change-Id: Idc2897a2790087e00ee66e30fea734c9d117029e Reviewed-on: http://git-master/r/7833 Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-10-05[arm/tegra] provide wifi power/carddetect abstractionRakesh Kumar
When user switches on wifi, wifi driver need to poweron wifi card and ask sdhci stack to enumerate the card. Sdhci stack does not provide any interface to achieve this. Major wifi vendors depend on platform to provide wifi poweron/reset/carddetect abstraction function. Bug ID 739374 Change-Id: I988393352ff6cb54be3d70a59c94f67eedff06fb Reviewed-on: http://git-master/r/7097 Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Tested-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-09-21[ARM/Tegra] nvrm : Clean up user mode DMA handlesVictor(Weiguo) Pan
Nvrm exposes nvrm DMA APIs to allocate and use the DMA channel from user mode. I2S (i.e audio HAL) is the main user of these APIs. When the process that allocates the handles doesn't free-up and crashes, RM reftracker driver will clean up the handles its on-behalf. Same mechanism already exists for the mmeory handles. bug 730003 Change-Id: Iceb5c3b6d22989463d184c90e25ab06f6979b5a4 Reviewed-on: http://git-master.nvidia.com/r/7013 Tested-by: Victor (Weiguo) Pan <wpan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-08-27[arm/tegra]dma:Continuous double buffer repeat transfer.Laxman Dewangan
To get the higher performance on uart receive, it is required to have the transfer mode of continuous double buffer of dma operation on the client buffer. The dma keeps filling same buffer and informs client when half buffer and full buffer transfer completes. Also added support to start and stop without enqueing/dequeueing. Bug 725085 Change-Id: I994af55d5e5b2e7f17b889aaa00ca57942bebac8 Reviewed-on: http://git-master/r/4630 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-07-31[ARM/tegra] power: Added run-time LP0/LP1 selection.Alex Frid
Added sysfs node /sys/power/nvrm/core_lock to dynamically select lowest tegra power state in conjunction with static ODM query: - if ODM query specifies DeepSleep as lowest power state and core_lock is cleared, tegra platform enters DeepSleep (LP0) when system is suspended - if ODM query specifies DeepSleep as lowest power state and core_lock is set, tegra platform enters Suspend (LP1) when system is suspended - if ODM query specifies any state other than DeepSleep as lowest power state, core_lock is ignored (tegra platform follows ODM specification in suspend) Addresses bug 697619, facilitates LP0/LP1 testing. Change-Id: Id2d046ba202cf7630cff5e9b524995ec5e867eaa Reviewed-on: http://git-master/r/4127 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-07-29odm:Get AlwaysON prop of SDIO slot from odm query.Pavan Kunapuli
Always ON property of SDIO slot is queried from odm. Bug 703457 Change-Id: I207183b598e92306b42eab75b3395564d171a510 Reviewed-on: http://git-master/r/4383 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-07-29tegra video: add driver for host1x hardwareAndrew Howe
The graphics hardware modules on Tegra family of SOCs are accessed via the host1x dma and synchronization engine. This driver exposes an userspace interface for submitting command buffers to 2d, 3d, display and mpe hardware modules and accessing the module register apertures for exclusive use hardware modules. Additional features of the driver include: - interrupt-driven hardware module usage synchronization - automatic clock management for hw modules - hardware context switching for 3d registers Change-Id: I693582249597fd307526ff3c7e35889d37406017 Reviewed-on: http://git-master/r/4091 Reviewed-by: Janne Hellsten <jhellsten@nvidia.com> Tested-by: Janne Hellsten <jhellsten@nvidia.com>
2010-07-22[ARM/tegra] RM: added LP2 configuration options.Alex Frid
Added configuration options to set default LP2 policy. Change-Id: I81820f575858dda62d31b304b6adf09f7d0f3689 Reviewed-on: http://git-master/r/4164 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-07-15[ARM/tegra] reboot: added reboot notifier callbacks.Alex Frid
- Added DVFS reboot callback that restores nominal core and cpu voltages to guarantee boot-rom operations at boot frequencies (bug 685745) - Added platform reboot callback that turns On USB Phy power as required by boot-rom (bug 706646) - Replaced in arch_reset() CAR system reset with PMC main reset. The latter has wider scope, and forces boot-rom to to re-sample strap options. Added endless loop immediately after PMC reset (kernel has it after 1ms delay implemented by polling us-timer - better to avoid reset during h/w access) Change-Id: I55301c599baf8fb00566413732c876e66c1ccb1e Reviewed-on: http://git-master.nvidia.com/r/3977 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-07-13[arm/tegra] nvrm dma: Option to select peripheral bus width.Laxman Dewangan
It is require to change the peripheral bus width dynamically. Provide option to select the peripheral bus width through the structure NvRmDmaClientBuffer. The bus width information is passed with upper 16 bit of the wrapsize parameter which is member of struct NvRmDmaClientBuffer. Change-Id: I3e1dc84c08b98d7337ca7e661715abb3dc54667a Reviewed-on: http://git-master.nvidia.com/r/3243 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-07-13[arm/tegra] odm_query: Adding dap connection index.Vinod G
Added a new dap connection index to use with Test applications. This index is suppose to be used only from Application, not to be used in the odm query table. bug 686350 Change-Id: I26fc5b61fdc0dd79f0a13f8dfb3b09bc29450b88 Reviewed-on: http://git-master/r/3739 Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-07-13[ODM Query] add Purpose field to NvOdmIoAddressDavid Schalig
Specifies purpose of address definition as an adaptation local ID. ODM adaptations can use this member to parse connectivity tables from ODM query more easily, by enumerating all addresses they expect under their GUID, and populating this member with an enum value. So far address definitions were identified by their order in the table, this was more error prone and is now eliminated. For backward compatibility use is optional. bug 685553 Change-Id: Id4c599bd40305a770426785a6acb76d38e44eb9d Reviewed-on: http://git-master/r/3866 Reviewed-by: David Schalig <dschalig@nvidia.com> Tested-by: David Schalig <dschalig@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-07-05[arm/tegra] suspend: add more config for LP0Bharat Nihalani
Following pmc registers configuration are added before entering deep power down (LP0): DPD_SAMPLE: Enabling sampling of pads before entering into LP0. DPD_ORIDE: Providing api to configure the kbc pins override before LP0. After LP0 wakeup, clearing the DPD_SAMPLE as per programming guidelines. Cherry-picked change 65675bde4a20bbb8fde86d2629d125fcd084f8db Change-Id: Ia3b5d6a29e626186315dfb199709b73099b04bfb Reviewed-on: http://git-master/r/3533 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-06-29[tegra/aes] Add LP0 suspend/resume support for AESKasoju Mallikarjun
Adding AES suspend/resume functionality for LP0. Dedicated Key information is stored in the SDRAM using RFC-3394 key wraping algorithm. Dedicated slot information is restored back in the H/W during resume from LP0 by unwraping the key from SDRAM using RFC-3394 key unwraping. AES clocks are turned on only during the AES operations and are turned off after completion of the operations. Bug 700494 Change-Id: I49f7fc76c8d6157e5c1b94299c3f4bf58cd2512a Reviewed-on: http://git-master.nvidia.com/r/3219 Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Phillip Smith <psmith@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-29tegra: [RTC Alarm Clock] Implement TI pmu tps6586x by PMIC (pwr_int) pinrhsieh
Integrate PMU RTC alarm function from K29 to K32. Bug 701881 Change-Id: Iee137be5a2e9a369611037da4c39b9f443ce8979 Reviewed-on: http://git-master/r/3265 Reviewed-by: Ching Kuang (Roger) Hsieh <rhsieh@nvidia.com> Tested-by: Ching Kuang (Roger) Hsieh <rhsieh@nvidia.com> Reviewed-by: Wilson Chen <wichen@nvidia.com> Reviewed-by: Antti Hatala <ahatala@nvidia.com>
2010-06-25[ARM/tegra] RM: Moved PMU related RM suspend/resume.Alex Frid
Moved PMU related suspend procedures from RM kernel suspend to the PM_SUSPEND_PREPARE pm_notifier callback. This is necessary as RM kernel suspend is invoked after interrupts are disabled, and no interrupt based transactions can be used. Similarly, moved PMU resume configuration to the PM_POST_SUSPEND pm_notifier callback. Bug 701894 Change-Id: I1614a968cc1b039f809b165877fcf1595c7cc596 Reviewed-on: http://git-master/r/3221 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-24[ARM/tegra] harmony ODM: add ventana support to PMU adaptationGary King
move the GPIO enable pin definitions out of the adaptation code and into the discovery database, so that the PMU adaptation can be used by both harmony and ventana. remove the non-harmony code paths from this driver, since they are not used anywhere Change-Id: Ic6f16a8f246d692df22d785bbf056153ff40ac1a Reviewed-on: http://git-master/r/3107 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-23[ARM/tegra] odm kit: rename GPIO group WakeFromECKeyboardGary King
rename WakeFromECKeyboard to EmbeddedController, to remain compatible with the header file used for bootloader and user-space builds Change-Id: I6051b8ee6853f25df3a5e0d09d2bf67f6c5434b2 Reviewed-on: http://git-master/r/3108 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-22tegra: Clean up conditionals and whitespaceScott Williams
Change-Id: I6855c9cfcfaf2646569fcad5ae0090eb47f11dff Reviewed-on: http://git-master/r/2963 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-18tegra-sdhci: disable polling for hosts with non-removable cardsGary King
hosts with non-removable cards should not need to specify MMC_CAP_POLLING; this causes additional exits from the CPU idle loop. add a field to the platform data to specify that the host is removable, and initialize card_present to true if the host is not removable Change-Id: I55d9c8295435deb522977b3e7380abc0f8f05721 Reviewed-on: http://git-master/r/2888 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-18[arm/tegra]serial: Power control api for bluesleep power management.Laxman Dewangan
Adding apis for following function to hooking up tegra serial driver with bluesleep power management: - Clock off. - Clock on. - Setting flow control to desired state. - Checking for tx fifo status. Following 4 state of uart state machine is developed to achieve this: UART_CLOSED, UART_OPENED, UART_SUSPEND, UART_CLOCK_OFF. The transitions of states are as follows: UART_CLOSED: the init state on which resource is allocated but not opened by client or when device is closed. UART_OPENED: Able to do data transfer. CLOSED to OPENED by opening the port. CLOCK_OFF to OPENED by calling function tegra_uart_request_clock_on(). SUSPEND to OPENED by calling resume(). UART_CLOCK_OFF: The controller clock is disabled and so no data transfer can happen. At this state, controller is not ready for deep power down. OPENED to CLOCK_OFF by calling tegra_uart_request_clock_off(). Can not go to this state from CLOSED and SUSPEND. UART_SUSPEND: The controller is in suspended state and ready for deep power down. UART_CLOCK_OFF to SUSPEND: OPENED to SUSPEND. Change-Id: Ib0c40547665181cadd172840be9aed2cc18ba448 Reviewed-on: http://git-master/r/2819 Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com> Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com> Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-15[ARM/tegra] Apply 2.6.29 USB network driver fixes to 2.6.32Michael Hsu
Bug 596345 Fixes USB CDC class modem, IP packet corruption. Change-Id: Ib703ed1e226d1d659038f3ebb61674e912ec73c4 Reviewed-on: http://git-master/r/2626 Reviewed-by: Michael Hsu <mhsu@nvidia.com> Tested-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-14[ARM/tegra] spi: Adding support for the hw based CS.Laxman Dewangan
It is require to use the hw based CS to meet the timing requirement as: - Minimum CS setup time i.e. time from CS active to first clock. - Maximum CS hold time i.e. CS should be active after last clock. SW based CS can support the above 1 but not 2 because it dpeneds on os load and system performance. To meet the above requirements, it is require to enable the hw based CS. As spi controller support for the hw based CS for the smaller number of packet, enabling this feature. Driver use the sw based CS by default. If client want to use the hw based CS, then it need to enable this through nvodm query NvOdmQuerySpiDeviceInfo table for different CS. For this, client need to set device info as CanUseHwBasedCs = TRUE, CsSetupTimeInClock = xx CsHoldTimeInClock = xx Change-Id: I9e943e0b39f2d75272826cc2ec7687b3434b1c2a Reviewed-on: http://git-master/r/2536 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-11tegra: Move SOC-specific pinmux data to SOC-specific filesScott Williams
Change-Id: I9bb3607e9605eefd5c0eec07a8be3fafce9bae64 Reviewed-on: http://git-master/r/2528 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-11tegra: gpio based keyboard driver for E1206 platform.Laxman Dewangan
Adding the gpio based keyboard driver support for the E1206 based platform. The gpio-key driver will get the platform data from odm. The odm will return gpio pin group information for E1206 based platfrom otherwise return NULL. The gpio pin information is converted to platform data which will be used by the gpio key driver. Change-Id: I9fd34f82abef86157a92aabcb01cc3ebe0059886 Reviewed-on: http://git-master/r/2420 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-11[ARM/tegra] suspend: add scratch register mapping for tegra 2 LP0Gary King
to restore from LP0, a large number of memory, arbitration and PLL settings need to be preserved in scratch registers in the AO domain for the boot ROM to reload them after exiting LP0. Change-Id: Ic446ef47c3cba9b792dd7b86b176157757504bde Reviewed-on: http://git-master/r/2154 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-10[ARM/tegra] ODM: added PMU power off properties.Alex Frid
Added support for wake event delay, and CPU power off time controls. Exposed the respective settings as ODM PMU properties. Bug 690326. Change-Id: I2c30365de3fce4e2d45b1e66c7af9087f10d8451 Reviewed-on: http://git-master/r/2377 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-10[ARM/tegra] RM: expanded CPU power off (LP2) policies.Alex Frid
Expanded CPU power off (LP2 state) policies as follows: (a) "Enter in Low Corner" - LP2 is entered and DVFS tick interrupt is masked only when DVFS is in low corner. (b) "Mask in Low Corner" - LP2 is entered independently of DVFS, but DVFS tick interrupt is masked only when low corner is hit (c) "Ignore Low Corner" - LP2 is entered and DVFS tick interrupt is masked independently of DVFS low corner. Ported from android-tegra-2.6.29, but set default policy to (c), which is the same as current android-tegra-2.6.32 kernel behavior (on 2.6.29 kernel (a) was default). Added sysfs node to change and evaluate policies. Change-Id: I22e89f4d58dfa2e2fb668154c1ae2cd301fbe1ca Reviewed-on: http://git-master/r/2359 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-10 tegra usb: Resume the device without re-enumerationSeshendra Gadagottu
When fast wakeup feature is supported by a host controller port, then avoid the restarting of controller. Fast wakeup is enabled on the port where device like usb modem is connected always. BUG 692574: Fast Wakeup for USB modems BUG 594395: Fast Wakeup Change-Id: Iaee9f184189f8a1aa8aa0e440879600c0eb625cc Reviewed-on: http://git-master/r/2375 Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-09tegra nvrm: fixing access permission for nvrm.vdumpa
Bug 663469 nvrm is split into two nodes, /dev/knvrm and /dev/nvrm. /dev/nvrm has access to limited set of API's. Added validation of params in the API's that can be accessed from /dev/nvrm. Change-Id: I57c2aae000bf873fe85db00df66ec004c2882b5c Reviewed-on: http://git-master/r/2300 Reviewed-by: Gary King <gking@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com>
2010-06-09tegra framebuffer - dsi one shot supportArthur Spence
DSI one shot support requires register access in the tegra framebuffer to poke the frame trigger bit (with both the trigger bit and the tearing effect signal are high, a frame of pixels will be sent to the panel). The boot args must also be expanded to have a "use tearing effect" flag. tegra RM: Expanded Display clock configuration options. Added an option for restricted Display clock synchronization with MIPI PLL - select MIPI PLL as a pixel clock source, but preserve PLL settings. To specify this option flag NvRmClockConfig_InternalClockForPads should be set by RM client along with NvRmClockConfig_MipiSync flag (in the absence of the former flag, MIPI PLL can be re-configured at RM discretion - current behavior). Change-Id: I495c2d76656efe8653aa5731c07180c2bfcd2fc0 Reviewed-on: http://git-master/r/2342 Tested-by: Arthur Spence <aspence@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-06-09[ARM] tegra: dma: Drop err argument to dma callbacksColin Cross
Change-Id: I78359ccf3defc70e623735925d423cb048f68075 Signed-off-by: Colin Cross <ccross@android.com> Reviewed-on: http://git-master/r/2286 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-09[ARM] tegra: dma: Prevent double-queued requestsColin Cross
Change-Id: I08165ea202530bc65be9d418a889dd0622a3ac4f Signed-off-by: Colin Cross <ccross@android.com> Reviewed-on: http://git-master/r/2285 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-07[ARM/tegra] add cryptographic engine (AES) driverGary King
Supports CBC & ECB encryption/decryption, AnsiX9.31 RNG, SSK/SBK/User Key, fine-grain uid/gid access control and ability for privileged user to reset the engine. A device node (/dev/nvaes) is provided to enable access from user-land. based on work done by David Le Tacon (dletacon@nvidia.com) Change-Id: I1a9c29b964ca15e6fec70389c2000306ef604086 Reviewed-on: http://git-master/r/2216 Reviewed-by: David Le Tacon <dletacon@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-06-07tegra power: Create a new power state called SimpleSuspendtkasivajhula
This new power state corresponds to doing an LP2 like operation at the end of Linux's suspend/resume sequence. When LP1/LP0 are working, we can replace SimpleSuspend with the real Suspend/DeepSleep operations. The SimpleSuspend state can also be used as a "sanity" state to assist in debugging power issues. Change-Id: Id7d2df0b263c0e2dc2b6bfe1e2f647a9c0d2f747 Reviewed-on: http://git-master/r/2160 Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-05-28[ARM/tegra] add a vibrator timed_output driver for tegra ODM kitGary King
Change-Id: I82b4c5b61f6a52ae3ebc93a28219c15da446b040 Reviewed-on: http://git-master/r/1831 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-05-28input: misc: add accelerometer driver for tegra ODM kitGary King
Change-Id: I60f52fc6e91839abb11333e44fb77fdda85841f1 Reviewed-on: http://git-master/r/1830 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-05-28input: misc: add input driver for tegra scrollwheel ODM kitGary King
Change-Id: I79ca91a26094567207eb55837b908086209cfcf2 Reviewed-on: http://git-master/r/1829 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-05-28w1: add one-wire master driver for tegraGary King
Change-Id: I9b7a7cb461f5b7f5d4623050ed6184426e14400f Reviewed-on: http://git-master/r/1820 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-05-27regulator: tegra: add charger support to the tegra regulator driverGary King
add new fields to the platform data structure to allow specification of chargers (current sources) vs regulators (voltage sources) on the platform Change-Id: If4d0b2520a37afb96d103d6cbf78ec2fba2d02f9
2010-05-27tegra-kernel-fuse: Add fuse burning support from Linux via sysfsVenu Byravarasu
A fuse module is added to support programming and reading back fuse values. This module is built as part of kernel. Bug 657504 Tested on: Whistler Change-Id: I5663679c8d41834aa4077e9940a0595f6575af64 Reviewed-on: http://git-master/r/1259 Reviewed-by: Andy Carman <acarman@nvidia.com> Tested-by: Andy Carman <acarman@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-05-27spi: add spi master driver for NVIDIA Tegra SoCsGary King
Change-Id: I8d2834f5b7e73cd6a1eb6584715bdd707e23e830
2010-05-27i2c: tegra: switch to using the NVIDIA RM-based I2C driverGary King
since the RM APIs are used by ODM kits prior to device initialization (to read EEPROMs and the like), implementing the RM on top of Linux's I2C API won't happen immediately Change-Id: I8a97e13a7fda8bafaf74e2251e8bd1b0e32dc058
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-29 23:30:41 +0000