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Tegra3 also supports LPDDR2 which has no tiled memory inefficiency as in DDR3.
This patch adds one memory controller API to retrive tiled memory efficiency.
BUG 847731
Change-Id: I407914c6035389b696040947e7aebc6ecdb92bb1
Reviewed-on: http://git-master/r/40074
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Change SOC conditionals to make them more forward-looking.
Change-Id: Ib60db4e690c2f396afdec962616d735548b5a8a9
Reviewed-on: http://git-master/r/32706
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
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Bug 764354
Original-Change-Id: I8a390eb4dae87dceacb97461f23d13554868b046
Reviewed-on: http://git-master/r/12228
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: I8e6b8303898796419fb5a759cd16edff9aeac081
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Change-Id: Id9b157004f7364fb1f7aaffa925b710dcfb90e86
Signed-off-by: Erik Gilling <konkers@android.com>
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