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This reverts commit 95730406a0e3bbd7f862718782924a3c367845a1.
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Integrate optional eDP support (e.g. uncomment define of APALIS_TK1_EDP
as found in the platform data header file.
Tested using a prototype Apalis TK1 mezzanine connecting to a Samsung
LTN156FL02-L01 panel featuring a 4K aka UHD resolution of 3840 by 2160.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
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Move Tegra pwm driver registration to DT from board files.
Make the tera pwm as always enabled from DTS.
The motiviation is to make the pwm driver registration to
independent of panel driver as pwm can be used for other
purpose than backlight support only.
Change-Id: I1098e976d0a0e9ebf154b5ea503df38b917f1c09
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/360433
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Revised system edp software framework has been put in place. This
patch removes old system edp client initialization for backlight
clients in all platforms.
Bug 1431977
Change-Id: If7ac88ee6f08ebae6d8e907453e0471dc08af958
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/350400
Reviewed-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Kernel should pickup the right size from EDID.
Bug 1389863
Change-Id: Ief16b4d0fdb0a3c0247ffdb3bcb156d29be8a307
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/354468
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Change-Id: I5cff883aa597b9e081dd32fbc0cd6d6630ad7713
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/353472
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
GVS: Gerrit_Virtual_Submit
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It can now be detected from EDID
Change-Id: Ia4ea9cccafd6b3774a3e1f8bf7290474fbc50fc6
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/347674
GVS: Gerrit_Virtual_Submit
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Change-Id: I3c1e8f2c58a0e90340e4d1d562aec72e0038da45
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/331385
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>
Tested-by: Chao Xu <cxu@nvidia.com>
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The configurable data of PRISM should be tuned per panel.
So PRISM settings are needed to move from board-<platform>-panel.c
to the specific panel board file.
Bug 1391869
Change-Id: I70d28d7813cb21fc46a421a40e3cf53cb98d4a03
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/303813
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>
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regulator_get() returns either error pointer or valid pointers.
It never returns NULL. Hence it is not a correct to check
the return pointer as IS_ERR_OR_NULL(). It should be only IS_ERR().
Bug 1410234
Change-Id: I8cf668ca0bced49ee4f47ccf9b02d70fd0263cd6
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/334471
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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This change is for adding edp client for backlight for
auo 1080p 14" panel ,which is default panel for laguna.
Bug 1399057
Change-Id: I2c421098f76f928675a5906147cbc3e23e96ed3e
Signed-off-by: Tejas Sonchhatra <tmanoj@nvidia.com>
Reviewed-on: http://git-master/r/332731
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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This change prevented 25x16 panel from booting.
This reverts commit 30014ab843618322bb487e1e9e52edec3dfac4b6.
Change-Id: I0e41b1215772938be54faea6e5884177184c4036
Reviewed-on: http://git-master/r/309812
Tested-by: Mitch Luban <mluban@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
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Add DT entry for PWM controller and Backlight for NVIDIA's
Tegra 114,124 SoCs.It has 4 PWM controllers.
Bug 1256106
Change-Id: Ia927d3231db1a07490b5027c1f23d8e736173f30
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/299035
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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pwm-backlight driver will check whether pwm_gpio is a valid gpio
by gpio_is_valid. If it's a valid gpio pin, it will use
it as a pwm output pin. If not, it will ignore and the pwm
output pin should be configured in board files. But pwm_gpio
is 0 by default and 0(TEGRA_GPIO_PA0) is a valid gpio.
So the pwm-backlight drvier will do gpio_request(TEGRA_GPIO_PA0)
and gpio_free(TEGRA_GPIO_PA0). This is definetly wrong.
So set pwm_gpio to TEGRA_GPIO_INVALID for those panels which
pwm output pin is set in board files to fix the wrong behavior.
Change-Id: I96e451b1f82c494731e29c09695a399d46c243b9
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/267752
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Temporal dithering causes DC to generate inconsistent CRC values,
which is inconvenient for the display tests.
Bug 1343680.
Change-Id: I5adbc35c20e92b7174278caffa71b75e952fa0ce
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/263435
Reviewed-by: Xue Dong <xdong@nvidia.com>
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Bug 1327199
Change-Id: I702fbf52d9c19dc604cee1c0708df31f1efcbec9
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/249996
(cherry picked from commit 8af03db4d1e046c5d33371d81354a3e73f556c0e)
Reviewed-on: http://git-master/r/252086
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Change-Id: I17d740d95e8fe5ca52264db9e467ae6e34c7d6fa
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/246954
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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Bug 1306592
Change-Id: I2ad2c3a875712ecb359569c1ec79c914eb352ebc
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/243711
Reviewed-by: Chao Xu <cxu@nvidia.com>
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