Age | Commit message (Collapse) | Author | |
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2011-01-20 | [arm/tegra] Correct PWM clock programming. | Kenji Chen | |
For PWM parent select, the field locates at bit[30:28] of the CLK_RST_CONTROLLER_CLK_SOURCE_PWM_0. For PWM divider, it is 0-based, not 1-based. Change-Id: Ibbfacafe7651c080b1e535075ab84d04e1830ec7 Reviewed-on: http://git-master/r/14739 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> | |||
2010-10-06 | [ARM] tegra: add PWM driver | Gary King | |
add support for the pulse-width-modulation APIs using the tegra 2 internal PWM controllers Change-Id: If313301aaebab01f08edbe120060537e6917ea4b Signed-off-by: Gary King <gking@nvidia.com> |