index
:
linux-toradex.git
colibri
colibri_vf
tegra
tegra-next
toradex_4.1-2.0.x-imx
toradex_4.1-2.0.x-imx-next
toradex_4.14-2.0.x-imx
toradex_4.14-2.0.x-imx-next
toradex_4.14-2.0.x-imx-rebased
toradex_4.14-2.3.x-imx
toradex_4.19.y
toradex_4.19.y-rt
toradex_4.20.y
toradex_4.9-1.0.x-imx
toradex_4.9-1.0.x-imx-next
toradex_4.9-1.0.x-imx-rebased
toradex_4.9-2.3.x-imx
toradex_4.9-2.3.x-imx-next
toradex_4.9-2.3.x-imx-rebased
toradex_5.0.y
toradex_5.15-2.0.x-imx
toradex_5.15-2.1.x-imx
toradex_5.15-2.2.x-imx
toradex_5.2.y
toradex_5.3.y
toradex_5.4-2.1.x-imx
toradex_5.4-2.3.x-imx
toradex_5.4.y
toradex_6.6-2.0.x-imx
toradex_6.6-2.1.x-imx
toradex_imx6
toradex_imx_3.10.17_1.0.0_ga
toradex_imx_3.10.17_1.0.0_ga-next
toradex_imx_3.14.28_1.0.0_ga
toradex_imx_3.14.52_1.1.0_ga
toradex_imx_3.14.52_1.1.0_ga-next
toradex_imx_4.1.15_1.0.0_ga
toradex_imx_4.1.15_1.0.0_ga-next
toradex_imx_4.14.78_1.0.0_ga-bring_up
toradex_imx_4.9.123_imx8mm_ga-bring_up
toradex_imx_4.9.51_imx8_beta1-bring_up
toradex_imx_4.9.51_imx8_beta1-bring_up_ov5640
toradex_imx_4.9.51_imx8_beta2-bring_up
toradex_ti-linux-5.10.y_bringup
toradex_ti-linux-6.1.y
toradex_ti-linux-6.6.y
toradex_tk1_l4t_r21.5
toradex_tk1_l4t_r21.6
toradex_tk1_l4t_r21.7
toradex_tk1_l4t_r21.7-next
toradex_vf_3.18
toradex_vf_3.18-next
toradex_vf_4.0
toradex_vf_4.0-next
toradex_vf_4.1
toradex_vf_4.1-next
toradex_vf_4.4
toradex_vf_4.4-next
Linux kernel for Apalis and Colibri modules
Toradex
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path:
root
/
arch
/
arm
/
mach-tegra
/
reset-handler.S
Age
Commit message (
Expand
)
Author
2015-05-04
ARM: tegra20: Store CPU "resettable" status in IRAM
Dmitry Osipenko
2014-11-17
ARM: tegra: Re-add removed SoC id macro to tegra_resume()
Dmitry Osipenko
2014-07-17
ARM: tegra: Use a function to get the chip ID
Thierry Reding
2014-07-17
ARM: tegra: Sort includes alphabetically
Thierry Reding
2014-05-30
ARM: l2c: tegra: convert to common l2c310 early resume functionality
Russell King
2013-10-18
ARM: tegra: make tegra_resume can work with current and later chips
Joseph Lo
2013-08-12
ARM: tegra: add common resume handling code for LP1 resuming
Joseph Lo
2013-07-19
ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15
Joseph Lo
2013-07-19
ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9
Joseph Lo
2013-06-05
ARM: tegra: remove ifdef in the tegra_resume
Joseph Lo
2013-05-22
ARM: tegra114: add CPU hotplug support
Joseph Lo
2013-05-22
ARM: tegra: make tegra_resume can work for Tegra114
Joseph Lo
2013-05-22
ARM: tegra: add an assembly marco to check Tegra SoC ID
Joseph Lo
2013-04-18
ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled
Joseph Lo
2013-03-11
ARM: tegra: don't unlock MMIO access to DBGLAR
Joseph Lo
2013-03-11
ARM: tegra: add CPU errata WARs to Tegra reset handler
Stephen Warren
2013-01-28
ARM: tegra: make device can run on UP
Joseph Lo