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path: root/arch/arm/mach-tegra/reset.c
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2014-05-30ARM64: tegra132: add aarch64 trampoline for DenverPeng Du
Denver resets into AARCH32 after each architectural reset. SW needs to execute a specified sequence to switch into AARCH64 mode. This change adds this sequence. Bug 1509408 Bug 1481103 Bug 1518263 Change-Id: I7e688603f7f79676e0c665b74c1c3ee921b8bef1 Signed-off-by: Peng Du <pdu@nvidia.com> Reviewed-on: http://git-master/r/406606 Reviewed-by: Bo Yan <byan@nvidia.com>
2014-03-14ARM: tegra: remove CONFIG_USE_SECURE_KERNEL usageVarun Wadekar
Remove the config variable usage from the kernel and make the secure firmware check dynamic. This make LP1 resume tricky since we need to execute out of TZRAM till SDRAM is out of self-refresh. To fix this, store secure firmware presence bit in TZRAM during boot. Bug 1475528 Change-Id: Ic18766bbee14626e8cf092363d57f4d98b44b6df Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/377616
2014-03-14arm: tegra: use PSCI interfacesVarun Wadekar
ARM defines PSCI interfaces to be used for power states. We have been using the actual semantics for quite some time now and so can remove our implementation of the SMC issuing code and use the generic interfaces present in <arm/arm64>/kernel/psci.c. Bug 1475528 Change-Id: Ieba8a0a54f5ee731626e7d92a767ef044e88f12d Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/378354
2014-03-07arm: tegra: initialize cpu reset handler using early_initcall()Varun Wadekar
tegra_cpu_reset_handler_init() was called during SMP prepare explicitly. In order to use PSCI calls during cpu reset handler init, it needs to be initialized using early_initcall(). The ARM init code makes sure that all early_initcalls are invoked before SMP is enabled. Cleanup the ARM64 version as well. Bug 1475528 Change-Id: I24d424b1c2ade4d5737764d6c5378b57ed3f8c7b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/378351 Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
2014-02-20security: tlk_driver: support for secure ARM64 buildsChris Johnson
The only remaining warnings are in the non-compat path, which will be removed, once we get the ote/lib change to use the new structs. Bug 1432005 Change-Id: Ie0bc95a76a8d5ace91ca0b0bf69ac15852007dc7 Signed-off-by: Chris Johnson <cwj@nvidia.com> Reviewed-on: http://git-master/r/369403 Reviewed-by: Scott Long <scottl@nvidia.com>
2014-02-09Revert "ARM: tegra: trustzone: Single kernel to work in both secure and ↵Varun Wadekar
non-secure mode." This reverts commit 7f93a0dddf39f372c064f772f9af6903e91aaacf as the t132ref builds break with the following errors - <android>/kernel/drivers/platform/tegra/../../../arch/arm/mach-tegra/reset.c:45: undefined reference to `is_secure_mode' <android>/kernel/drivers/platform/tegra/../../../arch/arm/mach-tegra/reset.c:57: undefined reference to `is_secure_mode' <android>/kernel/drivers/platform/tegra/../../../arch/arm/mach-tegra/reset.c:58: undefined reference to `tegra_generic_smc' Change-Id: I4e44c2ffba4e1c013213e543b67f2d49a928b764 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/365347
2014-02-09ARM: tegra: trustzone: Single kernel to work in both secure and non-secure mode.Nitin Sehgal
- Remove CONFIG_TEGRA_USE_SECURE_KERNEL config option - Use DBGDSCR.NS bit to dynamically get secure/non-secure mode - Replace ifdefs with dynamic code. - Keep CONFIG_TRUSTED_LITTLE_KERNEL to enable secure os bug 1411345 Change-Id: I75ddfed7a35fcb30e2772bb43057ae022bcf09b3 Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com> Reviewed-on: http://git-master/r/353155 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com>
2014-01-21ARM: tegra: make misc reset data 64bit-safePeng Du
Bug 1310370 Change-Id: I50b5a0c81500152e9bd0cc8e64f3d9ecbe0782ab Signed-off-by: Peng Du <pdu@nvidia.com> Reviewed-on: http://git-master/r/268872 Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
2014-01-21ARM: tegra: fix arch header includes for ARM64Peng Du
Change-Id: Iec07f74b6c84dfabc68c8a10c91022b9ae51d9c1 Signed-off-by: Peng Du <pdu@nvidia.com>
2013-12-03arm: tegra: use ARM's DEN0028 v0.9 and PSCI specs to define SMCsVarun Wadekar
Use SIP Service calls (0x82000000x) and Standard Service calls (0x8400000x) from the DEN0028 spec. PSCI says that we need to use 0x8400000x in r0 for any power management features i.e. cpu idle/hotplug/on/off followed by the actual cpu state (LP2/LP1/LP0) in r1. This translates to Std service calls space mentioned in the DEN0028 spec. The SIP service calls can be used by silicon partners for their CPU specific settings. We use this SMC space for L2 settings and to set the CPU reset vector. SMCs that are interrupted return a special status code to the NS world. Look for that status and send a restart SMC (value = 60 << 24) when received. Also removed save/restore of r4-r12 as we rely on the secure OS to do this for us. Change-Id: I6fae83cc96d29c23305177df770fa07f7970c383 Signed-off-by: Scott Long <scottl@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/329998
2013-11-05fuse: cleanup unwanted fuse related dataShardar Shariff Md
cleanup of unwanted fuse related data as a part of migration of fuse driver Bug 1380004 Change-Id: I78ff9f6b1d3a27ae0ba0369ad9692c40e9e24bfd Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Reviewed-on: http://git-master/r/310037 Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2013-10-21arm: tegra: fuse: replace globals with functionsShardar Shariff Md
Replace globals tegra_sku_id, tegra_chip_id & tegra_bct_strapping with below functions u32 tegra_get_sku_id(void); u32 tegra_get_chip_id(void); u32 tegra_get_bct_strapping(void); Bug 1380004 Change-Id: I43eb2523e4af5d06bc1aa1f03c02c5168577878c Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Reviewed-on: http://git-master/r/300401 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2013-09-14ARM: tegra: Move platform detect from <mach/hardware.h> to <linux/tegra-soc.h>Dan Willemsen
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Change-Id: I13f3ff891510d2c868f609d507149b32183d34c5
2013-09-14arm: tegra: skip reset_handle_enable for dsimPeng Du
The memory map of DSIM/MTS in aarch64 config doesn't map IRAM (0x40000000 is a hole). This change works around this quirk by disabling the reset handler enable function. Change-Id: I74efd5d0e78ee5fba51fe525ca98efc7e202dd68 Signed-off-by: Peng Du <pdu@nvidia.com> Reviewed-on: http://git-master/r/206377 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
2013-09-14ARM: Tegra: Add CONFIG_TEGRA_USE_SECURE_KERNELJames Zhao
This new config would only be enabled when we enable a secure os implementation. This config would be generic and we can reuse it if/when we change the secure os vendor. Change-Id: I94a0a365d4dc834fafa1137a0c0d9adf1b394c51 Signed-off-by: James Zhao <jamesz@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/211756 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chris Johnson <cwj@nvidia.com>
2013-09-14ARM: tegra: remove duplicate defines for chip_idMayuresh Kulkarni
- the chip id have been defined in 2 places: fuse.h as TEGRAXX & mach/hardware.h as TEGRA_CHIPID_TEGRAXX - some part of code used defines from fuse.h while others used mach/hardware.h - this commit removes the defines in fuse.h and converts all the code to use the defines from mach/hardware.h - kernel in dev-chips is also using defines from mach/hardware.h Change-Id: Ia65f8ead3f8eccdd6cba4a159c3d0e16a2566e41 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/208375 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-14Revert "ARM: tegra: make tegra_cpu_reset_handler_enable() __init"Varun Wadekar
This reverts commit c1389ce1e02c1e1f617d7cf70852ad5d9f9ef355 as it breaks LP0 resume. Clearly, this was not tested before pushing upstream. Change-Id: Iaf0a40f5c290c6f73c84b5d5bbba33d70c373a49 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Rebase-Id: R6aed1954d5d59ae5ff903b691ec0cf8784bbe5d3
2013-09-14ARM: tegra: Clean up CACHE_L2X0 conditionals and includesScott Williams
Signed-off-by: Scott Williams <scwilliams@nvidia.com> (cherry picked from commit 859d063878ed63683f3eddd3fd74b5f17c2282fc) Change-Id: I8f8efca1d78e319138eaa9e5fed6a6a3d53ab22e Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/79140 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mark Stadler <mastadler@nvidia.com> Rebase-Id: Rea4d0c1e01148a4dab7474393f97fc7731fb879b
2013-09-14unknown changes from android-tegra-nv-3.4Dan Willemsen
Rebase-Id: R940fad74c7e91ef3d1d3d589a48064ccb7335541
2013-09-14ARM: tegra: Clean up CACHE_L2X0 conditionals and includesScott Williams
Change-Id: I9862e73f264c757f97aaad03f3373fb1d3e95462 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/79138 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: Rdc37802af0eec642a65fa1ac272dc2c8a3361590
2013-09-14arm: tegra: add Trusted Foundations hooks and driverChris Johnson
Add CONFIG_TRUSTED_FOUNDATIONS build option and calls to issue SMCs to the TL secure monitor (used when needing to update state not writable by non-secure code). Make security/tf_driver an optional part of the build, which is part of the TL framework to interact with secure services. Bug 883391 Change-Id: I9c6c14ff457fb3a0c612d558fe731a17c2480750 Signed-off-by: Chris Johnson <cwj@nvidia.com> Reviewed-on: http://git-master/r/65616 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R57977499bb6b372ac4faa360e442e8733265e9f3
2013-09-14ARM: tegra: power: restore reset handler after lp0Jin Qian
Bug 862504 Change-Id: I910f4f229a2040d13d79e2a4f64fd2558509d9e7 Reviewed-on: http://git-master/r/50241 Reviewed-by: Jin Qian <jqian@nvidia.com> Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R3c4d055f1c2ebad76ad2a9305d5e02f5a4411400
2013-09-14ARM: tegra: Redesign Tegra CPU reset handlingScott Williams
- Add a single unified handler for all CPU resets that is copied to IRAM. - Add state information to direct the flow of execution through the reset handler based on the reason a CPU was reset. - Write the EVP CPU reset vector only once per cold/warm boot session. - Prevent modification of the EVP CPU reset vector in Tegra3. Bug 786290 Bug 790458 Change-Id: Ica6707f3514986ee914e73a2d9766a4e06ce2d29 Signed-off-by: Scott Williams <scwilliams@nvidia.com> DW: Split into logical changes Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Rebase-Id: R7b9859a83717e76c3c083bdde724bd5fef9ce089
2013-09-13Revert "ARM: tegra: cpuidle: add CPU resume function"Dan Willemsen
This reverts commit d3f293656c07a1147c11e8c8774d7955a903cee0. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-09-13Revert "ARM: tegra: make device can run on UP"Dan Willemsen
This reverts commit 9e32366fe51fea464adb21c244f372d55207e13c. Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-01-28ARM: tegra: make device can run on UPJoseph Lo
The reset handler code is used for either UP or SMP. To make Tegra device can compile for UP. It needs to be moved to another file that is not SMP only. This is because the reset handler also be needed by CPU idle "powered-down" mode. So we also need to put the reset handler init function in non-SMP only and init them always. And currently the implementation of the reset handler to know which CPU is OK to bring up was identital with "cpu_present_mask". But the "cpu_present_mask" did not initialize yet when the reset handler init function was moved to init early function. We use the "cpu_possible_mask" to replace "cpu_present_mask". Then it can work on both UP and SMP case. Signed-off-by: Joseph Lo <josephl@nvidia.com> [swarren: dropped the move of v7_invalidate_l1() from one file to another, to avoid conflicts with Pavel's cleanup of this function, adjust Makefile so each line only contains 1 file.] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: cpuidle: add CPU resume functionJoseph Lo
The CPU suspending on Tegra means CPU power gating. We add a resume function for taking care the CPUs that resume from power gating status. This function was been hooked to the reset handler. We take care everything here before go into kernel. Be aware of that, you may see the legacy power status "LP2" in the code which is exactly the same meaning of "CPU power down". Based on the work by: Scott Williams <scwilliams@nvidia.com> Colin Cross <ccross@android.com> Gary King <gking@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: move irammap.h to mach-tegraStephen Warren
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../irammap.h" becaue of this change. Both these usages will be removed shortly, when Tegra's DEBUG_LL implementation is updated not to pass information through IRAM. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: move iomap.h to mach-tegraStephen Warren
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../iomap.h" becaue of this change. uncompress.h will soon be deleted in later multi-platform/single-zImage patches. debug-macro.S will need to continue to include this header using an explicit relative path, to avoid duplicating the physical->virtual address mapping that iomap.h dictates. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-18ARM: tegra: make tegra_cpu_reset_handler_enable() __initStephen Warren
This solves a section mismatch warning. I hadn't noticed this before, because my compiler was inlining tegra_cpu_reset_handler_enable() inside tegra_cpu_reset_handler_init(), which is already __init, but I switched compilers and it stopped doing that. Cc: <stable@kernel.org> # v3.4 Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-26ARM: tegra: rework Tegra secondary CPU core bringupPeter De Schrijver
Prepare the Tegra secondary CPU core bringup code for other Tegra variants. The reset handler is also generalized to allow for future introduction of powersaving modes which turn off the CPU cores. Based on work by: Scott Williams <scwilliams@nvidia.com> Chris Johnson <cwj@nvidia.com> Colin Cross <ccross@android.com> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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