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path: root/arch/arm/mach-tegra/tegra3_speedo.c
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2015-04-14ARM: tegra: hack to make IT parts operate like commercial temp for nowMarcel Ziswiler
As NVIDIA so far was unable to provide us with any proper speedo numbers for their industrial temperature aka IT parts just make SKU 0xB0 aka T30IQS-Ax behave identical to the regular commercial temperature 0xB1 aka T30MQS-Ax for the SKU to speedo ID conversion. This prevents them to fall back to fixed 600 MHz operation and crashing thermal throttling once kicking in due to missing table entry causing a null pointer exception.
2014-03-12Merge branch 'l4t/l4t-r16-r2' into colibriMarcel Ziswiler
Conflicts: drivers/media/video/tegra_v4l2_camera.c reverted to current driver supporting ACM rather than CSI2 drivers/media/video/videobuf2-dma-nvmap.c drivers/video/tegra/host/Makefile
2013-11-22ARM: tegra: make SKU 0x81 same as 0xB1 for tegra3tegra-l4t-r16-16.4Shreshtha Sahu
SKU 0x81 is identical to 0xB1 so same can be used for sku to speedo ID conversion. Bug 1313434 Change-Id: I63f08522878524a05c2a6fb0a82fee90a59a99bd Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com> Reviewed-on: http://git-master/r/334396 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2013-08-12apalis/colibri_t30: hack to force speedo id of 2 for nowMarcel Ziswiler
In preparation for the new Apalis resp. Colibri T30 production lots with either T30IQS-P-A3 or T30MQS-P-A3 chips that due to some bug were locked at 312 MHz force a speedo ID of 2 for now which allows regular operation of up to 1.4 GHz (single core only).
2012-07-30ARM: tegra: Added sysfs knob that checks app profile supportXiao Bo Zhao
Currently app profile is only supported for AP37 hence added sysfs knob that uses cpu_speedo_id in order to check app profile support Bug 1003531 Change-Id: I12b9bc1700b3c925a1f1d51bb00584e7e5d6f0a3 Signed-off-by: Xiao Bo Zhao <xiaoboz@nvidia.com> Reviewed-on: http://git-master/r/117852 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2012-05-16Arm: p1852: dvfs: Added ASIC SKUs as per updated PORMohit Kataria
Automotive platforms are broken down further into 5 Asic skus from 3 ASIC SKUs, updated kernel to reflect these changes. Bug 983555 Change-Id: I75925c5853d4ec2a5c72e430f4c2380e58aae774 Signed-off-by: Mohit Kataria <mkataria@nvidia.com> Reviewed-on: http://git-master/r/101903 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2012-03-26ARM: tegra: dvfs: Add chip sku overrideRay Poudrier
Based on command line parameter, override the sku Bug 925878 Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com> Reviewed-on: http://git-master/r/83241 (cherry picked from commit 24df2878418fc0c5f2b2dd20130df91a23dd042e) Change-Id: Ic8d2408c6e408fcf28f9b64f12866971b753b41e Reviewed-on: http://git-master/r/88864 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-01ARM: tegra: dvfs: Relax Tegra3 lower speedo limitsAlex Frid
Bug 817679 Bug 841336 Signed-off-by: Alex Frid <afrid@nvidia.com> (cherry picked from commit 44e7c117b3188bdd45a6e7dae31e8d3ea78c5d98) Change-Id: I3d6d43a9a6690a8df51b0c84f4e4b6ad244c4fea Reviewed-on: http://git-master/r/86549 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-03-01ARM: tegra: dvfs: Update Tegra3 speedo thresholdsDiwakar Tundlam
Bug 817679 Bug 841336 Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> (cherry picked from commit a4f6d43aa692586654ebb441246f0509fce7fa58) Change-Id: Ie649f71177ed71b8e8c4062a8966f2478bfef7aa Reviewed-on: http://git-master/r/86548 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2012-02-10ARM: tegra: dvfs: Tegra3 speedo detection based on ATE revDiwakar Tundlam
Bug 826289 Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-on: http://git-master/r/78305 (cherry picked from commit fc212121e2c61ce332c3527fd529323f6b8282a1) Change-Id: I2100ce84c41c22e4175109785f10964e06573c80 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-on: http://git-master/r/82705 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-02-03ARM: tegra: dvfs: Add Tegra3 x7 detectionDaniel Solomon
- Detect T37 and AP37 SKUs. - Created a new threshold for T37 Bug 841336 Reviewed-on: http://git-master/r/77661 Change-Id: I78a6875058ebd6bc5e70042aec020c259de0976c Signed-off-by: Daniel Solomon <daniels@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/78708 Reviewed-by: Automatic_Commit_Validation_User
2012-02-03ARM: tegra: dvfs: Add Tegra3 x7 core dvfsAlex Frid
- Added Tegra3 x7 core dvfs entries - Increased EMC, graphics, and UART clocks maximum limits - Updated PLLC configuration table Bug 841336 Reviewed-on: http://git-master/r/76942 Change-Id: Ifa235e60d66d959ad589574c5ebde90eb0b65385 Signed-off-by: Alex Frid <afrid@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/78707 Reviewed-by: Automatic_Commit_Validation_User
2012-02-03ARM: tegra: dvfs: Add Tegra3 x7 CPU dvfs entriesAlex Frid
Bug 841336 Reviewed-on: http://git-master/r/76912 Change-Id: I2806c8e4f08af49edf57f00a43438b1503d6aedb Signed-off-by: Alex Frid <afrid@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/78706 Reviewed-by: Automatic_Commit_Validation_User
2012-01-19arm: tegra3: dvfs: update tegra3 speedo thresholdsKen Chang
bug 921903 Change-Id: I8932dbde45cb0b025ba8a537b528ebec82c3424e Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: http://git-master/r/75130 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/75878 Reviewed-by: Automatic_Commit_Validation_User
2011-12-21ARM: tegra3: dvfs: Added DVFS entriesMohit Kataria
Added dvfs entries for automotive skus Bug 883565, 882186 Change-Id: I6186b682fa82e24c3062bcbf5c2e5580fdf80562 Signed-off-by: Mohit Kataria<mkataria@nvidia.com> Reviewed-on: http://git-master/r/70292 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-11-30ARM: tegra: dvfs: Update Tegra3 xL speedo/nominal voltageAlex Frid
Updated Tegra3 xL core speedo and nominal voltage settings. Re-factored nominal voltage selection, since new data introduced dependency of core voltage on both CPU and core speedo id. Bug 841336 Signed-off-by: Alex Frid <afrid@nvidia.com> (cherry picked from commit 3330ce743434866502fd6b33d7d1718ec4ab4675) (cherry picked from commit a9fb4cbc865e78706c72186ebac286506cd5b301) Change-Id: I244df08153a6a275a2fe331c72e03d03f18a8ea1 Reviewed-on: http://git-master/r/67014 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: Rd35cb9ac1fbcb424548e05d10d5622744394e796
2011-11-30ARM: tegra: dvfs: Tegra3 xL support - SKUs and speedosDiwakar Tundlam
Bug 841336 Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> (cherry picked from commit 92a342487a7bfe68d3c3366bbcd74c44a59f94d6) (cherry picked from commit 5f0a23567f1acfd07325f324d41cea50eab84d80) Change-Id: I793e427c7f738722786c6dd3d29411c75be50f93 Reviewed-on: http://git-master/r/67013 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R7e187fc24adac12f7a91790b74102578ed320e89
2011-11-30ARM: tegra: dvfs: Update Tegra3 x3 speedo thresholdsDiwakar Tundlam
Bug 841336 Reviewed-on: http://git-master/r/64931 (cherry picked from commit 1333406b624bd876cd31cada142d234f4e18b303) Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> Change-Id: Id62e0264962cd7511fc97e3c865f105ca10c65f0 Reviewed-on: http://git-master/r/65908 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Rebase-Id: R8561dc799000fb50a5fa0855133be2afcd2d992b
2011-11-30ARM: tegra: dvfs: Update Tegra3 AP33 speedo thresholdsDiwakar Tundlam
bugid 841336 Reviewed-on: http://git-master/r/62768 (cherry picked from commit 3784f31955117064d84868f8ade148ceffa32c3d) Change-Id: Ic1759b2a18aa960f46767538c0fb7860cd40e422 Reviewed-on: http://git-master/r/64214 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Rebase-Id: R8bff7144287bcbe526de3343e1a5b6fd628e8c7c
2011-11-30ARM: Tegra: dvfs: T33 SKU EDP tableDiwakar Tundlam
Bug 841336 Reviewed-on: http://git-master/r/60779 (cherry picked from commit 4d3f017e2715f50aaca6c7e8dc61e880947f7550) Change-Id: Ib1eeb8729a91162d39fc952eeb7494d8863a03c7 Reviewed-on: http://git-master/r/64204 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Rebase-Id: Rcfa5f6c11e831c4f08e956609ea8f9d98a6111f8
2011-11-30ARM: tegra: dvfs: Update Tegra3 speedo thresholdsDiwakar Tundlam
Bug 841336 Reviewed-on: http://git-master/r/60546 (cherry picked from commit accf2b0e8cb96ac1cd9ea620081004c36673d761) Change-Id: I07615da1f4bae5ebad75e46286701aaecba8b7f8 Reviewed-on: http://git-master/r/62774 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rf596b18fe295288ab4a392559b64fb1f5cc35e23
2011-11-30ARM: Tegra: dvfs: pick speedo_id = 1 if speedo_value < minDiwakar Tundlam
Bug 860231 Reviewed-on: http://git-master/r/46599 (cherry picked from commit 3a85d02f0d61f8d94b864716ce7f3f12e78d62a0) Change-Id: I73d61b766bfa885ebcacbe9f2facd8fc64635903 Reviewed-on: http://git-master/r/62771 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R08596750b3d68357c435f690fb08c884d4da8650
2011-11-30ARM: tegra: dvfs: Update Tegra3 speedo thresholdsAlex Frid
Bug 817679 (cherry picked from commit 58c1334c299ebfbf6c220d97394199ee32209bea) (cherry picked from commit 1a3cdc623eee4277402569da0ed42d5074126df7) Change-Id: I1a8662ae2adc7c3b71e62a10cc241af9200be7d8 Reviewed-on: http://git-master/r/61019 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R156ba2bfe73d8e0d5961b2ff5b26c44a5caa52b1
2011-11-30ARM: tegra: dvfs: Add T30V SKU definitionAlex Frid
Bug 872025 (cherry picked from commit d71aae19a06b591312703d146c9a9adf9f7e729b) Change-Id: If1c0e3b22079b00b9cabfc1e9f4e5c4c5d206f5b Reviewed-on: http://git-master/r/57214 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: R955c084556968ce77450817b993a79aab801ea83
2011-11-30ARM: tegra: dvfs: Update Tegra3 speedo thresholdsAlex Frid
Bug 817679 (cherry picked from commit 86acefef882428c6cad6b761521f74b054adba24) Change-Id: I992c9682fd6bcc9984968f56da661f76a04edecd Reviewed-on: http://git-master/r/57213 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: Ra6cc62a4c7da079e18d09809973741af430ae8f9
2011-11-30ARM: Tegra: dvfs: Fix speedo value thresholds for T30S, T30Diwakar Tundlam
Bug 855816 Original-Change-Id: I75b46b3b1b3452cde3c73622fcef5b26fcd1649d Reviewed-on: http://git-master/r/48237 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R0adfa41fbb6586ac74a400de4c9dd6d734a169ac
2011-11-30ARM: Tegra: dvfs: Added SKU definitions for AP33, T33, T33SDiwakar Tundlam
Original-Change-Id: Ib5432ef2ae023a370b751f8609d3dc7743f34bf1 Reviewed-on: http://git-master/r/46109 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rfde53d5c4d6819494d9c4484e76ab3febfc813a4
2011-11-30ARM: tegra: dvfs: Update Tegra3 speedo thresholdsAlex Frid
Bug 817679 Original-Change-Id: I12374b3e32f0b110fcb2514802f0d8f3c51ea4d1 Reviewed-on: http://git-master/r/45455 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Rebase-Id: Re878058126c5206dc9ce8e05aa2eb2ec20221d49
2011-11-30ARM: Tegra: dvfs: Proc array indep of new T30 char SKUsDiwakar Tundlam
- Make process_ids array independent of SKU to avoid confusion when detecting SKU, speedo_id and parsing process_id. - Added SKU definitions for characterization SKUs of AP30, T30, T30S Bug 855816 Original-Change-Id: I925d54ab6d35e8af038cbfe84ef4b4c076cd596d Reviewed-on: http://git-master/r/43096 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R832f8fb1a34ab700af0c6389fbe5307f334cc54c
2011-11-30ARM: tegra: dvfs: Update Tegra3 speedo thresholdsAlex Frid
Original-Change-Id: I612feb7ef19109f24c462228a600c435a80c6f02 Reviewed-on: http://git-master/r/44239 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R1e2ae4e887aa8ac584453d8866526220aeecb010
2011-11-30ARM: tegra: fuse: Add A03 revision for Tegra3.Krishna Reddy
Original-Change-Id: I9fd1e67b17db69bd835c7474070e453ee37b4b62 Reviewed-on: http://git-master/r/43186 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R8ad876ded62f88d6ff032183a1f9d2b8bb2775b2
2011-11-30ARM: tegra: power: Add package mask to IO pad controlAlex Frid
Modified dynamic IO pad configuration control to support SoC package dependencies: set into "no-io-power state" IO pads that are not bonded out on the particular package. Updated IO power detect table to account for differences in Tegra2 and Tegra3 architecture. Bug 853132 Original-Change-Id: I5f0aedfa784173cc37251ccf4e1dfb4d919db96e Reviewed-on: http://git-master/r/42785 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Rebase-Id: R46208845c32e25340de6b1cebfb6b617c6c7ce4d
2011-11-30ARM: Tegra: dvfs: Separate proc array size for CPU and COREDiwakar Tundlam
Original-Change-Id: I0e6b40bf8379404410dd40bc83fe4da5bd50e4e0 Reviewed-on: http://git-master/r/37973 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R75d67a71f0c54b4a368d48fb89c3185030d5ab8a
2011-11-30ARM: tegra: dvfs: Update DVFS tables with data for T30SDiwakar Tundlam
Change-Id: I38b9752adc9e927935fe7ffe5590c41577a45809 Reviewed-on: http://git-master/r/34381 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R318f6916f8213c25092110a8800eb506d1718b38
2011-11-30ARM: tegra: speedo: Read package info on chips with ENG SKUDiwakar Tundlam
- ENG SKU (0) cannot tell apart T30 and AP30, so use PKG_INFO for it. - Also added SKU for T30S Change-Id: Icb7f5d772bef60e87fae4d1c919c6825698e9489 Reviewed-on: http://git-master/r/33183 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R04f1105c721a7b87c6f694b2680513aed1ad16e4
2011-11-30ARM: tegra: Clear speedo_id on incorrectly fused Tegra3Alex Frid
Original-Change-Id: I9a6e29acadae06360d0f2e2e94c049378758840e Reviewed-on: http://git-master/r/33084 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R43cdc4c1b6475f270de22f348aaf4d3ea5e8db07
2011-11-30ARM: tegra: clock: Fix speedo_id eval for max speedo valueDiwakar Tundlam
Original-Change-Id: Ia36ea70b054262772df39650b5fdc7419be2bfcf Reviewed-on: http://git-master/r/32802 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R90d4deb23bca5ba6bad270c6c6eb54a851ae6a6f
2011-11-30ARM: tegra: clock: Set speedo_id according to actual fused SKUDiwakar Tundlam
- Read SKU_INFO fuse to get A02 SKU info - Update CPU DVFS to use actual SKU info obtained - Enable main table for EDP capping and thermal throttling Original-Change-Id: I7ff3b06476998d77cc3f7a4fc03fb72e26b570db Reviewed-on: http://git-master/r/32084 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: Re91f616032d8045ea2c28822e40f815f3e449931
2011-11-30ARM: tegra: clock: Set Tegra3 CPU maximum rate to 1.4GHzAlex Frid
- Added CPU DVFS tables for Tegra3 chips with 1.4GHz support - Updated speedo thresholds for process corners - Set Tegra3 CPU maximum rate to 1.4MHz. Effective only on boards with EDP table. Otherwise, the default EDP limit keeps rate below 1GHz. Original-Change-Id: Iaca3bb6a5fbfa1bf76131f49d08162fdbe35143f Reviewed-on: http://git-master/r/31887 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R6f077fe6e698d3b4fa7ed475e1926de648208e18
2011-11-30ARM: tegra: power: speedo, cpu, core process ids for tegra3Diwakar Tundlam
Original-Change-Id: If206f26e0f10f666fd7839c1ebb839eeb4899e21 Reviewed-on: http://git-master/r/29879 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Rd2eefa2c3c6775846eb76777565b144ea9e0e58a
2011-11-30ARM: tegra: Add Tegra3 speedo stubsAlex Frid
Original-Change-Id: I05b9b8014062a28a69407c08fc630a280214315e Reviewed-on: http://git-master/r/16661 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: I190f04798473bf4452d00561cae96e45085c3dc0 Rebase-Id: Rad0832a8d7afd74adeaaaf0faaad40e0ac0a8f1d
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-23 02:06:12 +0000