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path: root/arch/arm/mach-tegra/tegra_cl_dvfs.c
AgeCommit message (Expand)Author
2014-03-04Revert "ARM: T132: dvfs: Update dfll request ratio for 1st post silicon table"Krishna Sitaraman
2014-03-03ARM: tegra: dvfs: Update DFLL Fmax@Vmin calibrationAlex Frid
2014-02-24ARM: tegra: dvfs: Add 1st CL-DVFS out disable fenceAlex Frid
2014-02-21ARM: tegra: dvfs: Add CL-DVFS driver compatibilityAlex Frid
2014-02-20ARM: tegra: dvfs: Use safe DFLL caps below minimaxAlex Frid
2014-02-18ARM: tegra: dvfs: Add access to DFLL thermal floorsAlex Frid
2014-02-09ARM: T132: dvfs: Update dfll request ratio for 1st post silicon tableKrishna Sitaraman
2014-02-07ARM: tegra: dvfs: Allow no-tracking DFLL limit readAlex Frid
2014-02-07ARM: tegra: dvfs: Apply guard-band to tuning thresholdAlex Frid
2014-02-03ARM: tegra: Move PWM PMIC binding into DFLL sub-nodeAlex Frid
2014-01-30ARM: tegra: dvfs: Add PWM DFLL device tree supportAlex Frid
2014-01-30ARM: tegra: dvfs: Track CL-DVFS limits changeAlex Frid
2014-01-30ARM: tegra: clock: Update DFLL private data accessAlex Frid
2014-01-29ARM: tegra12: Move DFLL bypass device registrationAlex Frid
2014-01-23ARM: tegra: dvfs: Parse DFLL device tree dataAlex Frid
2014-01-17ARM: tegra: dvfs: Re-factor DFLL output limits controlAlex Frid
2014-01-17ARM: tegra: dvfs: Set DFLL clock data in common codeAlex Frid
2014-01-17ARM: tegra: dvfs: Build DFLL voltage selection mapAlex Frid
2014-01-07ARM: tegra: dvfs: Fix DFLL I2C mode calibrationAlex Frid
2013-12-13ARM: tegra: dvfs: Exempt top floor from SiMon offsetAlex Frid
2013-12-13ARM: tegra: dvfs: Handle SiMon CPU notificationAlex Frid
2013-12-11ARM: tegra: dvfs: Fix DFLL voltage mappingAlex Frid
2013-12-09ARM: tegra: dvfs: Update DFLL profile debugfs nodeAlex Frid
2013-12-04ARM: tegra: dvfs: Support non-sync DFLL monitorAlex Frid
2013-12-04ARM: tegra: dvfs: Work-around DFLL monitor fluctuationsAlex Frid
2013-11-15ARM: tegra: power: Fix DFLL bypass ops return typeAlex Frid
2013-11-15ARM: tegra: dvfs: Update DFLL debugfs profile nodesAlex Frid
2013-11-07ARM: tegra: dvfs: Split CL-DVFS registers accessorsAlex Frid
2013-11-04ARM: tegra: dvfs: Allow GPIO # 0 for DFLL PWM controlAlex Frid
2013-11-04ARM: tegra: dvfs: Fix DFLL undershoot guard-bandAlex Frid
2013-10-30ARM: tegra: dvfs: Show DFLL thermal profiles in debugfsAlex Frid
2013-10-16ARM: tegra: dvfs: Don't enbale DFLL bypass on LP clusterAlex Frid
2013-10-14ARM: tegra: dvfs: Explicitly enumerate CL-DVFS PWM busesAlex Frid
2013-09-26ARM: tegra: dvfs: Limit CL-DVFS calibration rangeAlex Frid
2013-09-26ARM: tegra: dvfs: Prevent CL-DVFS map allocation overflowAlex Frid
2013-09-14ARM: tegra: Move platform detect from <mach/hardware.h> to <linux/tegra-soc.h>Dan Willemsen
2013-09-14ARM: tegra: dvfs: Add CL-DVFS tune high margin dataAlex Frid
2013-09-14ARM: tegra: dvfs: Update DFLL calibrationAlex Frid
2013-09-14ARM: tegra: dvfs: Add DFLL bypass interfacesAlex Frid
2013-09-14ARM: tegra: dvfs: Expand CL-DVFS PWM output controlAlex Frid
2013-09-14ARM: tegra: dvfs: Modify cl-dvfs monitor controlAlex Frid
2013-09-14ARM: tegra: dvfs: Add CL-DVFS PWM mode supportAlex Frid
2013-09-14arm: tegra12: clocks: Update readl/writel callsAlex Van Brunt
2013-09-14ARM: tegra: dvfs: Change CL-DVFS tuning orderAlex Frid
2013-09-14ARM: tegra: dvfs: Invalidate CL-DVFS request when disabledAlex Frid
2013-09-14ARM: tegra: dvfs: Use r-m-w to access CL-DVFS requestAlex Frid
2013-09-14ARM: tegra: dvfs: Add CL-DVFS regulator undershoot guard-bandAlex Frid
2013-09-14ARM: tegra: dvfs: Separate CL-DVFS force mode enableAlex Frid
2013-09-14ARM: tegra: dvfs: Check dynamic output config at run-timeAlex Frid
2013-09-14ARM: tegra: dvfs: Shadow CL-DVFS output range limitsAlex Frid