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Linux kernel for Apalis and Colibri modules
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cache-l2x0.c
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Author
2014-05-30
ARM: l2c: clean up save/resume functions
Russell King
2014-05-30
ARM: l2c: move and add ARM L2C-2x0/L2C-310 save/resume code to non-OF
Russell King
2014-05-30
ARM: l2c: clean up L2 cache initialisation messages
Russell King
2014-05-30
ARM: l2c: implement fixups for L2 cache controller quirks/errata
Russell King
2014-05-30
ARM: l2c: move aurora broadcast setup to enable function
Russell King
2014-05-30
ARM: l2c: only write the auxiliary control register if required
Russell King
2014-05-30
ARM: l2c: write auxctrl register before unlocking
Russell King
2014-05-30
ARM: l2c: provide enable method
Russell King
2014-05-30
ARM: l2c: group implementation specific code together
Russell King
2014-05-30
ARM: l2c: move l2c save function to __l2c_init()
Russell King
2014-05-30
ARM: l2c: pass iomem address into data->save function
Russell King
2014-05-30
ARM: l2c: clean up OF initialisation a bit
Russell King
2014-05-30
ARM: l2c: add and use L2C revision constants
Russell King
2014-05-30
ARM: l2c: rename cache_wait_way()
Russell King
2014-05-30
ARM: l2c: provide generic helper for way-based operations
Russell King
2014-05-30
ARM: l2c: split out cache unlock code
Russell King
2014-05-30
ARM: l2c: provide generic function for calling set_debug method
Russell King
2014-05-30
ARM: l2c: rename OF specific things, making l2x0_of_data available to all
Russell King
2014-05-30
ARM: l2c: tidy up l2x0_of_data declarations
Russell King
2014-05-30
ARM: l2c: add helper for L2 cache controller DT IDs
Russell King
2014-05-22
ARM: l2c: remove outer_inv_all() method
Russell King
2013-12-29
ARM: 7922/1: l2x0: add Marvell Tauros3 support
Sebastian Hesselbarth
2013-09-05
Merge branches 'debug-choice', 'devel-stable' and 'misc' into for-linus
Russell King
2013-08-20
ARM: 7821/1: DT: binding fixup to align with vendor-prefixes.txt
Christian Daudt
2013-08-20
ARM: 7820/1: mm: cache-l2x0: Print the cache size in kB
Fabio Estevam
2013-08-12
ARM: l2x0: use -st dsb option for ordering writel_relaxed with unlock
Will Deacon
2013-05-15
ARM: 7716/1: bcm281xx: Add L2 support for Rev A2 chips
Christian Daudt
2013-04-03
ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug ...
Rob Herring
2013-01-07
ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel
Gregory CLEMENT
2013-01-07
ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT en...
Gregory CLEMENT
2013-01-02
ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier
Rob Herring
2012-11-06
ARM: 7547/4: cache-l2x0: add support for Aurora L2 cache ctrl
Gregory CLEMENT
2012-10-18
ARM: 7545/1: cache-l2x0: make outer_cache_fns a field of l2x0_of_data
Gregory CLEMENT
2012-10-07
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Linus Torvalds
2012-09-15
ARM: 7507/1: cache-l2x0.c: save the final aux ctrl value for resuming
Yilu Mao
2012-09-11
ARM: cache-l2x0: add a const qualifier
Uwe Kleine-König
2012-04-23
ARM: 7398/1: l2x0: only write to debug registers on PL310
Will Deacon
2012-04-23
ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310
Will Deacon
2012-01-20
ARM: cache-l2x0.c: consistently use u32
Russell King
2011-11-21
ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workarounds
Will Deacon
2011-10-26
Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/k...
Linus Torvalds
2011-10-17
ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure mode
Barry Song
2011-10-17
ARM: 7090/1: CACHE-L2X0: filter start address can be 0 and is often 0
Barry Song
2011-10-17
ARM: 7089/1: L2X0: add explicit cpu_relax() for busy wait loop
Barry Song
2011-10-17
ARM: 7009/1: l2x0: Add OF based initialization
Rob Herring
2011-09-13
locking, ARM: Annotate low level hw locks as raw
Thomas Gleixner
2011-09-07
ARM: 7080/1: l2x0: make sure I&D are not locked down on init
Linus Walleij
2011-07-06
ARM: 6987/1: l2x0: fix disabling function to avoid deadlock
Will Deacon
2011-03-16
Merge branch 'misc' into devel
Russell King
2011-03-09
ARM: 6795/1: l2x0: Errata fix for flush by Way operation can cause data corrupti
Santosh Shilimkar
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