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2019-08-29arm64: dts: meson-g12a-x96-max: fix compatibleNeil Armstrong
This fixes the following DT schemas check errors: meson-g12a-x96-max.dt.yaml: /: compatible: ['amediatech,x96-max', 'amlogic,u200', 'amlogic,g12a'] is not valid under any of the given schemas Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-g12a: fix reset controller compatibleNeil Armstrong
This fixes the following DT schemas check errors: meson-g12a-u200.dt.yaml: reset-controller@1004: compatible:0: 'amlogic,meson-g12a-reset' is not one of ['amlogic,meson8b-reset', 'amlogic,meson-gxbb-reset', 'amlogic,meson-axg-reset'] meson-g12a-sei510.dt.yaml: reset-controller@1004: compatible:0: 'amlogic,meson-g12a-reset' is not one of ['amlogic,meson8b-reset', 'amlogic,meson-gxbb-reset', 'amlogic,meson-axg-reset'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-axg: fix MHU compatibleNeil Armstrong
This fixes the following DT schemas check errors: meson-axg-s400.dt.yaml: mailbox@ff63c404: compatible:0: 'amlogic,meson-gx-mhu' is not one of ['amlogic,meson-gxbb-mhu'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gxl: fix internal phy compatibleNeil Armstrong
This fixes the following DT schemas check errors: meson-gxl-s805x-libretech-ac.dt.yaml: ethernet-phy@8: compatible: ['ethernet-phy-id0181.4400', 'ethernet-phy-ieee802.3-c22'] is not valid under any of the given schemas Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix periphs bus node nameNeil Armstrong
This fixes the following DT schemas check errors: meson-gxbb-nanopi-k2.dt.yaml: periphs@c8834000: $nodename:0: 'periphs@c8834000' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' meson-gxl-s805x-libretech-ac.dt.yaml: periphs@c8834000: $nodename:0: 'periphs@c8834000' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix mhu compatibleNeil Armstrong
This fixes the following DT schemas check errors: meson-gxbb-nanopi-k2.dt.yaml: mailbox@404: compatible:0: 'amlogic,meson-gx-mhu' is not one of ['amlogic,meson-gxbb-mhu'] meson-gxl-s805x-libretech-ac.dt.yaml: mailbox@404: compatible:0: 'amlogic,meson-gx-mhu' is not one of ['amlogic,meson-gxbb-mhu'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix watchdog compatibleNeil Armstrong
This fixes the following DT schemas check errors: meson-gxbb-nanopi-k2.dt.yaml: watchdog@98d0: compatible:0: 'amlogic,meson-gx-wdt' is not one of ['amlogic,meson-gxbb-wdt'] meson-gxl-s805x-libretech-ac.dt.yaml: watchdog@98d0: compatible:0: 'amlogic,meson-gx-wdt' is not one of ['amlogic,meson-gxbb-wdt'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix spifc compatibleNeil Armstrong
This fixes the following DT schemas check errors: meson-gxl-s805x-libretech-ac.dt.yaml: spi@8c80: compatible:0: 'amlogic,meson-gx-spifc' is not one of ['amlogic,meson6-spifc', 'amlogic,meson-gxbb-spifc'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix reset controller compatibleNeil Armstrong
This fixes the following DT schemas check errors: meson-gxbb-nanopi-k2.dt.yaml: reset-controller@4404: compatible:0: 'amlogic,meson-gx-reset' is not one of ['amlogic,meson8b-reset', 'amlogic,meson-gxbb-reset', 'amlogic,meson-axg-reset'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: drop the vpu dmc memory cellNeil Armstrong
This fixes the following DT schemas check errors: meson-gxl-s805x-libretech-ac.dt.yaml: vpu@d0100000: reg-names: Additional items are not allowed ('dmc' was unexpected) meson-gxl-s805x-libretech-ac.dt.yaml: vpu@d0100000: reg-names: ['vpu', 'hhi', 'dmc'] is too long The 'dmc' register area was replaced by the amlogic,canvas property which was introduced in commit f1726043426c73 ("arm64: dts: meson-gx: add dmcbus and canvas nodes.") and commit cf34287986d0b6 ("arm64: dts: meson-gx: Add canvas provider node to the vpu") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson: fix ethernet mac reg formatNeil Armstrong
This fixes the following DT schemas check errors: meson-axg-s400.dt.yaml: soc: ethernet@ff3f0000:reg:0: [0, 4282318848, 0, 65536, 0, 4284695872, 0, 8] is too long meson-axg-s400.dt.yaml: ethernet@ff3f0000: reg: [[0, 4282318848, 0, 65536, 0, 4284695872, 0, 8]] is too short meson-g12a-u200.dt.yaml: soc: ethernet@ff3f0000:reg:0: [0, 4282318848, 0, 65536, 0, 4284695872, 0, 8] is too long meson-g12a-u200.dt.yaml: ethernet@ff3f0000: reg: [[0, 4282318848, 0, 65536, 0, 4284695872, 0, 8]] is too short meson-gxbb-nanopi-k2.dt.yaml: soc: ethernet@c9410000:reg:0: [0, 3376480256, 0, 65536, 0, 3364046144, 0, 4] is too long meson-gxl-s805x-libretech-ac.dt.yaml: soc: ethernet@c9410000:reg:0: [0, 3376480256, 0, 65536, 0, 3364046144, 0, 4] is too lon while here, also drop the redundant reg property from meson-gxl.dtsi because it had the same value as meson-gx.dtsi from which it inherits. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson: g12a-common: add VRTCKevin Hilman
Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20arm64: dts: add support for SM1 based SEI Robotics SEI610Neil Armstrong
Add support for the Amlogic SM1 Based SEI610 board. The SM1 SoC is a derivative of the G12A SoC Family with : - Cortex-A55 core instead of A53 - more power domains, including USB & PCIe - a neural network co-processor (NNA) - a CSI input and image processor - some changes in the audio complex, thus not yet enabled The SEI610 board is a derivative of the SEI510 board with : - removed ADC based touch button, replaced with 3x GPIO buttons - physical switch disabling on-board MICs - USB-C port for USB 2.0 OTG - On-board FTDI USB2SERIAL port for Linux console Audio, Display and USB support will be added later when support of the corresponding power domains will be added, for now they are kept disabled. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> [khilman: fix minor typo regultor -> regulator] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-12arm64: dts: meson-g12b-odroid-n2: enable DVFSNeil Armstrong
Enable DVFS for the Odroid-N2 by setting the clock, OPP and supply for each cores of each CPU clusters. The first cluster uses the "VDDCPU_B" power supply, and the second cluster uses the "VDDCPU_A" power supply. Each power supply can achieve 0.73V to 1.01V using 2 distinct PWM outputs clocked at 800KHz with an inverse duty-cycle. DVFS has been tested by running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations of each cluster and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-12arm64: dts: meson-g12b-khadas-vim3: add initial device-treeChristian Hewitt
The Khadas VIM3 uses the Amlogic S922X or A311S SoC, both based on the Amlogic G12B SoC family, on a board with the same form factor as the VIM/VIM2 models. It ships in two variants; basic and pro which differ in RAM and eMMC size: - 2GB (basic) or 4GB (pro) LPDDR4 RAM - 16GB (basic) or 32GB (pro) eMMC 5.1 storage - 16MB SPI flash - 10/100/1000 Base-T Ethernet - AP6398S Wireless (802.11 a/b/g/n/ac, BT5.0) - HDMI 2.1 video - 1x USB 2.0 + 1x USB 3.0 ports - 1x USB-C (power) with USB 2.0 OTG - 3x LED's (1x red, 1x blue, 1x white) - 3x buttons (power, function, reset) - IR receiver - M2 socket with PCIe, USB, ADC & I2C - 40pin GPIO Header - 1x micro SD card slot A common meson-g12b-khadas-vim3.dtsi is added to support both S922X and A311D SoCs supported by two variants of the board. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: amlogic: g12 CPU timers stop in suspendKevin Hilman
The Arm per-CPU architected timers stop ticking in suspend, when the SCP powers down the CPUs. Flag that in the DT. Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12b: support a311d and s922x cpu operating pointsChristian Hewitt
Meson g12b ships with a low-speed (S922X) and high-speed (A311D) variant so remove cpu_opp_table nodes in meson-g12b.dtsi and create two new dtsi that can be included in device-specific dts files. Opp points were taken from the vendor BSP kernel. Also make meson-g12b-odroid-n2.dts include the new meson-g12b-s922x.dtsi. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson: add video decoder entriesMaxime Jourdan
This enables the video decoder for GXBB, GXL and GXM chips Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-gx: add video decoder entryMaxime Jourdan
Add the base video decoder node compatible with the meson vdec driver, for GX* chips. Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson: add ethernet fifo sizesJerome Brunet
If unspecified in DT, the fifo sizes are not automatically detected by the dwmac1000 dma driver and the reported fifo sizes default to 0. Because of this, flow control will be turned off on the device. Add the fifo sizes provided by the datasheets in the SoC in DT so flow control may be enabled if necessary. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12b: add cpus OPP tablesNeil Armstrong
Add the OPP table taken from the HardKernel Odroid-N2 DTS. The Amlogic G12B SoC seems to available in 2 types : - low-speed: Cortex-A73 Cluster up to 1,704GHz - high-speed: Cortex-A73 Cluster up to 2.208GHz The Cortex-A73 Cluster can be clocked up to 1,896GHz for both types. The Vendor Amlogic A311D OPP table are slighly different, with lower voltages than the HardKernel S922X tables but seems to be high-speed type. This adds the conservative OPP table with the S922X higher voltages and the maximum low-speed OPP frequency. The values were tested to be stable on an HardKernel Odroid-N2 board running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations for both clusters and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12a: enable DVFS on G12A boardsNeil Armstrong
Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board by setting the clock, OPP and supply for each CPU cores. The CPU cluster power supply can achieve 0.73V to 1.01V using a PWM output clocked at 800KHz with an inverse duty-cycle. DVFS has been tested by running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12a: add cpus OPP tableNeil Armstrong
Add the OPP table taken from the vendor u200 and u211 DTS. The Amlogic G12A SoC seems to available in 3 types : - low-speed: up to 1,8GHz - mid-speed: up to 1,908GHz - high-speed: up to 2.1GHz And the S905X2 opp voltages are slightly higher than the S905D2 OPP voltages for the low-speed table. This adds the conservative OPP table with the S905X2 higher voltages and the maximum low-speed OPP frequency. The values were tested to be stable on an Amlogic U200 Reference Board, SeiRobotics SEI510 and X96 Max Set-Top-Boxes running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12-common: add pwm_a on GPIOE_2 pinmuxNeil Armstrong
Add the ao_pinctrl subnode for the pwm_a function on GPIOE_2. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: move common G12A & G12B modes to meson-g12-common.dtsiNeil Armstrong
To simplify the representation of differences betweem the G12A and G12B SoCs, move the common nodes into a meson-g12-common.dtsi file and express the CPU nodes and differences in meson-g12a.dtsi and meson-g12b.dtsi. This separation will help for DVFS and future Amlogic SM1 Family support. The sd_emmc_a quirk is added in the g12a/g12b since since it's already known the sd_emmc_a controller is fixed in the next SM1 SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05arm64: dts: amlogic: odroid-n2: keep SD card regulator always onXavier Ruppen
When powering off the Odroid N2, the tflash_vdd regulator is automatically turned off by the kernel. This is a problem when issuing the "reboot" command while using an SD card. The boot ROM does not power this regulator back on, blocking the reboot process at the boot ROM stage, preventing the SD card from being detected. Adding the "regulator-always-on" property fixes the problem. Signed-off-by: Xavier Ruppen <xruppen@gmail.com> Suggested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Fixes: c35f6dc5c377 ("arm64: dts: meson: Add minimal support for Odroid-N2") [khilman: minor subject change: s/meson/amlogic/] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05arm64: dts: meson-g12a-sei510: enable IR controllerNeil Armstrong
Enable the IR receiver controller on the SEI510 board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05arm64: dts: meson-g12a: add missing dwc2 phy-namesNeil Armstrong
The G12A USB2 OTG capable PHY uses a 8bit large UTMI bus, and the OTG controller gets the PHY but width by probing the associated phy. By default it will use 16bit wide settings if a phy is not specified, in our case we specified the phy, but not the phy-names. The dwc2 bindings specifies that if phys is present, phy-names shall be "usb2-phy". Adding phy-names = "usb2-phy" solves the OTG PHY bus configuration. Fixes: 9baf7d6be730 ("arm64: dts: meson: g12a: Add G12A USB nodes") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-19arm64: dts: meson: g12a: x96-max: add the Ethernet PHY interrupt lineMartin Blumenstingl
X96 Max has the PHY reset and interrupt lines are identical to the Odroid-N2: - GPIOZ_14 is the interrupt on X96 Max - GPIOZ_15 is the reset line on X96 Max Add GPIOZ_14 as PHY interrupt line on the X96 Max so we don't have to poll for the PHY status. Suggested-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-19arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY interrupt lineMartin Blumenstingl
The interrupt line of the RTL8211F PHY is routed to the GPIOZ_14 pad. Describe this in the device tree so the PHY framework doesn't have to poll the PHY status. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-19arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset lineMartin Blumenstingl
The reset line of the RTL8211F PHY is routed to the GPIOZ_15 pad. Describe this in the device tree so the PHY framework can bring the PHY into a known state when initializing it. GPIOZ_15 doesn't support driving the output HIGH (to take the PHY out of reset, only output LOW to reset the PHY is supported). The datasheet states it's an "3.3V input tolerant open drain (OD) output pin". Instead there's a pull-up resistor on the board to take the PHY out of reset. The GPIO itself will be set to INPUT mode to take the PHY out of reset and LOW to reset the PHY, which is achieved with the flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN). Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-19arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindingsMartin Blumenstingl
The snps,reset-gpio bindings are deprecated in favour of the generic "Ethernet PHY reset" bindings. Replace snps,reset-gpio from the &ethmac node with reset-gpios in the ethernet-phy node. The old snps,reset-active-low property is now encoded directly as GPIO flag inside the reset-gpios property. snps,reset-delays-us is converted to reset-assert-us and reset-deassert-us. reset-assert-us is the second cell from snps,reset-delays-us while reset-deassert-us was the third cell. Instead of blindly copying the old values (which seems strange since they gave the PHY one second to come out of reset) over this also updates the delays based on the datasheets: - the Realtek RTL8211F PHY needs a 10ms assert delay (the datasheet mentions: "For a complete PHY reset, this pin must be asserted low for at least 10ms") and a 30ms deassert delay (the datasheet mentions: "Wait for a further 30ms (for internal circuits settling time) before accessing the PHY register". This applies to the following boards: GXBB NanoPi K2, GXBB Odroid-C2, GXBB Vega S95 variants, GXBB Wetek variants, GXL P230, GXM Khadas VIM2, GXM Nexbox A1, GXM Q200, GXM RBox Pro boards. - the ICPlus IP101GR PHY needs a 10ms assert delay (the datasheet mentions: "Trst | Reset period | 10ms") and a deassert delay of 10ms as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock output ready after reset released | 10ms"). This applies to the GXBB Nexbox A95X board. - the Micrel KSZ9031 seems to require a 100us delay but use the same (seemingly safe) values from RTL8211F due to lack of a board to verify this. This applies to the GXBB P200 board. The GXBB P201 board is left out from this conversion because it doesn't have a dedicated PHY node (because it's not clear which PHY is used on that board). Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-19arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset lineMartin Blumenstingl
The Odroid-N2 schematics show that the following pins are used for the reset and interrupt lines: - GPIOZ_14 is the PHY interrupt line - GPIOZ_15 is the PHY reset line The GPIOZ_14 and GPIOZ_15 pins are special. The datasheet describes that they are "3.3V input tolerant open drain (OD) output pins". This means the GPIO controller can drive the output LOW to reset the PHY. To release the reset it can only switch the pin to input mode. The output cannot be driven HIGH for these pins. This requires configuring the reset line as GPIO_OPEN_DRAIN because otherwise the PHY will be stuck in "reset" state (because driving the pin HIGH seems to result in the same signal as driving it LOW). The reset line works together with a pull-up resistor (R143 in the Odroid-N2 schematics). The SoC can drive GPIOZ_14 LOW to assert the PHY reset. However, since the SoC can't drive the pin HIGH (to release the reset) we switch the mode to INPUT and let the pull-up resistor take care of driving the reset line HIGH. Switch to GPIOZ_15 for the PHY reset line instead of using GPIOZ_14 (which actually is the interrupt line). Move from the "snps" specific resets to the MDIO framework's reset-gpios because only the latter honors the GPIO flags. Use the GPIO flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN) to match with the pull-up resistor because this will: - drive the output LOW to reset the PHY (= active low) - switch the pin to INPUT mode so the pull-up will take the PHY out of reset Fixes: 51d116557b2044 ("arm64: dts: meson-g12a-x96-max: Add Gigabit Ethernet Support") Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-19arm64: dts: meson: g12a: sort sdio nodes correctlyJerome Brunet
Fix sdio node order in the soc device tree Fixes: a1737347250e ("arm64: dts: meson: g12a: add SDIO controller") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-14arm64: dts: meson-g12a-x96-max: add sound cardNeil Armstrong
Enable the sound card on the X96 Max, enabling HDMI output using the TDM interface B, being aligned on other boards sound cards. SPDI/F support is also enabled to the physical toslink port and to HDMI. The internal DAC connected to the audio jack will be added later on, when driver support is added. Tested by running: tinymix set "FRDDR_A SRC 1 EN Switch" 1 tinymix set "FRDDR_A SINK 1 SEL" "OUT 1" tinymix set "FRDDR_B SRC 1 EN Switch" 1 tinymix set "FRDDR_B SINK 1 SEL" "OUT 1" tinymix set "FRDDR_C SRC 1 EN Switch" 1 tinymix set "FRDDR_C SINK 1 SEL" "OUT 1" tinymix set "TOHDMITX I2S SRC" "I2S B" tinymix set "TOHDMITX Switch" 1 then: tinymix set "TDMOUT_B SRC SEL" "IN 0" speaker-test -Dhw:0,0 -c2 then: tinymix set "TDMOUT_B SRC SEL" "IN 1" speaker-test -Dhw:0,1 -c2 then: tinymix set "TDMOUT_B SRC SEL" "IN 2" speaker-test -Dhw:0,2 -c2 testing HDMI audio output from the all 3 ASoC playback interfaces. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-14arm64: dts: meson-g12b-odroid-n2: add sound cardNeil Armstrong
Enable the sound card on the Hardkernel Odroid-N2, enabling HDMI output using the TDM interface B, being aligned on other boards sound cards. The internal DAC connected to the audio jack will be added later on, when driver support is added. Tested by running: tinymix set "FRDDR_A SRC 1 EN Switch" 1 tinymix set "FRDDR_A SINK 1 SEL" "OUT 1" tinymix set "FRDDR_B SRC 1 EN Switch" 1 tinymix set "FRDDR_B SINK 1 SEL" "OUT 1" tinymix set "FRDDR_C SRC 1 EN Switch" 1 tinymix set "FRDDR_C SINK 1 SEL" "OUT 1" tinymix set "TOHDMITX I2S SRC" "I2S B" tinymix set "TOHDMITX Switch" 1 then: tinymix set "TDMOUT_B SRC SEL" "IN 0" speaker-test -Dhw:0,0 -c2 then: tinymix set "TDMOUT_B SRC SEL" "IN 1" speaker-test -Dhw:0,1 -c2 then: tinymix set "TDMOUT_B SRC SEL" "IN 2" speaker-test -Dhw:0,2 -c2 testing HDMI audio output from the all 3 ASoC playback interfaces. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-14arm64: dts: meson: sei510: add sound cardJerome Brunet
Enable the sound card on the sei510: * TDM interface A is connected to an external DAC and a speaker installed on the device. * HDMI is expected to use TDM B. It can also use TDM A but will be limited to 2 channels, as accepted by the external DAC. * 2 Built in PDM mics through the PDM interface. * Both TDM outputs may use HW loopback. The internal DAC connected to audio jack will be added later on, when driver support is added. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-14arm64: dts: meson: sei510: add max98357a DACMaxime Jourdan
The SEI510 board features a max98357a audio codec for built-in speaker Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson: g12a: add the GPIO interrupt controllerMartin Blumenstingl
GPIO interrupts are used for the external Ethernet RGMII PHY interrupt line. Add the GPIO interrupt controller so we can describe that connection in the dts files. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson-g12a-x96-max: bump bluetooth bus speed to 2Mbaud/sNeil Armstrong
Setting to 2Mbaud/s is the nominal bus speed for common usages. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson-g12a-sei510: bump bluetooth bus speed to 2Mbaud/sNeil Armstrong
Setting to 2Mbaud/s is the nominal bus speed for common usages. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson-g12a-x96-max: add 32k clock to bluetooth nodeNeil Armstrong
The 32k low power clock is necessary for the bluetooth part of the combo module to initialize correctly, simply add the same clock we use for the sdio pwrseq. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson-g12a-sei510: add 32k clock to bluetooth nodeNeil Armstrong
The 32k low power clock is necessary for the bluetooth part of the combo module to initialize correctly, simply add the same clock we use for the sdio pwrseq. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson-g12a-sei510: Enable Wifi SDIO moduleNeil Armstrong
The SEI510 embeds an AP6398S SDIO module, let's add the corresponding SDIO, PWM clock and mmc-pwrseq nodes. Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson-g12a-x96-max: Enable Wifi SDIO ModuleNeil Armstrong
The X96 Max embeds an AP6398S SDIO module, let's add the corresponding SDIO, PWM clock and mmc-pwrseq nodes. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson-g12a-x96-max: add support for sdcard and emmcGuillaume La Roque
Add nodes to support SDCard and onboard eMMC on the X96 Max. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson: g12a: add SDIO controllerJerome Brunet
The Amlogic G12A SDIO Controller has a bug preventing direct DDR access, add the port A (SDIO) pinctrl and controller nodes and mark this specific controller with the amlogic,dram-access-quirk property. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson: Add minimal support for Odroid-N2Neil Armstrong
This patch adds basic support for : - Amlogic G12B, which is very similar to G12A - The HardKernel Odroid-N2 based on the S922X SoC The Amlogic G12B SoC is very similar with the G12A SoC, sharing most of the features and architecture, but with these differences : - The first CPU cluster only has 2xCortex-A53 instead of 4 - G12B has a second cluster of 4xCortex-A73 - Both cluster can achieve 2GHz instead of 1,8GHz for G12A - CPU Clock architecture is difference, thus needing a different compatible to handle this slight difference - Supports a MIPI CSI input - Embeds a Mali-G52 instead of a Mali-G31, but integration is the same Actual support is done in the same way as for the GXM support, including the G12A dtsi and redefining the CPU clusters. Unlike GXM, the first cluster is different, thus needing to remove the last 2 cpu nodes of the first cluster. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Anand Moon <linux.amoon@gmail.com> [khilman: add vin-supply for vcc_v5 as suggested by Anand Moon] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson-gxbb-vega-s95: add ethernet PHY interruptNeil Armstrong
Add the external ethernet PHY interrupt on the Vega S95 board. Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-11arm64: dts: meson-gxbb-vega-s95: fix WiFi/BT module supportNeil Armstrong
Fix the SDIO WiFi support and add proper Bluetooth support on the Vega S95 board. Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-20 17:38:18 +0000