Age | Commit message (Collapse) | Author |
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Set the corrrect NAND IOMXU for i.MX8QXPB0.
Signed-off-by: Han Xu <han.xu@nxp.com>
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fix the pin conflict between nand and usdhc1 on imx8qxp validation
board.
BuildInfo:
- SCFW daea284c, IMX-MKIMAGE 90fbac1a, ATF
- U-Boot 2017.03-00713-g345bcc2
Signed-off-by: Han Xu <han.xu@nxp.com>
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use the dqs and re pins rather than dqs_n/dqs_p re_n/re_p pins for NAND
BuildInfo: SCFW 9e9f6ec6, IMX-MKIMAGE 0, ATF 0
Reviewed-by: Frank Li <frank.li@nxp.com>
Signed-off-by: Han Xu <han.xu@nxp.com>
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enable the GPMI NAND module in device tree for i.MX8QXP
Signed-off-by: Han Xu <han.xu@nxp.com>
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