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2022-05-19Merge tag 'v5.4.193' into update-to-2.3.7__5.4-2.3.x-imxPhilippe Schenker
This is the 5.4.193 stable release Conflicts: arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts drivers/edac/synopsys_edac.c drivers/mmc/host/sdhci-esdhc-imx.c drivers/mmc/host/sdhci.c drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c sound/soc/codecs/msm8916-wcd-analog.c
2021-11-26arm64: dts: freescale: fix arm,sp805 compatible stringMichael Walle
[ Upstream commit 99a7cacc66cae92db40139b57689be2af75fc6b8 ] According to Documentation/devicetree/bindings/watchdog/arm,sp805.yaml the compatible is: compatible = "arm,sp805", "arm,primecell"; The current compatible string doesn't exist at all. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-11-08Merge tag 'v5.4.153' into 5.4-2.3.x-imxDenys Drozdov
This is the 5.4.153 stable release
2021-10-13arm64: dts: freescale: Fix SP805 clock-namesAndre Przywara
[ Upstream commit f2dc2359b75e1fd345fd710862f73db20dc55864 ] The SP805 binding sets the order of the clock-names to be: "wdog_clk", "apb_pclk" (in exactly that order). Change the order in the DTs for Freescale platforms to match that. The two clocks given in all nodes are actually the same, so that does not change any behaviour. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-08-04Merge tag 'v5.4.135' into 5.4-2.3.x-imxAndrey Zhizhikin
This is the 5.4.135 stable release Conflicts (manual resolve): - drivers/usb/cdns3/gadget.c: Use NXP version, as upstream commit f53729b828db7 ("usb: cdns3: Enable TDL_CHK only for OUT ep") is already applied. - arch/arm64/boot/dts/freescale/imx8mq.dtsi: Merge upstream commit 556cf02830351 ("arm64: dts: imx8mq: assign PCIe clocks") manually into NXP tree. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2021-07-25arm64: dts: ls208xa: remove bus-num from dspi nodeMian Yousaf Kaukab
[ Upstream commit 8240c972c1798ea013cbb407722295fc826b3584 ] On LS2088A-RDB board, if the spi-fsl-dspi driver is built as module then its probe fails with the following warning: [ 10.471363] couldn't get idr [ 10.471381] WARNING: CPU: 4 PID: 488 at drivers/spi/spi.c:2689 spi_register_controller+0x73c/0x8d0 ... [ 10.471651] fsl-dspi 2100000.spi: Problem registering DSPI ctlr [ 10.471708] fsl-dspi: probe of 2100000.spi failed with error -16 Reason for the failure is that bus-num property is set for dspi node. However, bus-num property is not set for the qspi node. If probe for spi-fsl-qspi happens first then id 0 is dynamically allocated to it. Call to spi_register_controller() from spi-fsl-dspi driver then fails. Since commit 29d2daf2c33c ("spi: spi-fsl-dspi: Make bus-num property optional") bus-num property is optional. Remove bus-num property from dspi node to fix the issue. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-12-27arm64: dts: ls208xa: Remove dma-coherent from dwc3 nodesRan Wang
ls208xa encounteded below USB failure when applying dma-coherent, remove it. [ 11.087839] xhci-hcd xhci-hcd.1.auto: Error while assigning device slot ID [ 11.094730] xhci-hcd xhci-hcd.1.auto: Max number of devices this xHCI host supports is 127. [ 11.103103] xhci-hcd xhci-hcd.0.auto: Error while assigning device slot ID [ 11.109985] xhci-hcd xhci-hcd.0.auto: Max number of devices this xHCI host supports is 127. [ 11.118348] usb usb2-port1: couldn't allocate usb_device [ 11.123680] usb usb4-port1: couldn't allocate usb_device Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2019-12-27arm64: dts: ls208xa: Update qspi node properties for LS2088ARDBKuldeep Singh
LS2088ADB has one spansion flash s25fs512s of size 64M. Update qspi dts entry for the board using compatibles as "jedec,spi-nor" to probe flash successfully. Also, align properties with other board dts properties. Since device properties are different, so remove fsl, ls1021a-qspi. ls1021a-qspi is to be used only for Big-endian verion of QSPI controller. Use dt-bindings constants in interrupts instead of using numbers. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2019-12-25arm64: dts: layerscape: apply dma-coherent for dwc3 nodesRan Wang
Since dwc3 cache type has been set to cacheable, apply dma-coherent to all dwc3 nodes accordingly. Note: For LS1043A and LS1046A, since QE-HDLC still doesn't support dma-coherent, we cannot directly revert cd1a4f3c (sdk: dts: ls104x move dma-coherent from soc to its child nodes) to recover dma-coherent for soc. Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2019-12-19LF-387-5 arm64: dts: layerscape: add chip-specific compatible string to usb ↵Ran Wang
nodes To allow USB dwc3 driver to conduct some chip-scpeific configuring. Cover all arm64 based Layerscape SoCs. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Jun Li <jun.li@nxp.com> Reviewed-by: Leo Li <leo.li@nxp.com>
2019-11-25arm64: dts: fix endianness of rcpmBiwen Li
Add little-endian property of rcpm for ls1028a,ls1088a,ls208xa Signed-off-by: Biwen Li <biwen.li@nxp.com>
2019-11-25arm64: dts: ls1012a/ls1043a/ls1046a/ls1088a/ls208xa: replace ftm0 with ↵Biwen Li
ftm_alarm0 The patch replaces ftm0 with ftm_alarm0 DT node - replace ftm0 with ftm_alarm0 - add new rcpm node - remove old rcpm node - aliases ftm_alarm0 as rtc1 Signed-off-by: Biwen Li <biwen.li@nxp.com>
2019-11-25arm64: dts: fsl: remove backplane supportFlorinel Iordache
Remove entire backplane support from device tree for all supported platforms Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
2019-11-25arm64: dts: fsl: layerscape: fix warnings when compiling dts filesPankaj Bansal
when compiling dts file using DTC_FLAG='-@', the device tree compiler reports these warnings: Warning (simple_bus_reg): /soc/mdio@0x8c0b000: simple-bus unit address format error, expected "8c0b000" Warning (unit_address_format): /pfe@04000000: unit name should not have leading 0s Fixed the node names to silence these warnings. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
2019-11-25arm64: dts: Fix DWC3 IP VBUS glitch issue on Layerscape platformsRan Wang
Cover LS1012A, LS1043A, LS1046A, LS1088A, LS208xA, LX2160A Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2019-11-25arm64: dts: Added endianness information to dts serdes nodeFlorinel Iordache
This change is required to specify that serdes HW peripheral is little-endian. Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
2019-11-25arm64: dts: nxp: ls208xa: add more thermal zone supportYuantian Tang
Ls208xa has several thermal sensors. Add all the sensor id to dts to enable them. To make the dts cleaner, re-organize the nodes to split out the common part so that it can be shared with other SoCs. Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
2019-11-25arm64: dts: ls208xa: accumulated change to ls208xa boardsLi Yang
commit 46123df3a174f0d76c8b954a0386e64841453836 Author: Florinel Iordache <florinel.iordache@nxp.com> Date: Thu Aug 9 12:29:18 2018 +0300 arm64: dts: updates for Unified Backplane driver Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> commit 76a741dbb9b93ea9ab2f6122b8df5bc4f0db7676 Author: Nipun Gupta <nipun.gupta@nxp.com> Date: Sat Apr 28 00:20:16 2018 +0530 arm64: dts: ls208x: add dma-cohernet property in fsl-mc node Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> commit f6309e9dc8e0c6171a43fd6759123b5de1c574aa Author: Zhang Ying-22455 <ying.zhang22455@nxp.com> Date: Mon Apr 2 16:27:23 2018 +0800 arm64: dts: ls208xa: add dts entry for A-010650 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> commit 8c37bad2038a210a4f0a369fd946aaae4317eac4 Author: Nipun Gupta <nipun.gupta@nxp.com> Date: Fri Apr 20 17:14:10 2018 +0530 arm64: dts: ls208x: add dma ranges property Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> commit 38566bbd5ca6747b30d2f0c251bbcfe0723df8c6 Author: Changming Huang <jerry.huang@nxp.com> Date: Wed Apr 19 12:49:50 2017 +0800 arm/arm64: dts: Add property snps incr burst type adjustment for INCR burst type for dwc3 Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com> Signed-off-by: Ran Wang <ran.wang_1@nxp.com> commit dbb65ea8ee1d46067e756c6d64c7fe66a0058f49 Author: Pankaj Bansal <pankaj.bansal@nxp.com> Date: Mon Mar 5 12:37:04 2018 +0530 arm64: dts: ls208x: remove NXP Erratum A008585 from LS2088A. NXP Erratum A008585 affects A57 core cluster used in LS2085rev1. However this problem has been fixed in A72 core cluster used in LS2088. Therefore remove the erratum from LS2088A. Keeping it only in LS2085. Cc: <stable@vger.kernel.org> # 4.14 Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: Sandeep Malik <sandeep.malik@nxp.com> Acked-by: Priyanka Jain <priyanka.jain@nxp.com> commit 85f41b0f6abe6b9d7d303790bb3712ed559890e9 Author: Nipun Gupta <nipun.gupta@nxp.com> Date: Mon Feb 26 10:39:54 2018 +0530 arm64: dts: ls208xa: add dma coherent property in smmu node Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> commit e910d8b78b823a625451b1da7ae7499dadde2ae9 Author: Suresh Gupta <suresh.gupta@nxp.com> Date: Thu Feb 1 23:49:56 2018 +0530 arm64: dts: freescale: ls208xa: Modify DT nodes for qspi Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> commit 7654ef78c8c85de3a43dfa0dffd572d589ea1332 Author: Zhang Ying-22455 <ying.zhang22455@nxp.com> Date: Wed Nov 1 10:34:04 2017 +0800 arm64: dts: ls208xa: correct the i2c clock to 1/2 platform pll Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> commit efdb129228baa6a999c06072338b979d783d7b60 Author: Bharat Bhushan <Bharat.Bhushan@nxp.com> Date: Thu Aug 31 14:45:02 2017 +0530 arm64: dts: ls208xa: Add iommu-map property for pci This patch adds iommu-map property for PCIe, which enables SMMU for these devices on LS208xA devices. Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com> commit 45af5d025eafaf4a85000e16e5f47992de663ff6 Author: Iordache Florinel-R70177 <florinel.iordache@nxp.com> Date: Mon Aug 21 11:46:59 2017 +0300 arm64: dts: ls2088a: update backplane support with dpmac connections Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com> commit b2ede6c088a883fceb348e8659253b2c7cdeeff8 Author: Santan Kumar <santan.kumar@nxp.com> Date: Thu Jun 22 13:04:00 2017 +0530 arm64: dts: ls2088ardb: Update nodes for QSPI -As per board design, different QSPI flash is connected on boards, hence change QSPI flash node from s25fl256s1 to s25fs512ss in device tree. -Enable fast-read support in QSPI node. Signed-off-by: Santan Kumar <santan.kumar@nxp.com> commit d5324a75c56e9f9210113e51cffa846a86b50fbd Author: Santan Kumar <santan.kumar@nxp.com> Date: Mon Jun 19 15:26:03 2017 +0530 arm64: dts: ls2081ardb: Update nodes for QSPI, SATA, INA220 Update ls2081ardb.dts for below nodes: -As per updated board design, different QSPI flash is connected on boards, hence change QSPI flash node from n25q512a to s25fs512ss in device tree. -Enable dual flash support in QSPI node. -Add DTS node for INA220. -Enable SATA node. Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Tao Yang <b31903@freescale.com> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> commit 43d506fa19e1e50e4c2e4f9689ad3c60d9a06d71 Author: Zhang Ying-22455 <ying.zhang22455@nxp.com> Date: Thu May 11 08:42:19 2017 +0800 arm64: dts: ls208x: add property for PCA954x Mux device PCA954x Mux device should never be turned-off after power-on. if device tree contians "i2c-mux-never-disable" property for pca954x device node, it can ensure that skip disabling PCA954x Mux device. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> commit 6d3a96446a7ffccb0b9936b616d855c8d5572bce Author: Bogdan Purcareata <bogdan.purcareata@nxp.com> Date: Wed May 3 14:26:35 2017 +0000 arm64: dts: fsl/ls1088,ls208x: Add mdio and phy nodes Add mdio and phy nodes for the following FSL platforms: - LS1088A RDB - LS2080A QDS & RDB - LS2088A QDS, RDB & simu Contains contributions from patches by the following authors: Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> commit 0443625ea24bc4ea315c30b718712254c588bd18 Author: Suresh Gupta <suresh.gupta@nxp.com> Date: Fri May 5 13:54:22 2017 +0530 arm64: dts: ls208xa: Add QSPI Flash node for RDB This is temporary patch, will rewrite for open source Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> commit ed0ce1d49aa72d12ea54f82d3771a377c68af37e Author: Priyanka Jain <priyanka.jain@nxp.com> Date: Thu Apr 13 16:49:40 2017 +0530 arm64: dts: ls2081ardb: Add DTS support for NXP LS2081ARDB This patch add support for NXP LS2081ARDB board which has LS2081A SoC. LS2081A SoC is 40-pin derivative of LS2088A SoC So, from functional perspective both are same. Hence,ls2088a SoC dtsi files are included from ls2081ARDB dts Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> commit e4fb842554a5e7b8c3f6e3c243222dbe4515aee3 Author: Zhang Ying-22455 <ying.zhang22455@nxp.com> Date: Thu Apr 27 15:01:54 2017 +0800 arm64: dts: ls208xa: add ftm0 nodes Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> commit 64c3e2c3a7ddc89c3c23c012ee364f2c014524d2 Author: costi <constantin.tudor@freescale.com> Date: Fri Mar 3 18:08:28 2017 +0200 arm64: dts: fsl-ls2088: Add mdio/phy devices Signed-off-by: Constantin Tudor <constantin.tudor@nxp.com> commit 3bcdc4de0a1c9e6f4a4ddc916e8efe8044d8bbfd Author: Po Liu <po.liu@nxp.com> Date: Fri Sep 30 17:11:36 2016 +0800 arm64: dts: ls1043/ls2080: add pcie aer/pme interrupt-name property Some platforms(NXP Layerscape for example) aer/pme interrupts was not MSI/MSI-X/INTx but using interrupt line independently. This patch add "aer", "pme" interrupt-names for aer/pme interrupt. With the interrupt-names "aer", "pme" code could probe aer/pme interrupt line for pcie root port, replace the aer/pme interrupt service irqs. This is intend to fixup the Layerscape platforms which aer/pmes interrupts was not MSI/MSI-X/INTx, but using interrupt line independently. Since the interrupt-names "intr" never been used. Remove it. Signed-off-by: Po Liu <po.liu@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> commit 64d859836d3d194e8bc926bb951fd21859689824 Author: Nipun Gupta <nipun.gupta@nxp.com> Date: Mon Dec 5 05:20:51 2016 +0530 arm64: dts: ls208xa: Comply with the new iommu binding for fsl_mc fsl-mc bus support the new iommu-map property. Comply to this binding for fsl_mc bus. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2019-09-23Merge tag 'pci-v5.4-changes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Consolidate _HPP/_HPX stuff in pci-acpi.c and simplify it (Krzysztof Wilczynski) - Fix incorrect PCIe device types and remove dev->has_secondary_link to simplify code that deals with upstream/downstream ports (Mika Westerberg) - After suspend, restore Resizable BAR size bits correctly for 1MB BARs (Sumit Saxena) - Enable PCI_MSI_IRQ_DOMAIN support for RISC-V (Wesley Terpstra) Virtualization: - Add ACS quirks for iProc PAXB (Abhinav Ratna), Amazon Annapurna Labs (Ali Saidi) - Move sysfs SR-IOV functions to iov.c (Kelsey Skunberg) - Remove group write permissions from sysfs sriov_numvfs, sriov_drivers_autoprobe (Kelsey Skunberg) Hotplug: - Simplify pciehp indicator control (Denis Efremov) Peer-to-peer DMA: - Allow P2P DMA between root ports for whitelisted bridges (Logan Gunthorpe) - Whitelist some Intel host bridges for P2P DMA (Logan Gunthorpe) - DMA map P2P DMA requests that traverse host bridge (Logan Gunthorpe) Amazon Annapurna Labs host bridge driver: - Add DT binding and controller driver (Jonathan Chocron) Hyper-V host bridge driver: - Fix hv_pci_dev->pci_slot use-after-free (Dexuan Cui) - Fix PCI domain number collisions (Haiyang Zhang) - Use instance ID bytes 4 & 5 as PCI domain numbers (Haiyang Zhang) - Fix build errors on non-SYSFS config (Randy Dunlap) i.MX6 host bridge driver: - Limit DBI register length (Stefan Agner) Intel VMD host bridge driver: - Fix config addressing issues (Jon Derrick) Layerscape host bridge driver: - Add bar_fixed_64bit property to endpoint driver (Xiaowei Bao) - Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC drivers separately (Xiaowei Bao) Mediatek host bridge driver: - Add MT7629 controller support (Jianjun Wang) Mobiveil host bridge driver: - Fix CPU base address setup (Hou Zhiqiang) - Make "num-lanes" property optional (Hou Zhiqiang) Tegra host bridge driver: - Fix OF node reference leak (Nishka Dasgupta) - Disable MSI for root ports to work around design problem (Vidya Sagar) - Add Tegra194 DT binding and controller support (Vidya Sagar) - Add support for sideband pins and slot regulators (Vidya Sagar) - Add PIPE2UPHY support (Vidya Sagar) Misc: - Remove unused pci_block_cfg_access() et al (Kelsey Skunberg) - Unexport pci_bus_get(), etc (Kelsey Skunberg) - Hide PM, VC, link speed, ATS, ECRC, PTM constants and interfaces in the PCI core (Kelsey Skunberg) - Clean up sysfs DEVICE_ATTR() usage (Kelsey Skunberg) - Mark expected switch fall-through (Gustavo A. R. Silva) - Propagate errors for optional regulators and PHYs (Thierry Reding) - Fix kernel command line resource_alignment parameter issues (Logan Gunthorpe)" * tag 'pci-v5.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (112 commits) PCI: Add pci_irq_vector() and other stubs when !CONFIG_PCI arm64: tegra: Add PCIe slot supply information in p2972-0000 platform arm64: tegra: Add configuration for PCIe C5 sideband signals PCI: tegra: Add support to enable slot regulators PCI: tegra: Add support to configure sideband pins PCI: vmd: Fix shadow offsets to reflect spec changes PCI: vmd: Fix config addressing when using bus offsets PCI: dwc: Add validation that PCIe core is set to correct mode PCI: dwc: al: Add Amazon Annapurna Labs PCIe controller driver dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding PCI: Add quirk to disable MSI-X support for Amazon's Annapurna Labs Root Port PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port PCI: Add ACS quirk for Amazon Annapurna Labs root ports PCI: Add Amazon's Annapurna Labs vendor ID MAINTAINERS: Add PCI native host/endpoint controllers designated reviewer PCI: hv: Use bytes 4 and 5 from instance ID as the PCI domain numbers dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries dt-bindings: PCI: tegra: Add sideband pins configuration entries PCI: tegra: Add Tegra194 PCIe support PCI: Get rid of dev->has_secondary_link flag ...
2019-08-22arm64: dts: fsl: Remove num-lanes property from PCIe nodesHou Zhiqiang
Remove the num-lanes property to avoid the driver setting the link width. On FSL Layerscape SoCs, the number of lanes assigned to PCIe controller is not fixed, it is determined by the selected SerDes protocol in the RCW (Reset Configuration Word). The PCIe link training is completed automatically through the selected SerDes protocol - the link width set-up is updated by hardware after power on reset, so the num-lanes property is not needed for Layerscape PCIe. The current num-lanes property was added erroneously, which actually indicates the maximum lanes the PCIe controller can support up to, instead of the lanes assigned to the PCIe controller. The link width set by SerDes protocol will be overridden by the num-lanes property, hence the subsequent re-training will fail when the assigned lanes do not match the value in the num-lanes property. Remove the property to fix the issue Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-08-03arm64: dts: add the console node for DPAA2 platformsIoana Ciornei
Add the console device tree node for the following DPAA2 based platforms: LS1088A, LS2080A, LS2088A and LX2160A. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-15arm64: dts: fsl: add ptp timer node for dpaa2 platformsYangbo Lu
This patch is to add ptp timer device tree node for dpaa2 platforms(ls1088a/ls208xa/lx2160a). Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-01-12arm64: dts: layerscape: Add incr-burst-type-adjustment property to USB3 nodeRan Wang
Add this property to all layerscape platforms to improve USB read write performance. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-11arm64: dts: layerscape: add num-viewport property for PCIe DT nodesHou Zhiqiang
Add num-viewport property for PCIe DT nodes to specify how many viewports are implemented. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-08arm64: dts: fsl: Add all CPUs in cooling mapsViresh Kumar
Each CPU can (and does) participate in cooling down the system but the DT only captures a handful of them, normally CPU0, in the cooling maps. Things work by chance currently as under normal circumstances its the first CPU of each cluster which is used by the operating systems to probe the cooling devices. But as soon as this CPU ordering changes and any other CPU is used to bring up the cooling device, we will start seeing failures. Also the DT is rather incomplete when we list only one CPU in the cooling maps, as the hardware doesn't have any such limitations. Update cooling maps to include all devices affected by individual trip points. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-08arm64: dts: layerscape: removed compatible string "snps,dw-pcie"Hou Zhiqiang
Removed the wrong compatible string "snps,dw-pcie", in case match incorrect driver. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-08arm64: dts: fsl: Add the status property disable PCIeBao Xiaowei
Add the status property disable the PCIe, the property will be enable by bootloader. Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-10-29Merge tag 'armsoc-dt' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree updates from Arnd Bergmann: "There are close to 800 indivudal changesets in this branch again, which feels like a lot. There are particularly many changes for the NVIDIA Tegra platform this time, in fact more than it has seen in the two years since the v4.9 merge window. Aside from this, it's been fairly normal, with lots of changes going into Renesas R-CAR, NXP i.MX, Allwinner Sunxi, Samsung Exynos, and TI OMAP. Most of the changes are for adding new features into existing boards, for brevity I'm only mentioning completely new machines and SoCs here. For the first time I think we have (slightly) more new 64-bit hardware than 32-bit: Two boards get added for TI OMAP: Moxa UC-2101 is an industrial computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5 is a minor variation of the motherboards of the GTA04 phone, see https://shop.goldelico.com/wiki.php?page=GTA04A5 Clearfog is a nice little board for quad-core Marvell Armada 8040 network processor, see https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/ Two additional server boards come with the Aspeed baseboard management controllers: Stardragon4800 is an arm64 reference platform made by HXT (based on Qualcomm's server chips), and TiogaPass is an Open Compute mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in the BMC. NXP i.MX usually sees a lot of new boards each release. This time there we only add one minor variant: ConnectCore 6UL SBC Pro uses the same SoM design as the ConnectCore 6UL SBC Express added later. However, there is a new chip, the i.MX6ULZ, which is an even smaller variant of the i.MX6ULL, with features removed. There is also support for the reference board design, the i.MX6ULZ 14x14 EVK. A new Raspberry Pi variant gets added, this one is the CM3 compute module based on bcm2837, it was launched in early 2017 but only now added to the kernel, both as 32-bit and as 64-bit files, as we tend to do for Raspberry Pi. On the Allwinner side, everything is again about cheap development boards, usually of the "Fruit Pi" variety. The new ones this time are: - Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/ - Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/ - Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts - Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html The last one of these is now a 64-bit version of the earlier Banana Pi M2+ H3, with the same board layout. Similarly, for Rockchips, get get another variant of the 32-bit Asus Tinker board, the model 'S' based on rk3288, and three now boards based on the popular RK3399 chip: - ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/ - Rock960: https://www.96boards.org/product/rock960/ - RockPro64: https://www.pine64.org/?page_id=61454 These are all quite powerful boards with lots of RAM and I/O, and the RK3399 is the same chip used in several Chromebooks. Finally, we get support for the PX30 (aka rk3326) chip, which is based on the low-end 64-bit Cortex-A35 CPU core. So far, only the evaluation board is supported. One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is based on the MT7622 WiFi router platform, and the first product I've seen with a 64-bit Mediatek chip in that market: http://www.banana-pi.org/r64.html For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370 development board, which are similar to the Hi3660 and Hikey 360 respectively, but add support for an NPU. Amlogic gets initial support for the Meson-G12A chip (S905D2), another quad-core Cortex-A53 SoC, and its evaluation platform. On the 32-bit side, we gain support for an actual end-user product, the Endless Computers Endless Mini based on Meson8b (S805), see https://endlessos.com/computers/ Qualcomm adds support for their MSM8998 SoC and evaluation platform. This chip is commonly known as the Snapdragon 835, and is used in high-end phones as well as low-end laptops. For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added, but no boards for this one. However, we do add boards for the previously added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the M3NULCB Starter Kit Pro. While we have lots of DT changes for NVIDIA to update the existing files, the only board that gets added is the Toradex Colibri T20 on Colibri Evaluation Board for the old Tegra2. Synaptics add support for their AS370 SoC, which is part of the (formerly Marvell) Berlin line of set-top-box chips used e.g. in the various Google Chromecast. Only the .dtsi gets added at this point, no actual machines" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (721 commits) ARM: dts: socfgpa: remove ethernet aliases from dtsi arm64: dts: stratix10: add ethernet aliases dt-bindings: mediatek: Add bindig for MT7623 IOMMU and SMI dt-bindings: mediatek: Add JPEG Decoder binding for MT7623 dt-bindings: iommu: mediatek: Add binding for MT7623 dt-bindings: clock: mediatek: add support for MT7623 ARM: dts: mvebu: armada-385-db-88f6820-amc: auto-detect nand ECC properites ARM: dts: da850-lego-ev3: slow down A/DC as much as possible ARM: dts: da850-evm: Enable tca6416 on baseboard arm64: dts: uniphier: Add USB2 PHY nodes arm64: dts: uniphier: Add USB3 controller nodes ARM: dts: uniphier: Add USB2 PHY nodes ARM: dts: uniphier: Add USB3 controller nodes arm64: dts: meson-axg: s400: disable emmc arm64: dts: meson-axg: s400: add missing emmc pwrseq arm64: dts: clearfog-gt-8k: add PCIe slot description ARM: dts: at91: sama5d4_xplained: even nand memory partitions ARM: dts: at91: sama5d3_xplained: even nand memory partitions ARM: dts: at91: at91sam9x5cm: even nand memory partitions ARM: dts: at91: sama5d2_ptc_ek: fix bootloader env offsets ...
2018-09-26arm64: dts: fsl: Fix I2C and SPI bus warningsRob Herring
dtc has new checks for I2C and SPI buses. Fix the SPI bus node names and warnings in unit-addresses. arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@57: I2C bus unit address format error, expected "53" arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@56: I2C bus unit address format error, expected "52" Cc: Shawn Guo <shawnguo@kernel.org> Cc: Li Yang <leoyang.li@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-25arm64: dts: ls208xa: comply with the iommu map binding for fsl_mcNipun Gupta
fsl-mc bus support the new iommu-map property. Comply to this binding for fsl_mc bus. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2018-09-03arm64: dts: ls208xa: add second duartKurt Kanzenbach
The NXP LS208xA SoCs have two dual uarts. Thus, add the second one. Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-06-19arm64: dts: freescale: Update to use SPDX identifiersLi Yang
Replace license text with corresponding SPDX identifiers and update the format of existing SPDX identifiers to follow the new guideline Documentation/process/license-rules.rst. Note that some of the files mentioned X11 license previously but the license text actually matches MIT license. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-12arm64: dts: ls208xa: Move cpu_thermal out of bus nodeFabio Estevam
Move cpu_thermal node from soc node to root node. cpu_thermal node does not have any register properties and thus shouldn't be placed on the bus. This fixes the following build warnings with W=1: arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-09-22arm64: dts: ls: Add optee nodeSumit Garg
Add optee device tree node on ls1012a, ls1043a, ls1046a, ls1088a and ls208xa. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-08-14arm64: dts: ls208xa: add cpu idle supportYuantian Tang
ls208xa supports another cpu idle state which is pw20 which saves more power when cpu is idle. It was implemented through psci firmware. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-08-05arm64: dts: freescale: ls208xa: add crypto nodeHoria Geantă
LS208xA has a SEC v5.1 security engine. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-08-05arm64: dts: freescale: ls208xa: share aliases nodeHoria Geantă
aliases node is identical for all boards, thus move it to the common file ls208xa.dtsi. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-05-15arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDSYangbo Lu
This patch is to enable SD UHS-I mode on LS208xRDB and eMMC HS200 mode on LS208xQDS in dts. Also, the eSDHC peripheral clock must be used instead of platform clock to support these modes. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-05-15arm64: dts: freescale: update the copyright claimsLi Yang
Update the copyright claims to comply with company policy. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-07arm64: dts: freescale: ls2080a: Split devicetree for code resuabilityAbhimanyu Saini
LS2088A and LS2080A are similar SoCs with a few differences like ARM cores etc. Reorganize the LS2080A device tree to move the common nodes to: - fsl-ls208xa.dtsi - fsl-ls208xa-rdb.dtsi - fsl-ls208xa-qds.dtsi Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>