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path: root/arch/arm64/boot/dts/freescale/imx8-ss-dc0.dtsi
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2021-11-02MLK-23959 arm64: imx8-ss-dc0/1.dtsi: Correct dpu node interrupt propertiesLiu Ying
The dpu node 'interrupts' and 'interrupt-names' properties should reflect all dpu interrupts including the missing 'reserved' interrupt. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
2021-11-02arm64: imx8-ss-dc0.dtsi: Add dc0_pc phandle for dpu1Liu Ying
This patch adds dc0_pc phandle for dpu1 node. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2021-11-02arm64: imx8-ss-dc0.dtsi: Add pixel combiner node supportLiu Ying
This patch adds pixel combiner device tree node support for the i.MX8 DC0 subsystem. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2021-11-02arm64: imx8-ss-dc0.dtsi: Add dc0_dpr1_channel3 and dc0_dpr2_channel1-3 ↵Liu Ying
phandles for dpu1 This patch adds dc0_dpr1_channel3 and dc0_dpr2_channel1-3 phandles for dpu1 node. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2021-11-02arm64: imx8-ss-dc0.dtsi: Add dc0_dpr1_channel3 and dc0_dpr2_channel1-3 supportLiu Ying
This patch adds dc0_dpr1_channel3 and dc0_dpr2_channel1-3 device tree nodes support for i.MX8 DC0 subsystem. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2021-11-02arm64: imx8-ss-dc1.dtsi: Add dc1_prg3 to dc1_prg9 supportLiu Ying
This patch adds dc1_prg3 to dc1_prg9 device tree nodes support for i.MX8 DC0 subsystem. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2021-11-02arm64: dts: imx8qm/qxp: add dpr support for blitengXianzhong
add dpr channel 1 and 2 to support DPU blit engine Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
2021-11-02arm64: imx8-ss-dc0/1.dtsi: add dc0/1_disp clocks for dpu0/1Sandor Yu
disp0/1 lpcg clocks parent are fixed. so dc0/1_disp0/1 clocks couldn't replace by disp0/1_lpcg clocks. Add dc0/1 disp clocks and disp0/1_lpcg clocks for dc0/1. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
2021-11-02arm64: imx8-ss-dc0/1.dtsi: Add dc0/1_prg1/2 and dc0/1_dpr1_channel1/2 supportLiu Ying
This patch adds dc0/1_prg1/2 and dc0/1_dpr1_channel1/2 support for DC0/1 subsystems. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2021-11-02arm64: imx8-ss-dc0/1.dtsi: Use dc0/1_disp_lpcg clocks as disp0/1 clocks of ↵Liu Ying
dpu0/1 This patch uses dc0/1_disp_lpcg clocks as disp0/1 clocks of dpu0/1. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2021-11-02arm64: imx8-ss-dc0/1.dtsi: Add dc0/1_displ_lpcg clocksLiu Ying
This patch adds dc0/1_displ_lpcg clocks to DC0/1 subsystem device trees. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2021-11-02arm64: imx8-ss-dc0/1.dtsi: Add common dpu clocksLiu Ying
Currently, all DPUs in i.MX8qm/qxp have the same clocks - pll0/1, bypass0 and disp0/1. So add the common clocks in imx8-ss-dc0/1.dtsi. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2021-11-02arm64: imx8-ss-dc0.dtsi: Improve DC0 subsystem device treeLiu Ying
This patch improves DC0 subsystem device tree to clearly reflect it is the first DC subsystem instance embedded in a SoC. So, some renaming happens in imx8-ss-dc.dtsi, and finally imx8-ss-dc.dtsi is renamed to be imx8-ss-dc0.dtsi. Also, extract the i.MX8qxp specific compatible string, display clocks, display ports and display-subsystem from imx8-ss-dc0.dtsi and put them in SoC specific imx8qxp-ss-dc.dtsi. Signed-off-by: Liu Ying <victor.liu@nxp.com>