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2021-01-11arm64: dts: imx8m: change ocotp node name on i.MX8M SoCsAnson Huang
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> (cherry picked from commit 12fa1078efc871604d62e992cb8a038421b82096) Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2020-11-19MLK-24998-9 arm64: dts: imx8mn: assign osc_24m to dsi PHY REF clock sourceFancy Fang
Due to commit b3a420c9cf3f (MLK-24998-4 drm/bridge: sec-dsim: use 12MHz for default PHY REF clock), the dsi PHY reference clock source need to be assigned to osc_24m clock. Signed-off-by: Fancy Fang <chen.fang@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> (cherry picked from commit 8e43cd16c8bbfe5b7e3c0fc1e7c3ddf738d8db01)
2020-10-13MLK-22869 arch: arm64: imx8mn: fix i.MX8MN ocotp compatible stringAlice Guo
In imx8mn.dtsi, "fsl,imx7d-ocotp" should not be added to compatible of ocotp-ctrl because the ocotp of i.MX8MN is incompatible with i.MX7D, and it is compatible with i.MX8MM. And with the upper change, we could also see the real value of soc_uid by cat /sys/devices/soc0/soc_uid. Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-09-02MLK-24613 arch: arm64: imx8mn: add ddr pmu device nodeJoakim Zhang
Add ddr pmu device node for i.MX8MN EVK. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
2020-08-13arm64: dts: imx8mq/mm/mn: add caam snvs clockHoria Geantă
On i.MX8M* the snvs clock is mandatory cf. DT binding doc, add it. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Franck Lenormand <franck.lenormand@nxp.com>
2020-05-11MLK-23659-2: arm64: dts: imx8mn: add snvs clock for snvs_pwrkeyRobin Gong
Make same change as i.mx8mp. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Anson Huang <anson.huang@nxp.com>
2020-04-03arm64: dts: imx8mn: add clock for snvs rtc nodeHoria Geantă
Initial commit adding imx8mn support: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support") added the "clock-names" property for the snvs rtc node, however it missed adding the clock. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> (cherry picked from commit 42ef961b247f340f365b096e25983b4ee256f3ab) Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2020-03-26MLK-23678 arm64: dts: imx8m: Add arm pmu node for imx8mn/mpJacky Bai
Add the pmu node on i.MX8MN/MP to enable the ARM PMU support. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-03-05arm64: dts: imx8mn: align CAAM Job ring node namingSilvano di Ninno
Align i.MX 8mn Job ring node naming with the rest of the i.MX 8 platforms. Fixes: aad2417502a1 ("arm64: dts: imx8mn: add crypto node") Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
2020-01-17MLK-23229: arm64: dts: remove CSI1_PHY_REF clock for i.MX8MN MIPI CSIGuoniu.zhou
Remove CSI1_PHY_REF clock for i.MX8MN MIPI CSI since it's not being used. Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com> Reviewed-by: Robby Cai <robby.cai@nxp.com>
2019-12-23LF-527 ARM64: dts: imx8mn: change the usdhc compatible with imx8mmHaibo Chen
the usdhc IP of imx8mn and imx8mm is the same, so let imx8mn share the compatible with imx8mm. so that it can support HS400ES and CMDQ. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-12-20LF-531-2 arm64: dts: imx8mn: add cma settingXianzhong
Fix GPU AXI bus error when run WebGL 2.0 CTS, The original CMA size is 320MB, set with 640MB, This patch will align 8MN CMA size with L4.14. Signed-off-by: Xianzhong <xianzhong.li@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-12-20LF-531-1 arm64: dts: imx8mq/imx8mn: fix gpu settingXianzhong
move gpu device configuration out of soc subsystem, gpu parameters exceed soc range and will be skipped: ranges = <0x0 0x0 0x0 0x3e000000> Signed-off-by: Xianzhong <xianzhong.li@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-12-19MLK-23131-1 arm64: dts: imx8mm/imx8mn: Add dram_pll_div clock for busfreqAnson Huang
On i.MX8MM/i.MX8MN platforms, need to add dram_pll_div clock for busfreq driver to update dram_core clock when DRAM frequency switches between low bus mode and high bus mode. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
2019-12-12LF-413-2 arm64: dtsi: imx8mn: remove usbotg2Li Jun
Remove usbotg2 as imx8mn only has one usb port. Reviewed-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
2019-12-12LF-413-1 arm64: dtsi: imx8mn: add power domain for usbLi Jun
Add the missing power domain for usbotg1. Reviewed-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
2019-12-03LF-302-2 arm64: dtsi: imx8mn: remove unused clk for usbLi Jun
Remove unused clock IMX8MN_CLK_USB_CORE_REF. Reviewed-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
2019-11-29LF-223-02 arm64: dts: freescale: Add cpuidle state node for im8mnJacky Bai
Add the cpuidle state node for imx8mn. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Anson Huang <anson.huang@nxp.com>
2019-11-29LF-223-01 arm64: dts: freescale: Add system counter timer node on imx8mnJacky Bai
Add the system counter node on imx8mn. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Anson Huang <anson.huang@nxp.com>
2019-11-27MLKU-25-4 arm64: dts: imx8m: add secure memoryHoria Geantă
Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-11-27MLKU-38-5 arm64: dts: imx8m: add caam snvs and secvioHoria Geantă
Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-11-25LF-39 arm64: dts: imx8mn Add busfreq support for imx8mnJacky Bai
Add busfreq support for imx8mn. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2019-11-25MLK-23015: add flexspi support for iMX8MN DDR4 EVKHan Xu
Add flexspi support in iMX8MN DDR4 EVK dts Signed-off-by: Han Xu <han.xu@nxp.com>
2019-11-25LF-47 arm64: dts: imx8mn: Add thermal support on imx8mnJacky Bai
Add thermal support on i.MX8MN. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-11-25ARM64: dts: freescale: imx8mn: correct clock setting for sdma1Robin Gong
sdma1 should work in clock ratio 1:2, thus ahb clock should be correct to IMX8MN_CLK_AHB, otherwise, 1:1 clock ratio will be used wrong like sdma2/3. Correct it to IPG@66Mhz/AHB@133Mhz. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25arm64: dts: add flexspi in iMX8MN EVK dtsHan Xu
add flexspi support in iMX8MN EVK dts Signed-off-by: Han Xu <han.xu@nxp.com>
2019-11-25arm64: dts: add the rpmsg and enable rpmsg audio on imx8mnRichard Zhu
Enable the RPMSG on iMX8MN DDR4 EVK platform, and verify the rpmsg audio feature. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com>
2019-11-25arm64: dts: imx8mn: add display devices nodesFancy Fang
Add LCDIF, MIPI DSI, display subystem display devices and the required resets nodes. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
2019-11-25arm64: dts: imx8mn: add device nodes support for cameraGuoniu.zhou
Camera subsystem of imx8mn is consist of ISI, MIPI CSI and OV5640 sensor, add device nodes for them. Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
2019-11-25arm64: dts: imx8mn: add dispmix reset support in dts for imx8mnGuoniu.zhou
Enable dispmix reset controller function in dts for imx8mn Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
2019-11-25MLKU-123-3 arm64: dts: imx8mn: Add CAAM nodeHoria Geantă
Add node for CAAM - Cryptographic Acceleration and Assurance Module. Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2019-11-25ARM64: dts: imx8mn: enable audio modulesShengjiu Wang
Enable SAI/MICFIL/SPDIF/WM8524/AK5558 Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2019-11-25arm64: dts: imx8mq/mm/mn: add the enet wakeup supportFugang Duan
Add the wakeup irq property as the system wakeup source. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2019-11-25arm64: dts: imx8mn: Add GPU device for 8MNMinjie Zhuang
Add gpu in device tree: arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts arch/arm64/boot/dts/freescale/imx8mn.dtsi Signed-off-by: Minjie Zhuang <minjie.zhuang@nxp.com> [ Aisheng: fix unnecessary double space issue ] Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8mn: Add the power domain node for imx8mnJacky Bai
Add the power domain nodes for i.MX8MN. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-10-28arm64: dts: imx8mn: fix compatible string for sdmaShengjiu Wang
SDMA in i.MX8MN should use same configuration as i.MX8MQ So need to change compatible string to be "fsl,imx8mq-sdma". Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-14arm64: dts: imx8mn: Use correct clock for usdhc's ipg clkAnson Huang
On i.MX8MN, usdhc's ipg clock is from IMX8MN_CLK_IPG_ROOT, assign it explicitly instead of using IMX8MN_CLK_DUMMY. Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-19arm64: dts: imx8mn: Add cpu-freq supportAnson Huang
Add A53 OPP table, cpu regulator and speed grading node to support cpu-freq driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-19arm64: dts: imx8mn: Add gpio-ranges propertyAnson Huang
Add "gpio-ranges" property to establish connections between GPIOs and PINs on i.MX8MN pinctrl driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-19arm64: dts: freescale: Add i.MX8MN dtsi supportAnson Huang
The i.MX8M Nano Media Applications Processor is a new SoC of the i.MX8M family, it is a 14nm FinFET product of the growing mScale family targeting the consumer market. It is built in Samsung 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad core ARM Cortex-A53 cluster, Cortex-M7 low-power coprocessor and graphics accelerator. This patch adds the basic dtsi support for i.MX8MN. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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