Age | Commit message (Collapse) | Author |
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Move mipi_csi clock changes from imx8mp.dtsi into 0v2775 dtb,
to avoid failures for ov5460.
Tested with VSI ISP demo 28/02/20 release.
Not tested with camera on CSI2.
Fixes: 636de0a39e23 ("Add ov2775 dtb for imx8mp")
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Acked-by: G.n. Zhou <guoniu.zhou@nxp.com>
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Add the PCIe power domain into the PCIe DTS node refer to the power
consumption refine.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-and-tested-by: Jacky Bai <ping.bai@nxp.com>
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Make sure all the needed clocks are enabled for mipi_csi,
do not rely on mipi_dsi or lcdif to enable them.
Needed: media_cam1_pix, media_axi_root, media_apb_root
Tested with VSI ISP demo.
Not tested with camera on CSI2.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Tested-by: Oliver Brown <oliver.brown@nxp.com>
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Add the corresponding power domains for MIPI DSI, LCDIF1 and
LCDIF2 device nodes.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: G.n. Zhou <guoniu.zhou@nxp.com>
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Bind power doamin to ISI and CSI of iMX8MP
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
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Currently hsio root clock is always on, which should be handled
by hsiomix power domain driver but there is problem on doing that,
see commit 5aaceda10ac0 ("MLK-23671-02 arm64: dts: imx8mp: Add the
rpm-always-on flag for hsiomix domain"):
"The hsiomix power domain need to be runtime always-on to maintain USB's
wakeup ability. As this domain need to be boot on by default, no one
will call the power on callback during system boot up, the clock
enable/disable will mismatch, so remove the clocks from this domain.
the necessary clocks will be handled in TF-A."
There is one clock(AXI_DIV) shared between hsiomix and USB, with
rpm-always-on property added, like above commit description, power
domain driver will not do enable/disable and think it's always on, but
it can be disabled by USB driver, afterwards if power domain driver does
hsiomix register access, system will hang because the required clock was
disabled.
Now with above commit and change in TF-A, those clocks are not
controlled by Linux for power domain operations, but user driver(i.e. USB
and PCIE) has to handle it.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
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USB controller isolation is controlled by hsiomix power domain,
instead of usb_otg1_pd and usb_otg2_pd, those 2 power domains are
for USB PHY isolation and in our case, PHY is power is kept always
on(but can be suspended).
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
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1. add i2c-rpmsg support for i2c3
2. reserve memory for LPA, for the accessable memory
of m7: 0x40000000-0xbfffffff.
3. support LPA, playback only
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
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the HDMI APB clock & 266M REF clock should be on when doing HDMIMIX power domain
on/off, so add these clock to hdmimix pd node.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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There is hardware issue: TKT0535653
SDMA3 can't work without setting AUDIOMIX_CLKEN0[SDMA2] (bit-26) to 1
The workaround is:
As the reset state of AUDIOMIX_CLKEN0[SDMA2] is enabled,
we just need to keep it on as reset state, don't touch it
in kernel, then every thing is same as before.
So for sdma node, it only need to care about AHB and IPG clock,
the gate of AUDIOMIX_CLKEN0[SDMA2] is always enabled.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
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Add the pmu node on i.MX8MN/MP to enable the ARM PMU support.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The hsiomix power domain need to be runtime always-on to maintain USB's
wakeup ability. As this domain need to be boot on by default, no one will
call the power on callback during system boot up, the clock enable/disable
will mismatch, so remove the clocks from this domain. the necessary clocks
will be handled in TF-A.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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Add the PCIe DMA IRQ name.
Enable the PCIe EP RC validation on iMX8MP EVK boards.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
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node
This patch adds APB clock related properties in lvds phy node,
so that the driver may get and control the APB clock.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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The HSIOMIX domain need to be on if usb wakeup is enabled for system
wakeup source, so add the 'active-wakeup' property for this domain.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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Add power domain property for vpu node to enable power domain
off when module entering runtime PM.
BuildInfo:
- ATF 13de44f73
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
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SOFITPSYNC
If this bit is set to '0' operating in host mode, the core keeps the
UTMI/ULPI PHY on the first port in a non-suspended state whenever there
is a SuperSpeed port that is not in Rx.Detect, SS.Disable and U3.
If this bit is set to '1' operating in host mode, the core keeps the
UTMI/ULPI PHY on the first port in a non-suspended state whenever the
other non-SuperSpeed ports are not in a suspended state. This feature is
useful because it saves power by suspending UTMI/ULPI when SuperSpeed
only is active, and it helps resolve when the PHY does not transmit a
host resume unless it is placed in suspend state. This bit must be
programmed as a part of initialization at power-on reset, and must not
be dynamically changed afterwards.
with this property specified, this bit is set to be 1.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
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Add ISI m2m device node in dts for i.MX865 platform
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
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IP module name is AUDIO XCVR, eARC being just one
of the audio interfaces supported by XCVR IP module.
Use IP module name instead of a specific audio interface
in order to avoid confusion.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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Add power domain for GPU 3D/2D and VIP for imx8mp.
Signed-off-by: Ella Feng <ella.feng@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
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There is a shared gate clock exists after 'IMX8MP_CLK_MEDIA_
AXI_ROOT' and 'IMX8MP_CLK_MEDIA_AXI_ROOT' clocks according to
the clock tree, so correct clock values for 'mediamix-pd' by
using the corresponding gate clocks.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Tested-by: Liu Ying <victor.liu@nxp.com>
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The GPU3D shader clock must be on to make sure that GPU3D can be reset
successfully.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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With the reserved memory for optee, Linux is no
longer able to allocate CMA within the allocation
range defined in the dtb.
Increase the alloc-range so that Linux can allocate in the 4G
address range (in case some DMA are not able to address more).
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Jian Li <jian.li@nxp.com>
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controller parent
Correct the HDMI irqsteer's interrupt controller parent, otherwise the HDMI
irq can NOT wakeup the cpu core from idle timely, then HDMI performance
will be impacted.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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sdma2/sdma3
Add new compatible 'imx8mp-sdma' for sdma2/sdma3 to support resume back after
audiomix off.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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The GPU AXI/AHB & ML AXI/AHB clock must be on when doing corresponding
power domain on/off, so Add these clocks to GPUMIX & MLMIX power domain.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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With GPC as interrupt parent, need set edac and irqsteer interrupt
parent as gpc.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
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BL32 base address is set within the first 1GByte of DDR.
As a new rule it will be set at base address + 0x16000000.
This new position will relax current dependency of the OPTEE
base address on the size of the DDR.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
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Design team confirms that i.MX8MP can support ARM/SOC with any
combinations(SOD/OD, SOD/ND, OD/OD, OD/ND, ND/ND, ND/OD), it has
level shift and STA timing passed, so ARM's 1.2GHz opp can use
typical 0.85V directly.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
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Similar with implementation for i.MX8QXP/QM ARM core uses mailboxes
to communicated with DSP.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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mu2 node is used by the mailbox framework for SOF. Add corresponding
compatible, clocks and mbox-cells properties.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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Add the wait mode workaround on i.MX8MP. it is just
a provisional patch for Alpha release. it will be
dropped in the future. As all the changes in this
patch need to be revered for that time, just including
all the changes of dts & driver in one patch to make
it more easier to track all the changes.
Coresight probe has some conlict with the IPI workaround.
it is meaningless to put effort on resolve such conflict,
and Coresight is not an must feature for Alpha release,
disable the Coresight support directly.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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Add ddr controller dts node to support edac driver for imx8mp.
Also change CMA alloc-ranges to avoid memory address confilct with
inline ECC region if ECC is enabled on imx8mp lpddr4.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
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This patch adds LDB devictree node support.
LVDS PHY node is also added as needed by the LDB node.
Also, connect lcdif2_disp port with lvds-channel@0/1 ports.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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This patch adds LCDIF2 node support.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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Add the PCIe support on iMX8MP.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <Fugang.duan@nxp.com>
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Add the busfreq node to enable the DDR DVFS support on i.MX8MP.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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This is a subdevice of audiomix MFD device, exposing
access to DSP control register from AudioMIX subsystem.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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1. Add reserved_mem for DSP and enable DSP.
2. Audio-mix DSP node will instantiate part of the AUDIOMIX who
takes care of DSP configuration.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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i.MX8MP should not share i.MX8MQ ocotp, it has different ocotp
ctrl layout and register numbers
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
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Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
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Add node for CAAM - Cryptographic Acceleration and Assurance Module.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
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Add the thermal node for i.MX8MP.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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Enable the sound-wm8960 and sound-micfil
1. Add audio device node for each IP in imx8mp
2. Add clocks for audiomix power domains
3. Enable the ASRC.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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It seems the audiomix_pd needs the following clocks:
IMX8MP_CLK_AUDIO_ROOT, IMX8MP_CLK_AUDIO_AXI_DIV
and IMX8MP_CLK_IPG_AUDIO_ROOT.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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Now the audiomix driver is working again, so enable it.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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Since the clocks that are unused get disabled on imx_5.4.y,
the IMX8MP_CLK_AUDIO_ROOT needs to be controlled by the audiomix
driver on suspend and resume. And that allows us to get
rid of the dummy clock of_clk_get_by_name that was there to
make sure the CCM driver gets probed before the audiomix.
The order of the clocks was all wrong. Fixed that here also.
Also added the PM runtime and the AUDIO_ROOT_CLK.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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new dts file for imx8mp hdmi.
Add all hdmimix submodules.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
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audiomix driver is not ready, disable it
to avoid bootup break.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
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