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2020-08-21MLK-24334-9: arch: arm64: dts: imx8dxl: unify adma_lcdifRobert Chiras
Currently, the adma_lcdif and it's related nodes are duplicated in 8qxp and 8dxl dts files. Since it's the same subsystem, move these nodes into generic files, so that both 8qxp and 8dxl dts files can use them. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
2020-05-22LF-811-4: arm64: dts: imx8qxp: Add lcdif subsystemRobert Chiras
Add the lcdif nodes for the LCDIF Display Controller subsystem. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
2020-03-13SSI-87: arm64: dts: imx8qxp: Add node for Security ViolationsFranck LENORMAND
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
2019-12-17LF-496-3 arm64: dts: imx8qxp: move memory-region to soc dtsiPeng Fan
memory-region in ss dtsi is not correct, it should be in soc dtsi, because the referenced region is in soc dtsi Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-12-04LF-318 arm64: dts: imx8qm/qxp: mark ocotp as read onlyPeng Fan
Mark ocotp as read only, if you need to program fuse in linux, remove this property. Acked-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-28arm64: dts: imx8qxp: Add mipi dsi nodesRobert Chiras
Add dts file for mipi dsi nodes and the corresponding endpoints. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
2019-11-26LF-136-1 ARM64: dts: imx8qxp.dtsi: add USB wakeup supportPeter Chen
Add both USB2 and USB3 wakeup support Acked-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2019-11-25MLK-22918 arm64: dts: imx8: add the alias for ethernetFugang Duan
Add alias for ethernet nodes. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2019-11-25arm64: dts: imx8qxp: Add CPU cooling supportAnson Huang
Add CPU cooling support for i.MX8QXP. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-11-25arm64: dts: freescale: Add i.MX8DXL phantom mek boardAnson Huang
Add i.MX8DXL phantom mek board DT. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-11-25MLKU-62-1 arm64: dts: imx8qm/imx8qxp: add security subsystemHoria Geantă
Security subsystem includes: -caam crypto engine -secure memory Notes: 1. caam has 4 job rings, however only last 2 rings are accessible from the kernel. 2. Controller DT node is added in the same power domain as the JR2 (1st jr showing in DT). This is needed since controller driver (ctrl.c) needs first jr (JR2 in this case) "powered", so it can access its register page (which has some aliases for registers located in controller page, page that is not accesible from the kernel). Adding controller DT node to the power domain leads to SCU f/w being instructed to "power up" JR2. What actually happens is that: -XRDC2 is programmed to provide access to JR2 register page -SECO f/w is instructed to update JR2DID_LS and possibly JR2DID_MS[USE_OUT]. USE_OUT details from Security RM: "JRaDID_MS contains a USE_OUT field that enables a second set of ICID and DID values. When USE_OUT=1, this Job Ring's *data* write transactions will assert TrustZone Non-SecureWorld, along with the OUT_DID and OUT_ICID values from JRSDID_LS. All other bus transactions, including all reads, descriptor write-backs and job completion status writes will assert the PRIM_ICID, PRIM_ICID and not PRIM_TZ values from JRaDID_MS. When USE_OUT=0, all bus transactions performed on behalf of this Job Ring will use the PRIM_ICID, PRIM_ICID and not PRIM_TZ values from JRSDID_MS." Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2019-11-25arm64: dts: imx8qm/imx8qxp: enable enet wakeup irqFugang Duan
Enable enet wakeup irqs into scu-pd wakeup irq list. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2019-11-25arm64: dts: imx8qm/imx8qxp: Add GPU devices for 8QM/8QXPMinjie Zhuang
Add gpu in device tree: arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi arm64/boot/dts/freescale/imx8-ss-gpu1.dtsi arm64/boot/dts/freescale/imx8qm-mek.dts arm64/boot/dts/freescale/imx8qm-ss-gpu.dtsi arm64/boot/dts/freescale/imx8qm.dtsi arm64/boot/dts/freescale/imx8qxp-ss-gpu.dtsi arm64/boot/dts/freescale/imx8qxp.dtsi Signed-off-by: Minjie Zhuang <minjie.zhuang@nxp.com>
2019-11-25arm64: dts: add partition reset function for i.MX8QM/QXPClark Wang
Add partition reset function for i.MX8QM/QXP. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
2019-11-25arm64: dts: imx8: add the fixed hsio ref clocksRichard Zhu
External 100Mhz differential OSC is used as HSIO REF clock source, so set it as the parent clk of the PHY PCLK. Then add the fixed HSIO REF clocks regarding the different HSIO use cases. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-11-25ARM64: dts: freescale: imx8qm/qxp: add imx_sc_pwr_key driverRobin Gong
Add imx_sc_pwr_key driver for i.mx8qm/qxp. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25arm64: imx8qxp-ss-lvds.dtsi: Rename imx8-ss-lvds.dtsi to imx8qxp-ss-lvds.dtsiLiu Ying
i.MX8qxp LVDS display feature is supported by MIPI DSI/LVDS combo subsystem. i.MX8qm LVDS display feature is supported by standalone LVDS subsystem. There is not a lot of common hardwares for the two kinds of subsytems, so rename imx8-ss-lvds.dtsi to imx8qxp-ss-lvds.dtsi. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2019-11-25arm64: imx8-ss-dc0.dtsi: Improve DC0 subsystem device treeLiu Ying
This patch improves DC0 subsystem device tree to clearly reflect it is the first DC subsystem instance embedded in a SoC. So, some renaming happens in imx8-ss-dc.dtsi, and finally imx8-ss-dc.dtsi is renamed to be imx8-ss-dc0.dtsi. Also, extract the i.MX8qxp specific compatible string, display clocks, display ports and display-subsystem from imx8-ss-dc0.dtsi and put them in SoC specific imx8qxp-ss-dc.dtsi. Signed-off-by: Liu Ying <victor.liu@nxp.com>
2019-11-25arm64: imx8qxp: Add CAN wakeup supportJoakim Zhang
Pass wakeup source's hardware irq number for CAN. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
2019-11-25arm64: dts: imx8qxp: add CAN aliasJoakim Zhang
Add CAN alias on i.MX8QXP. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
2019-11-25arm64: imx8qxp: Add IRQSTEER wakeup supportAnson Huang
Add a "wakeup-irq" property in scu pd's node to pass wakeup source's hardware irq number for irqsteer wakeup support in kernel. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-11-25arm64: dts: imx: imx8qxp img does not support csi1Dong Aisheng
imx8qxp img does not support csi1 Note: a better way is to split csi, pi and img ss, then imx8qm/qxp could select the required ones. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8qxp: postpone gpu ss registerDong Aisheng
GPU driver does not support DEFER_PROBE, we have to postpone it's register to ensure it's probe&suspend is later than the dependent resoureces. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8: gpu0: move into a separate ss dtsiDong Aisheng
move gpu0 changes into a separate ss dtsi Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8: gpu: fully switched to new clk bindingDong Aisheng
fully switched to new clk binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8qxp: convert cpu clocks to new bindingDong Aisheng
convert cpu clocks to new binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8: audio: fully switched to new clk bindingDong Aisheng
fully switched to new clk binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8: cm40: move into a separate ss dtsiDong Aisheng
move cm40 changes into a separate ss dtsi Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8: cm40: fully switched to new clk bindingDong Aisheng
fully switched to new clk binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8qxp: add fallback compatible string for scu clkDong Aisheng
add fallback compatible string for scu clk Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8: split adma ss into dma and audio ssDong Aisheng
amda ss is consisted of dma and audio ss in qxp which are also used in qm. Let's split them into two ss for better code reuse. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8: switch to two cell scu clock bindingDong Aisheng
switch to two cell scu clock binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8qxp: orginize dts in subsystemsDong Aisheng
MX8 SoC is comprised of a few HW subsystems while some of them can be reused in the different SoCs. So let's re-orginize them into subsystems in device tree as well for the possible reuse of the common part. Note, as there's still no devices of hsio subsys, so removed it first instead of creating a subsys headfile with no devices. They will be added back when new devices added. NOTE: this is a complementary patch of c24fc267a8a9 ("arm64: dts: imx8qxp: orginize dts in subsystems" based on latest upstream versions. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8qxp: move scu pd node before scu clock nodeDong Aisheng
SCU clock depends on SCU Power domain. So let's move scu pd node before scu clock to make it probe earlier. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8qxp: add fallback compatible string for scu pdDong Aisheng
According to binding doc, add the fallback compatible string for scu pd. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: imx8qxp: refine the rpmsg definitionsRichard Zhu
Move the memory definition of the RPMSG to the board dts file. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-11-25arm64: dts: imx8qxp: add pmic thermal zoneAnson Huang
Add i.MX8QXP MEK board's PMIC thermal zone support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-11-25arm64: dts: imx8: add fec fuse mac supportFugang Duan
Add ocotp fuse support and enable enet MAC fuse. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2019-11-25arm64: dts: imx8qxp: add the rpmsg supportRichard Zhu
Add the rpmsg support. - Setup the rpmsg reserved memory, one is used for vring, the other one is used for shared buffers. - The mailbox of the lsio mu5a is used by rpmsg on imx8qxp platforms Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-11-25arm64: imx8qxp.dtsi: Introduce LVDS subsystem supportLiu Ying
This patch introduces i.MX8qxp LVDS subsystem support in device tree. Signed-off-by: Liu Ying <victor.liu@nxp.com> [ Aisheng: update irqsteer to latest binding ] Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: imx8qxp.dtsi: Introduce DC subsystem supportLiu Ying
This patch introduces i.MX8qxp DC subsystem support in device tree. The dpu node is supported. Signed-off-by: Liu Ying <victor.liu@nxp.com> [ Aisheng: update irqsteer to latest binding ] [ Aisheng: Fix rebase conflict ] Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25arm64: dts: freescale: imx8qxp: add cpu opp tableAnson Huang
Add CPU opp table for cpu-freq. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-11-25arm64: dts: freescale: imx8qxp: add soc nodeAnson Huang
Add SoC node for Linux kernel SoC driver to use. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-11-25ARM64: dts: freescale: imx8qxp-mek: add gpu deviceXianzhong
Add gpu in device tree: arch/arm64/boot/dts/freescale/imx8qxp.dtsi arch/arm64/boot/dts/freescale/imx8qxp-mek.dts Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
2019-11-25arm64: dts: imx: add image subsystem dts support for IMX8Guoniu.zhou
Add image subsystem of imx8 device tree support Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com> [ Aisheng: update irqsteer to latest binding ] Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25ARM64: dts: imx: add i.MX8QXP thermal supportAnson Huang
Add i.MX8QXP CPU thermal zone support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> [ Aisheng: fix wrong postiion of thermal zones ] Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25ARM64: dts: add the hsio pcie support for imx8qm/qxpRichard Zhu
Add the hsio pcie support for imx8qm/qxp. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-11-25arm64: dts: imx8qxp: add i2c and intmux in cm40Joakim Zhang
Add i2c and intmux device which are in cm40 subsystem. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
2019-11-25ARM64: dts: freescale: imx8qxp: add edmav3 supportRobin Gong
Add edmav3 in dts. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25arm64: dts: imx8: add vpu supportZhou Peng
add vpu support Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
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