Age | Commit message (Collapse) | Author |
|
S32V234 SoCs provide two instances of FlexCAN. Each of S32V234-EVB and
S32V234-SBC use both of them. Add the can nodes and the necessary
pinctrl groups for FlexCAN PAD configurations in SIUL2.
The pinctrl_can* nodes for SBC include a fix for an S-pin reliability
issue.
Signed-off-by: Chircu-Mare Bogdan-Petru <Bogdan.Chircu@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Kay Potthoff <Kay.Potthoff@microsys.de>
Signed-off-by: Costin Carabas <costin.carabas@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
|
|
Add fec node to SOC dtsi and enable on s32v234-sbc board
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
|
|
These are required for managing additional clocks.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
|
|
Notes:
- Since the SDs that required to work at 1.8V encountered errors when
attempting to transition to that voltage, support for 1.8V has been
disabled for S32V234.
- The maximum bus-width for SD/eMMC is set to 8 bits by default, in order
to increase the speed. The driver will detect automatically the maximum
supported bus-width according to the used media properties.
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
|
|
Enable the clocks needed for LINFlexD UART support on Treerunner and make
use of them in the LINFlexD driver.
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Adrian.Nitu <adrian.nitu@freescale.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Iustin Dumitrescu <Iustin.Dumitrescu@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
|
|
Update device tree with nodes needed by the clock driver, including clock
generation module (MC_CGM), mode entry module (MC_ME) and system reset
controller (SRC).
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Dragoș Papavă <dragos.papava@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
|
|
Add pinctrl groups for UART0 and UART1 PAD configurations in SIUL2.
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Catalin Udma <catalin-dan.udma@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
|
|
Add node for the SIUL2 pin controller, which will be used by the pinctrl
driver.
Signed-off-by: Grigore Lupescu <grigore.lupescu@freescale.com>
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
|
|
Add initial version of device tree for S32V234-EVB, including nodes for the
4 Cortex-A53 cores, AIPS bus with UART modules, ARM architected timer and
Generic Interrupt Controller (GIC).
Keep SoC level separate from board level to let future boards with this SoC
share common properties, while the dts files will keep board-dependent
properties.
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Dan Nica <dan.nica@nxp.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Phu Luu An <phu.luuan@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|