summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/rockchip/rk3399.dtsi
AgeCommit message (Collapse)Author
2022-03-19arm64: dts: rockchip: reorder rk3399 hdmi clocksSascha Hauer
[ Upstream commit 2e8a8b5955a000cc655f7e368670518cbb77fe58 ] The binding specifies the clock order to "cec", "grf", "vpll". Reorder the clocks accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220126145549.617165-19-s.hauer@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-07-25arm64: dts: rockchip: fix pinctrl sleep nodename for rk3399.dtsiJohan Jonker
[ Upstream commit a7ecfad495f8af63a5cb332c91f60ab2018897f5 ] A test with the command below aimed at powerpc generates notifications in the Rockchip arm64 tree. Fix pinctrl "sleep" nodename by renaming it to "suspend" for rk3399.dtsi make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/powerpc/sleep.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210126110221.10815-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-02-17arm64: dts: rockchip: Fix PCIe DT properties on rk3399Marc Zyngier
[ Upstream commit 43f20b1c6140896916f4e91aacc166830a7ba849 ] It recently became apparent that the lack of a 'device_type = "pci"' in the PCIe root complex node for rk3399 is a violation of the PCI binding, as documented in IEEE Std 1275-1994. Changes to the kernel's parsing of the DT made such violation fatal, as drivers cannot probe the controller anymore. Add the missing property makes the PCIe node compliant. While we are at it, drop the pointless linux,pci-domain property, which only makes sense when there are multiple host bridges. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200815125112.462652-3-maz@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-12-16arm64: dts: rockchip: Assign a fixed index to mmc devices on rk3399 boards.Markus Reichl
[ Upstream commit 0011c6d182774fc781fb9e115ebe8baa356029ae ] Recently introduced async probe on mmc devices can shuffle block IDs. Pin them to fixed values to ease booting in environments where UUIDs are not practical. Use newly introduced aliases for mmcblk devices from [1]. [1] https://patchwork.kernel.org/patch/11747669/ Signed-off-by: Markus Reichl <m.reichl@fivetechno.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20201104162356.1251-1-m.reichl@fivetechno.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-03arm64: dts: rockchip: swap interrupts interrupt-names rk3399 gpu nodeJohan Jonker
[ Upstream commit c604fd810bda667bdc20b2c041917baa7803e0fb ] Dts files with Rockchip rk3399 'gpu' nodes were manually verified. In order to automate this process arm,mali-midgard.txt has been converted to yaml. In the new setup dtbs_check with arm,mali-midgard.yaml expects interrupts and interrupt-names values in the same order. Fix this for rk3399. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/gpu/ arm,mali-midgard.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200425143837.18706-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-05-20arm64: dts: rockchip: Rename dwc3 device nodes on rk3399 to make dtc happyChen-Yu Tsai
commit 190c7f6fd43a776d4a6da1dac44408104649e9b7 upstream. The device tree compiler complains that the dwc3 nodes have regs properties but no matching unit addresses. Add the unit addresses to the device node name. While at it, also rename the nodes from "dwc3" to "usb", as guidelines require device nodes have generic names. Fixes: 7144224f2c2b ("arm64: dts: rockchip: support dwc3 USB for rk3399") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20200327030414.5903-7-wens@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-27arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCsEnric Balletbo i Serra
As per binding documentation [1], the DWC3 core should have the "ref", "bus_early" and "suspend" clocks. As explained in the binding, those clocks are required for new platforms but not for existing platforms before commit fe8abf332b8f ("usb: dwc3: support clocks and resets for DWC3 core"). However, as those clocks are really treated as required, this ends with having some annoying messages when the "rockchip,rk3399-dwc3" is used: [ 1.724107] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2 [ 1.731893] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2 [ 2.495937] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2 [ 2.647239] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2 In order to remove those annoying messages, update the DWC3 hardware module node and add all the required clocks. With this change, both, the glue node and the DWC3 core node, have the clocks defined, but that's not really a problem and there isn't a side effect on do this. So, we can get rid of the annoying get clk error messages. [1] Documentation/devicetree/bindings/usb/dwc3.txt Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Fix multiple thermal zones conflict in rk3399.dtsiDaniel Lezcano
Currently the common thermal zones definitions for the rk3399 assumes multiple thermal zones are supported by the governors. This is not the case and each thermal zone has its own governor instance acting individually without collaboration with other governors. As the cooling device for the CPU and the GPU thermal zones is the same, each governors take different decisions for the same cooling device leading to conflicting instructions and an erratic behavior. As the cooling-maps is about to become an optional property, let's remove the cpu cooling device map from the GPU thermal zone. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-04arm64: dts: rockchip: fix isp iommu clocks and power domainHelen Koike
isp iommu requires wrapper variants of the clocks. noc variants are always on and using the wrapper variants will activate {A,H}CLK_ISP{0,1} due to the hierarchy. Tested using the pending isp patch set (which is not upstream yet). Without this patch, streaming from the isp stalls. Also add the respective power domain and remove the "disabled" status. Refer: RK3399 TRM v1.4 Fig. 2-4 RK3399 Clock Architecture Diagram RK3399 TRM v1.4 Fig. 8-1 RK3399 Power Domain Partition Signed-off-by: Helen Koike <helen.koike@collabora.com> Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-04-11arm64: dts: rockchip: fix cts, rts pin assign of UART3 for rk3399Katsuhiro Suzuki
This patch fixes pin assign of cts and rts signal of UART3. Currently GPIO3_C2 and C3 pins are assigned but TRM says that GPIO3_C0 and C1 are correct. Refer: RK3399 TRM v1.4 - Table 19-1 UART Interface Description Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-04-11arm64: dts: rockchip: bulk convert gpios to their constant counterpartsHeiko Stuebner
Rockchip SoCs use 2 different numbering schemes. Where the gpio- controllers just count 0-31 for their 32 gpios, the underlying iomux controller splits these into 4 separate entities A-D. Device-schematics always use these iomux-values to identify pins, so to make mapping schematics to devicetree easier Andy Yan introduced named constants for the pins but so far we only used them on new additions. Using a sed-script created by Emil Renner Berthing bulk-convert the remaining raw gpio numbers into their descriptive counterparts and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x mappings: /rockchip,pins *=/bcheck b # to end of script :append-next-line N :check /^[^;]*$/bappend-next-line s/<RK_GPIO\([0-9]\) /<\1 /g s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g Suggested-by: Emil Renner Berthing <esmil@mailme.dk> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Acked-by: Robin Murphy <robin.murphy@arm.com>
2019-03-27arm64: dts: rockchip: Define drive-impedance-ohm for RK3399's emmc-phy.Christoph Muellner
A previous patch introduced the property 'drive-impedance-ohm' for the RK3399's emmc phy node. This patch sets this value explicitly to the default value of 50 Ohm. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-03-27arm64: dts: rockchip: Disable DCMDs on RK3399's eMMC controller.Christoph Muellner
When using direct commands (DCMDs) on an RK3399, we get spurious CQE completion interrupts for the DCMD transaction slot (#31): [ 931.196520] ------------[ cut here ]------------ [ 931.201702] mmc1: cqhci: spurious TCN for tag 31 [ 931.206906] WARNING: CPU: 0 PID: 1433 at /usr/src/kernel/drivers/mmc/host/cqhci.c:725 cqhci_irq+0x2e4/0x490 [ 931.206909] Modules linked in: [ 931.206918] CPU: 0 PID: 1433 Comm: irq/29-mmc1 Not tainted 4.19.8-rt6-funkadelic #1 [ 931.206920] Hardware name: Theobroma Systems RK3399-Q7 SoM (DT) [ 931.206924] pstate: 40000005 (nZcv daif -PAN -UAO) [ 931.206927] pc : cqhci_irq+0x2e4/0x490 [ 931.206931] lr : cqhci_irq+0x2e4/0x490 [ 931.206933] sp : ffff00000e54bc80 [ 931.206934] x29: ffff00000e54bc80 x28: 0000000000000000 [ 931.206939] x27: 0000000000000001 x26: ffff000008f217e8 [ 931.206944] x25: ffff8000f02ef030 x24: ffff0000091417b0 [ 931.206948] x23: ffff0000090aa000 x22: ffff8000f008b000 [ 931.206953] x21: 0000000000000002 x20: 000000000000001f [ 931.206957] x19: ffff8000f02ef018 x18: ffffffffffffffff [ 931.206961] x17: 0000000000000000 x16: 0000000000000000 [ 931.206966] x15: ffff0000090aa6c8 x14: 0720072007200720 [ 931.206970] x13: 0720072007200720 x12: 0720072007200720 [ 931.206975] x11: 0720072007200720 x10: 0720072007200720 [ 931.206980] x9 : 0720072007200720 x8 : 0720072007200720 [ 931.206984] x7 : 0720073107330720 x6 : 00000000000005a0 [ 931.206988] x5 : ffff00000860d4b0 x4 : 0000000000000000 [ 931.206993] x3 : 0000000000000001 x2 : 0000000000000001 [ 931.206997] x1 : 1bde3a91b0d4d900 x0 : 0000000000000000 [ 931.207001] Call trace: [ 931.207005] cqhci_irq+0x2e4/0x490 [ 931.207009] sdhci_arasan_cqhci_irq+0x5c/0x90 [ 931.207013] sdhci_irq+0x98/0x930 [ 931.207019] irq_forced_thread_fn+0x2c/0xa0 [ 931.207023] irq_thread+0x114/0x1c0 [ 931.207027] kthread+0x128/0x130 [ 931.207032] ret_from_fork+0x10/0x20 [ 931.207035] ---[ end trace 0000000000000002 ]--- The driver shows this message only for the first spurious interrupt by using WARN_ONCE(). Changing this to WARN() shows, that this is happening quite frequently (up to once a second). Since the eMMC 5.1 specification, where CQE and CQHCI are specified, does not mention that spurious TCN interrupts for DCMDs can be simply ignored, we must assume that using this feature is not working reliably. The current implementation uses DCMD for REQ_OP_FLUSH only, and I could not see any performance/power impact when disabling this optional feature for RK3399. Therefore this patch disables DCMDs for RK3399. Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Fixes: 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1") Cc: stable@vger.kernel.org [the corresponding code changes are queued for 5.2 so doing that as well] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-03-18arm64: dts: rockchip: Add capacity-dmips-mhz attributes to rk3399Marc Zyngier
The RK3399 has the interesting property to be a so called "big-little" system, where not all the CPUs are equal (the A53s are much weaker than the A72s). So far, we're not telling the OS that there is such a difference in processing capacity, and Linux assumes that they are equal. Too bad. Let's tell the OS about this by using the capacity-dmips-mhz property. The values used here are those used on the Juno platform, which is quite similar. This leads to the scheduler knowing that it can pack more tasks on the A72s, and leads to a better interactive experience. Tested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-01-30arm64: dts: Remove inconsistent use of 'arm,armv8' compatible stringRob Herring
The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-12-06arm64: dts: rockchip: add VPU device node for RK3399Ezequiel Garcia
Add the Video Processing Unit node for the RK3399 SoC. Also, fix the VPU IOMMU node, which was disabled and lacking its power domain property. Reviewed-by: Tomasz Figa <tfiga@chromium.org> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-11-19arm64: dts: rockchip: Add all CPUs in cooling mapsViresh Kumar
Each CPU can (and does) participate in cooling down the system but the DT only captures a handful of them, normally CPU0, in the cooling maps. Things work by chance currently as under normal circumstances its the first CPU of each cluster which is used by the operating systems to probe the cooling devices. But as soon as this CPU ordering changes and any other CPU is used to bring up the cooling device, we will start seeing failures. Also the DT is rather incomplete when we list only one CPU in the cooling maps, as the hardware doesn't have any such limitations. Update cooling maps to include all devices affected by individual trip points. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-11-05arm64: dts: rockchip: add rk3399 SPI DMAsEmil Renner Berthing
Add spi dma channels as specified by the rk3399 TRM. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26arm64: dts: rockchip: add missing address and size cells for rk3399 mipi dsiHeiko Stuebner
DSI controllers are also the hosts of their dsi bus and therefore contain nodes describing the attached panels with their reg properties containing the virtual ids. The dsi controller nodes on rk3399 lacked the #address-cells and #size-cells for these subnodes, so add them. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-08-29arm64: dts: rockchip: Add idle-states to device tree for rk3399Tony Xie
Add idle-states for cpu and cluster sleep states. Signed-off-by: Tony Xie <tony.xie@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-07-25arm64: dts: rockchip: remove deprecated Type-C PHY properties on rk3399Enric Balletbo i Serra
Commit 0fbc47d9e426 ("phy: rockchip-typec: deprecate some DT properties for various register fields.") deprecates some Rockchip Type-C properties. As these are now not needed, remove from the device tree file. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-07-03arm64: dts: rockchip: add some common pin-settings to rk3399Randy Li
Those pins would be used by many boards. Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-06-20arm64: dts: rockchip: generalize rk3399 #sound-dai-cellsHeiko Stuebner
The soc spdif and i2s controllers always only have one compontent, so always require #sound-dai-cells to be 0. Therefore there is no need to duplicate this property in individual boards. So move them to rk3399.dtsi. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-06-20arm64: dts: rockchip: Add missing cooling device properties for CPUsViresh Kumar
The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Do minor rearrangement as well to keep ordering consistent. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-06-20arm64: dts: rockchip: connect hdmi sound in rk3399Vicente Bergas
Everything is in place and working, it only needed to be wired up. Signed-off-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-06-17arm64: dts: rockchip: use SPDX-License-IdentifierKlaus Goger
Update all 64bit rockchip devicetree files to use SPDX-License-Identifiers. All devicetrees claim to be either GPL or X11 while the actual license text is MIT. Therefore we use MIT for the SPDX tag as X11 is clearly wrong. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Brian Norris <briannorris@chromium.org> Acked-by: Matthias Brugger <mbrugger@suse.com> Acked-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-04-16arm64: dts: rockchip: add clocks in iommu nodesJeffy Chen
Add clocks in iommu nodes, since we are going to control clocks in rockchip iommu driver. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-04-16arm64: dts: rockchip: add usb3-phy otg-port support for rk3399Enric Balletbo i Serra
Add the usb3 phyter for the USB3.0 OTG controller. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-04-16arm64: dts: rockchip: assign clock rate for cpll child clocks on rk3399Lin Huang
These clocks do not assign default clock frequency, and use the default cru register value to get frequency, so if cpll increase frequency, these clocks also increase their frequency, that may exceed their signed off frequency. So assign default clock for them to avoid it. NOTE: on none of the boards currently in mainline do we expect CPLL to be anything other than 800 MHz, but some future boards might have it. It's still good to be explicit about the clock rates to make diffing against future boards easier and also to rely less on BIOS muxing. Signed-off-by: Lin Huang <hl@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-04-05Merge tag 'armsoc-dt' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree updates from Arnd Bergmann: "This is the usual set of changes for device trees, with over 700 non-merged changesets. There is an ongoing set of dtc warning fixes and the usual bugfixes, cleanups and added device support. The most interesting bit as usual is support for new machines listed below: - The Allwinner H6 makes its debut with the Pine-H64 board, and we get two new machines based on its older siblings: the H5 based OrangePi Zero+ and the A64 based Teres-I Laptop from Olimex. On the 32-bit side, we add The Olimex som204 based on Allwinner A20, and the Banana Pi M2 Zero development board (based on H2). - NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972 development board and p2888 CPU module. - The Nuvoton npcm750 is a BMC that was newly added, for now we only support running on the evaluation board. - STmicroelectronics stm32 gains support for the stm32mp157c and two evaluation boards. - The Toradex Colibri board family grows a few members based on the i.MX6ULL variant. - The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6 family of chips. - The Phytec phyBOARD Mira is a family of industrial boards based on i.MX6. For now, four models get added. - TI am335x based PDU-001 is an industrial embedded machine used for traffic monitoring - The Aspeed platform now supports running on the BMC on the Qualcomm Centriq 2400 server - Samsung Exynos4 based Galaxy S3 is a family of mobile phones Qualcomm msm8974 based Galaxy S5 is a rather different phone made by the same company. - The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file for the various boards made by Xilinx themselves, as well as the Digilent Zybo Z7. - The ARM Versatile family now supports the "IB2" interface board. - The Renesas H2 based "Stout" and the H3 based Salvator-X are more evaluation boards named after a kind of beer, as most of them are. The r8a77980 (V3H) based "Condor" apparently doesn't follow that tradition. ;-) - ROC-RK3328-CC is a simple developement board from the Libre Computer Project, based on the Rockchips RK3328 SoC - Haiku is another development board plus Qseven module based on Rockchips RK3368 and made by Theobroma Systems" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (701 commits) arm: dts: modify Nuvoton NPCM7xx device tree structure arm: dts: modify Makefile NPCM750 configuration name arm: dts: modify clock binding in NPCM750 device tree arm: dts: modify timer register size in NPCM750 device tree arm: dts: modify UART compatible name in NPCM750 device tree arm: dts: add watchdog device to NPCM750 device tree arm64: dts: uniphier: add ethernet node for PXs3 ARM: dts: uniphier: add pinctrl groups of ethernet for second instance arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+ arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0 arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier arm: dts: armada-385-db-ap: use SPDX-License-Identifier arm: dts: armada-388-rd: use SPDX-License-Identifier arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier arm: dts: armada-370-db: use SPDX-License-Identifier arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs ...
2018-03-28Merge tag 'v4.17-rockchip-dts64-1' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts64 changes for 4.17" from Heiko Stübner: The rk3399 gained support its Cadence displayport controller and some minor additions like pins for 2ch i2s0 and the cif test clocks as well as a default rate for ACLK_VIO that should be 400MHz according to the TRM. The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using that so far. New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM + baseborad from Theobroma Systems and a standalone variant of the Sapphire board, as a lot of people where using that without the Exkavator baseboard. Sapphire also saw a lot of small cleanups of things that are not part of the actual Sapphire board, but the baseboard instead. The rk3399-puma board got i2s and tsadc support and Gru got its DP node enabled. * tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: remove keep-power-in-suspend from sdhci of rk3399-sapphire arm64: dts: rockchip: assign clock rate for ACLK_VIO on rk3399 arm64: dts: rockchip: add a standalone version of the rk3399 sapphire arm64: dts: rockchip: move rk3399-sapphire pwr_btn to daughterboard arm64: dts: rockchip: move rk3399-sapphire i2s2 to daughterboard arm64: dts: rockchip: move rk3399-sapphire sdio to excavator baseboard arm64: dts: rockchip: enable I2S codec on rk3399-puma-haikou arm64: dts: rockchip: move i2s0 node from baseboard to SoM on rk3399-puma arm64: dts: rockchip: vdd_log on rk3399-sapphire is not an i2c slave arm64: dts: rockchip: add Haikou baseboard with RK3368-uQ7 SoM arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM dt-bindings: add RK3368-uQ7 SoM and EVK base board arm64: dts: rockchip: Fix RK3328 UART DMAs arm64: dts: rockchip: enable DP for rk3399-gru arm64: dts: rockchip: add cdn-dp node for rk3399. arm64: dts: rockchip: add i2s0-2ch-bus pins on rk3399 arm64: dts: rockchip: enable tsadc on rk3399-puma arm64: dts: rockchip: add roc-rk3328-cc board arm64: dts: rockchip: Add cif test clocks for rk3399
2018-03-12arm64: dts: rockchip: assign clock rate for ACLK_VIO on rk3399Shunqian Zheng
The ACLK_VIO is a parent clock used by a several children, its suggested clock rate is 400MHz. Right now it gets 400MHz because it sources from CPLL(800M) and divides by 2 after reset. It's good not to rely on default values like this, so let's explicitly set it. NOTE: it's expected that at least one board may override cru node and set the CPLL to 1.6 GHz. On that board it will be very important to be explicit about aclk-vio being 400 MHz. Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-03-02Revert "arm64: dts: rockchip: add usb3-phy otg-port support for rk3399"Heiko Stuebner
This reverts commit c301b327aea898af558b2387252a2f5fc0117dee. While this works splendidly on rk3399-gru devices using the cros-ec extcon, other rk3399-based devices using the fusb302 or no power-delivery controller at all don't probe at all anymore, as the typec-phy currently always expects the extcon to be available and therefore defers probing indefinitly on these. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-02-14arm64: dts: rockchip: add cdn-dp node for rk3399.Chris Zhong
Add a node for the cdn DP controller which is embedded in the rk3399 SoC. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> [fixed whitespaces instead of tabs, dropped unnecessary address+size-cells and fixed the number of interrupt cells] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-02-12arm64: dts: rockchip: add i2s0-2ch-bus pins on rk3399Klaus Goger
Add pin definition for I2S0 if used as a 2-channel only bus. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-02-12arm64: dts: rockchip: Add cif test clocks for rk3399Shunqian Zheng
There are three pins can act as cif test clock for rk3399. They're sourced from 24M and output 24M by default and some boards may use them as camera 24M xvclk. Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-02-12arm64: dts: rockchip: introduce pclk_vio_grf in rk3399-eDP device nodeYakir Yang
The pclk_vio_grf supply power for VIO GRF IOs, if it is disabled, driver would failed to operate the VIO GRF registers. The clock is optional but one of the side effects of don't have this clk is that the Samsung Chromebook Plus fails to recover display after a suspend/resume with following errors: rockchip-dp ff970000.edp: Input stream clock not detected. rockchip-dp ff970000.edp: Timeout of video streamclk ok rockchip-dp ff970000.edp: unable to config video Signed-off-by: Yakir Yang <ykk@rock-chips.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> [this should also fix display failures when building rockchip-drm as module] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-12-16arm64: dts: rockchip: add usb3-phy otg-port support for rk3399Enric Balletbo i Serra
Add the usb3 phyter for the USB3.0 OTG controller. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-12-16arm64: dts: rockchip: add reset property for dwc3 controllers on rk3399Enric Balletbo i Serra
After commit '06c47e6286d usb: dwc3: of-simple: Add support to get resets for the device' you can add the reset property to the dwc3 node, the reset is required for the controller to work properly, otherwise bind / unbind stress testing of the USB controller on rk3399 we'd often end up with lots of failures that looked like this: phy phy-ff800000.phy.9: phy poweron failed --> -110 dwc3 fe900000.dwc3: failed to initialize core dwc3: probe of fe900000.dwc3 failed with error -110 Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-12-16arm64: dts: rockchip: add the aclk_usb3 clocks for USB3 on rk3399Enric Balletbo i Serra
The aclk_usb3 must be enabled to support USB3 for rk3399. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-12-16arm64: dts: rockchip: add pd_usb3 power-domain node for rk3399Enric Balletbo i Serra
Add the usb3 power-domain, its qos area and assign it to the usb device node. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-12-04arm64: dts: rockchip: update mipi cells for RK3399Nickey Yang
We might include additional ports in derivative device trees, so the 'port' node should have an address, and the parent 'ports' node needs /#{addres,size}-cells. Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-12-04arm64: dts: rockchip: add mipi_dsi1 support for rk3399Nickey Yang
This patch adds the information for the secondary MIPI DSI controller, e.g., interrupts, grf, clocks, ports and so on. Mirrors the existing definition for dsi0. Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-12-04arm64: dts: rockchip: add rk3399 DSI0 resetBrian Norris
We've documented this one already, but we didn't add it to the DTSI yet. Suggested-by: Nickey Yang <nickey.yang@rock-chips.com> Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-11-07Merge tag 'v4.15-rockchip-dts64-2' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts64 updates for 4.15 part2" from Heiko Stübner: Support for the RGA (raster graphics accelerator) on rk3399 and efuses on rk3368. * tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: add efuse for RK3368 SoCs arm64: dts: rockchip: add RGA device node for RK3399 clk: rockchip: add more rk3188 graphics clock ids clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs
2017-10-20Merge tag 'v4.15-rockchip-dts64-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc Pull "Rockchip dts64 updates for 4.15 part1" from Heiko Stübner: The biggest step forward is probably the enablement of display support on the rk3399-firefly, which got its default serial set as well and got cec support as well. Gru boards got their touchpad support refined to actually mark the button correctly and also git their rt5514 dsp added. And finally the rk3328 eval board got its cpu regulator and mmc nodes. * tag 'v4.15-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: enable cec pin for rk3399 firefly arm64: dts: rockchip: add the cec clk for dw-mipi-hdmi on rk3399 arm64: dts: rockchip: default serial for Firefly-RK3399 arm64: dts: rockchip: enable touchpad button for rk3399-gru-kevin arm64: dts: rockchip: enable display subsystem on rk3399-firefly arm64: dts: rockchip: Add rt5514 dsp for rk3399 gru arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board
2017-10-17arm64: dts: rockchip: add RGA device node for RK3399Jacob Chen
This patch add the RGA dt config of RK3399 SoC. Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-15arm64: dts: rockchip: add the cec clk for dw-mipi-hdmi on rk3399Pierre-Hugues Husson
Add the HDMI CEC controller main clock coming from the CRU. Signed-off-by: Pierre-Hugues Husson <phh@phh.me> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-09-26arm64: dts: rockchip: add the grf clk for dw-mipi-dsi on rk3399Nickey Yang
The clk of grf must be enabled before writing grf register for rk3399. Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> [the grf clock is already part of the binding since march 2017] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-09-19arm64: dts: rockchip: Correct MIPI DPHY PLL clock on rk3399Nickey Yang
There is a further gate in between the mipidphy reference clock and the actual ref-clock input to the dsi host, making the clock hirarchy look like clk_24m --> Gate11[14] --> clk_mipidphy_ref --> Gate21[0] --> clk_dphy_pll Fix the clock reference so that the whole clock subtree gets enabled when the dsi host needs it. Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> [amended commit message] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-23 13:54:22 +0000