Age | Commit message (Collapse) | Author |
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* changes:
tegra: Hooked pm_power_off callback to the Board adaptation.
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* changes:
tegra: Added low voltage USB PHy clock configuration.
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When the systemn is powered off, pm_power_off callback is called which
sets the voltage rail corresponding to the GUID NV_VDD_SoC_ODM_ID to Off.
So, to use the power off feature, implement the NV_VDD_SoC_ODM_ID GUID to power
rail mapping and PMU odm adaptation to turn off that rail.
Change-Id: I4c439325cd14bb848f100b3e7ddc029a20cd0c9d
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* changes:
tegra2 rtc: date/time non-persistent on boards
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* changes:
tegra: Update the UART Tx data path and added new system DMA API.
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* changes:
tegra: Bluetooth reset pulse width is not long enough.
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Fixed 2 issues in the rfkill driver for bluetooth.
- Code assumed that the GPIO is the power pin, when it is infact a reset pin
Fixed by renaming the variable.
- Length of the reset pulse was not long enough and didn't met the spec.
Added a 5 msec sleep to meet the CSR spec.
Change-Id: I592d4cd0b5addad357c38af72f5a96ed1f0e8bc3
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-Using workqueues instead of tasklets for Tx DMA.
-Waiting for the FIFO to drain after the DMA is done, as it is apparently
needed by the HW.
- Added new DMA API to check if the req is already queued. Using
tegra_dma_is_empty might not be correct as one DMA chanel can be serviced
by multiple clients.
With this change, i can browse the BT sometimes. It takes some retires to
enable the BT.
Also during the operation of the BT, i still see the messages like
"out-of-order packet arrived"
Don't know if this is an issue with ther UART or the BT protocol.
Change-Id: I1502ad8178c3c95b4128c564c9f3c1d957195d46
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This API is used by the PCI subsystem to get the IRQ value to be used by the
devices attached to AP20.
Change-Id: I23d0020fd31673fce4a264454d88dd6e1de57634
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Added low voltage USB PHy clock configuration mechanism.
This is a pre-requisite to enable core voltage scaling (bug 583297).
Change-Id: Iee701f8eb4d3b232a5ecde527690b3976d824153
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* changes:
tegra: DMA driver and tegra serial driver updates.
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* changes:
tegra power: Save/Restore the r1 register across save_local_timer call.
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DMA changes:
- Channel lock should be taken in the ISR for making the DMA driver SMP safe.
- In continous DMA mode,WCOUNT is the count of the half buffer not the full
buffer. So, when updating the bytes received member of the req structure,
received count should be accounted for appropriately.
- Implemented the tegra_dma_flush() API. This API stops the DMA, resets the
transfer status of the req in the head of the queue and reloads the req into
the hardware if pending.
- Added "threshold" callback. This is called when the buffer reaches the
threshold. This is now aviable only for continous mode.
Serial driver updates:
- Simplifed the ISR handling in case of the DMA mode.
- Using RTS to enable the flow control when dequeing and enqueing the DMA
buffers. This will make sure that the sender will be flow controlled. This
is still not working properly.
- Added flush buffer call back - Called by serial core when the tx buffer is
reset.
- Fixed the locking at a couple of places, like ISR and shutdown callback.
With these changes, i could able to use the BT sometimes. Sometimes i got
parity errors.
When I swtiched the Tx to PIO mode, BT worked fine. This can be done by
changing the tx_force_pio global variable to 1.
Change-Id: I4f738faac2fdb14622257878ef08db5397eebf8a
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* changes:
Enabling the USB OTG on whistler for USB1 port.
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* changes:
tegra: PCIe driver bug fix.
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Bug 629098 USB OTG problem
Tested on Whistler-USB1 port.
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On certain embedded devices, leaving the card clock enabled on
SD memory devices with no active transactions can increase
power consumption. Enable this option to automatically disable
the card clock after a transfer completes.
Change-Id: I6da3388c1528bf1334c3534b7251a526812199f1
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Assert to make sure that we are only programming the
STD PCI resources was inverted.
If I had tested a device which had 64-bit addressing like nvidia GPUs
I would have caught this.
Change-Id: I0bbbc159749525f22057b3195a2e6cc1cdd85c38
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The r1 register is expected to have a valid value after the save_local_timer call.
Save/Restore this value across the function call to ensure this.
Change-Id: I510e40be5bed3a954e0f829bce1af77fe8507600
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* changes:
tegra power: Add Warmboot boot arg to the kernel
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The new NvBootArg_Warmboot argument allows the bootloader to pass
a memory region containing the warm bootloader to the kernel.
Change-Id: Ib8c2a45c64ae9e61240152e91c5cbcff421ada21
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* changes:
TEGRA - Adding USB OTG feature
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* changes:
Revert "tegra: Fix I2C platform data pinmux initialization."
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Added support for PCIe power gating in Rm.
Added call to NvRmPowerVoltageControl to enable the voltage. If there are
not PCIe devices found, PCIe partition is power gated.
Bug 627128
Change-Id: Ic9526261435a15d6bb27ed2cb6622098ef55be3a
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Enabling support for the OTG in NVIDIA Tegra SoCs by providing simple
transceiver interface for detecting the Host or Device based on the
USBID and VBUS sensors.
Bug 629098 USB OTG problem
Tested on Whistler with Android
USB OTG is tested on whistler USB port1, by setting the USB mode type
as "NvOdmUsbModeType_OTG" in the ODM usb property of
arch/arm/mach-tegra/odm_kit/query/whistler/nvodm_query.c
Tested OTG-HOST by connecting USB keyboard and OTG-device by connecting adb.
Change-Id: I860e1f4be5f7c96765c2ce1ca320fdf212164811
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Reverting commit 205adcf549b341ab10a271835ee07ed96c44f751.
platfrom data pinmux is only valid for the multiplexed configurations.
For non-multiplexed configuration, the vlaue should be 0.
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* changes:
Tegra: PCIe driver updates.
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Platform data was passing "0" as the pinmux config for all
non-multiplexed configurations. It should use the value from the
ODM query intead.
BUG 626459
Change-Id: I4278f353e7adbf5d82a32ff613409f54a2203738
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- Updated the harmony defconfig to enable PCI by default.
- Enabled SATA and serial PCIe client drivers.
- Disabled the PCIe power rails when there are not PCIe devices attached to
the controller during boot.
Bug 627128
Tested with and without the SATA controller attached.
Change-Id: Ibbcdba909c281e40c4e0fadbca8f0f9c05f6662b
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* changes:
tegra ODM: Enabled EMC DFS on Harmony platform.
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* changes:
tegra nvos: return interrupted semaphores to user-land
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split the nvos interrupt implementation into 2 parts: one which returns
an error code when the thread is awakened due to a pending signal, and
one which loops in the kernel until the semaphore operation completes.
the user-land stub needs to immediately return control to the application
in the event of a pending signal, to ensure that the signal is dealt
with before re-attempting to wait on the semaphore.
bug: 642544
Change-Id: I0b233c9483d67cc6d25285d0dc3eddafa8502500
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* changes:
Tegra: Disable PCIe power rails when CONFIG_TEGRA_PCI is not enabled.
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* changes:
tegra rm PWM: Fix pwm frequency factor between output and input source to get PWM frequency output more accurate
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Added the new product id in the usb id table, for PANJIT touch screen to work.
Enabled the PANJIT touch screen in the harmony config file.
Change-Id: I9914622fb4fe697f2cb7ede0d033aa46578c7d4b
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to get PWM frequency output more accurate
Change-Id: If8b3f741ed001dd93e9bfbbb012bc50f43963e3f
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* changes:
Oprofile: Force timer sampling for Android/ARMv7 combo
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Change arm oprofile init return immediately with ENODEV when
configured for android and ARMv7. Failed init will cause
oprofile to take the default route of using timer-based sampling.
Without error return, oprofile will report "arm/a8" processor, which
seems to be completely unknown for oprofile daemon and host tools, and
oprofiler will not work.
For bug 640638
Change-Id: I59d7e2a417143d2093d86c29734e677fb546945d
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* changes:
tegra RM: add nvmem= command-line parsing for carveout aperture(s)
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* changes:
tegra ec battery: Reporting AC line and Battery flag for R01 Firmware
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the bootloader may place carveout in a location that is not exactly at
the top of physical memory (if, for example, the bootloader does not
support mapping all the way to the top of memory), and the existing code
in the RM initialization did not allow for this (or for multiple carveout
apertures).
add a new command-line parameter (nvmem=) to position the carveout aperture
arbitrarily in the physical address space.
Change-Id: Ib750c4c038916a21b9fece490efbe6c953da09de
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Change-Id: Ief861c355d73cfc1edc80b085ac9aecff1fb1a15
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Changes are as follows:
1) TPS6586x PMU RTC(harmony) cannot store more than 34 years duration. Hence,
RTC driver has been modified to use year 2009 as reference instead of
the year 1970(used in linux by default). Change in tps6586x rtc
implementation.
Issue was Fixed in Bug 621031 earlier and checked into p4 by modifying
tegra rtc driver. We are using a different approach now by only
modifying tps6586x rtc driver. This way rtc drivers for other PMU
like max8907b which can store as much 9999 years in RTC do not need
to change.
2) MAX8907B PMU RTC(whistler) driver was not storing day/month/year data
earlier. Further, on every boot the RTC was being cleared. Fixed this
in file max8907b_rtc.c
Implementation specific to linux as uses library functions: mktime and
rtc_time_to_tm
3) MAX8907B PMU I2C read API implementation was not reading 4th byte. Changed
this as DD, MM, YY1, YY2 information is being read now. Changed max8907b_i2c.c
Bug 625990 : [Firefly2/Harmony] Date & Time is not persisting after reboot
Tested on : Harmony + whistler. Date/time persists.
Note: Whistler rechargable battery needs to be charged to 2.4V for
RTC data to persist. Harmony has non-rechargable battery.
Change-Id: I07377e14c03dc7a9240190253885541be7f9a7d1
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Android expects to use control groups for managing processor time, and
init reports errors when it fails to open the control group file
Change-Id: I6b39bba140c8a9559f629b8248a7a4c48bacf4ea
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Change-Id: I2c67820e78bffe3139c940654e28eaa203a734b7
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* changes:
tegra usb_uvc v4l2 : Enabling Config variables for v4l2 and uvc
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* changes:
tegra spi: Removing the unused api for multipletransfer
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Enable it otherwise.
bug 636751
Change-Id: I782bff145315a511aa306fe572faf3d292b6dd36
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* changes:
tegra power: registering suspend/resume operations with kernel
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* changes:
tegra RM: Fix PWM scaling calculation in RM for backlight intensity.
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