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2010-04-02ARM/tegra: delete SDIO DDK and DDK-based MMC host drivertegra-9.12.9Gary King
Change-Id: I30872e9905b7bdf1cca56e53089e5cfde7586798 Reviewed-on: http://git-master/r/1026 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-04-01tegra mmc: enable MMC_UNSAFE_RESUME config for tegra_whistler_gnu_linuxDeepesh Gujarathi
Normally, when the system goes into suspend, all the storage cards are removed and later re-enumerated upon resume. During re-enumeration the device name and number are not guaranteed to be the same as they were during bootup. This can cause issues if rootfs falls on one such device. When the MMC_UNSAFE_RESUME config is enabled, it will prevent kernel from unmounting the mmc cards before suspend. Upon resume the cards will still be using the same device id as they were before suspend. Change-Id: Ibc1511c5feb0391dc644df2d710e386ec0d353ce Reviewed-on: http://git-master/r/994 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-04-01tegra RM: Updated VDE clock configuration policy.Alex Frid
Updated VDE clock configuration policy - allowed to use high frequency PLLC for VDE targets within 100MHz-200MHz range. This range was covered by low frequency PLLP0, but better divider granularity achieved with PLLC results in lower voltage requirements. Change-Id: I922dbd8db19dc19339db5bfbf2651604e28e789d Reviewed-on: http://git-master/r/1007 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Sharad Ranjan <shranjan@nvidia.com> Tested-by: Sharad Ranjan <shranjan@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-04-01tegra pcie: add the VDD_1V5 power rail to the pcie guidDeepesh Gujarathi
As per the harmony power tree VDDIO_PEX_CLK is the T20's 3.3V PCIe supply. It is sourced from LDO0 of the PMU. By default, LDO0 is off. VDD_1V5 is the 1.5V supply for the PCI Express Mini Card connectors. It turns on automatically in tandem with the general-purpose 3.3V domain. If there are no active pcie devices on the bus turn off the VDD_1V5 power rail. Change-Id: I518368937aa36e7c73fbb93c28a39706903a614d Reviewed-on: http://git-master/r/1019 Reviewed-by: Kenneth A Radtke <kradtke@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-04-01tegra ODM: Changing pinmux configuration for UART-A when ULPI is used.Steve Lin
This fix corrects the pinmux configuration so UART-A is mapped to SDIO1 pins when ULPI is used. AP will be able to communicate with the ULPI modem through both UART and ULPI. Change-Id: I268a76496bd5371c2b757b0133eb0f276234504f Reviewed-on: http://git-master/r/1005 Tested-by: Szming Lin <stlin@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-04-01tegra usb: USB Host devices are not working on Whistlersgadagottu
With CL#5705540 USB host functionality on OTG port has broken on Whistler.Also Device dis-connection and connection on root port(USB3),makes host functionality broken. So this needs to debugged further. However for Harmony both USB1 device and USB3 integrated hub are working fine with-out any issue. So reverting the change for Whistler configuration only. Bug 669288 :[AP20/Android/Whistler]: USB devices not working. Tested on : Whistler and Harmony Tested for USB host functionality on OTG port Tested for USB host functionality on USB3 with multiple connection/dis-conenction. Change-Id: Id1c2157d796e095ff66e5002b5d00958a89a7bf7 Reviewed-on: http://git-master/r/1008 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Gary King <gking@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-04-01tegra: Fixed error module bond-out index calculationScott Williams
Fixed an incorrect calculation for skipping to the next byte of bond-out information. Bailing out of a byte early would result in an incorrect offset being used for subsequent module ids resulting in incorrect modules being marked as bonded out. Change-Id: Ia5cb449006c2d3b825097c852c21f4e1346e6696 Reviewed-on: http://git-master/r/1024 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-31ARM/tegra: add missing copyright attribution to cpuidle driverGary King
Change-Id: I1db2c4cba29e0d4c34cc7d34c4a1be0cfb13caa5 Reviewed-on: http://git-master/r/1002 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-31tegra RM: Moved AVP and EMC low corners.Alex Frid
Moved AVP low corner to 36MHz (from 24MHz) and EMC low corner for LPDDR2 platforms to 18MHz (from 50MHz), as determined by audio use case testing. Increased low corner detection hysteresis for CPU to 4MHz (from 1MHz), and removed half of activity margin from low corner hit requirements in case when no starvation/busy hints are present. Change-Id: Ia3ccbaefb542066a20a1ac238e88026655c76223 Reviewed-on: http://git-master/r/985 Reviewed-by: Niranjan Wartikar <nwartikar@nvidia.com> Tested-by: Niranjan Wartikar <nwartikar@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-31tegra: implement cpuidle device supportGary King
add LP2 (CPU power-gated) and LP3 (CPU flow-controlled) idle states for Tegra 2 CPUs through the kernel cpuidle interface exit latency for LP2 mode is a very rough approximation; the actual latency is dependend on the CPU frequency Change-Id: I115a3be6a065bcdad4149ce90cf4139b42062a43 Reviewed-on: http://git-master/r/951 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-30tegra mmc: enable MMC_UNSAFE_RESUME config for tegra_whistler_androidDeepesh Gujarathi
Normally, when the system goes into suspend, all the storage cards are removed and later re-enumerated upon resume. During re-enumeration the device name and number are not guaranteed to be the same as they were during bootup. This can cause issues if rootfs falls on one such device. When the MMC_UNSAFE_RESUME config is enabled, it will prevent kernel from unmounting the mmc cards before suspend. Upon resume the cards will still be using the same device id as they were before suspend. Change-Id: I2821b20bbd3ecb753bdc8c90297e41c396c66364 Reviewed-on: http://git-master/r/988 Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-30tegra pm: use blocking sysfs reads to notify nvrm_daemonKaz Fukuoka
bug 642072: Power Aware NvRM Daemon Use blocking sysfs reads to notify from pm_notifier (kernel) to nvrm_daemon (userspace). Change-Id: I9119733994613ac38c547ec7808c6afc811a25c2 Reviewed-on: http://git-master/r/984 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-30tegra-nvec: Report keystroke for the key that is used to wake up.Bharat Nihalani
With this change, display comes up with a single key press; but the catch is that it only works with "Windows" and "F3" keys. This limitation is posed by Android and not EC. NOTE that for other than "Windows" and "F3" key presses, the system does wake up, but an additional "Windows"/"F3" key press is still required to get the display up. Also, explicitly letting EC know that it should allow any keyboard/mouse event for wake-up. This is the default behavior, but still wanted to explicitly specify. Change-Id: I2a1e7d90fbbfd810f2334ee3832e193bfb5e45b1 Reviewed-on: http://git-master/r/986 Reviewed-by: Sachin Nikam <snikam@nvidia.com> Tested-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-29tegra odm: added IFF modem specific details to the odm kitSheshu Shenoy
Change-Id: Ie798a5dac7b450fd987f90d839549015c24ba2ce Reviewed-on: http://git-master/r/875 Tested-by: Sheshagiri Shenoy <sshenoy@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Michael Hsu <mhsu@nvidia.com> Tested-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-29ARM: enable CONFIG_CPU_IDLE supportGary King
add ARCH_HAS_CPU_IDLE_WAIT and ARCH_HAS_DEFAULT_IDLE configuration, and expose default_idle and cpu_idle_wait cpu_idle_wait implementation based on the implementation in the x86 tree Change-Id: Ie24b6336db833cc638868abfdba822889646d0a8 Reviewed-on: http://git-master/r/950 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-29tegra RM: Updated graphics clock control.Alex Frid
Updated graphics clock control: added 2D/EPP frequency scaling following EMC clock, and reduced Host1x clock to 108 MHz to make sure it can be run at low voltage always (per previous evaluation Host1x at 83MHz works well with 240MHz cap on modules behind Host, hence 108MHz setting with current 300 MHz module cap). Change-Id: I9d5d89b38f08b99a805ad22459a84cb580dce05c Reviewed-on: http://git-master/r/981 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-29nvec_battery:registering battery as wakeup source and battery events.Sachin Nikam
1. Making Battery and AC present as a wakeup source 2. Registering battery events:present, charging, remaining capacity 3. Handling battery odm flags and events in nvec_battery.c Change-Id: I814960ab5f065e6aaad72ea1c403ad9c8d6a1af8 Reviewed-on: http://git-master/r/907 Reviewed-by: Sachin Nikam <snikam@nvidia.com> Tested-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-26tegra power: Clean up LP0 code and shuffle around scratch regs.tkasivajhula
The scratch registers had to be shuffled around a bit to match the bootrom's scratch map. Change-Id: Iddcefbd23fdaccb2215b70bc5f188fadaf8ec194 Reviewed-on: http://git-master/r/918 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-26tegra : Using the correct check to find out E1108 boardsgadagottu
Currenttly to check the board type E1108 in nvodm_query.c, function NvOdmIsE1108Hynix() is used. That is EMC DFS specific, so it is replaced with the generic check "NvOdmPeripheralGetBoardInfo(BOARD_ID_WHISTLER_E1108, &BoardInfo)". Bug 666427 : [whistler/android/power] - suspend power has increased by 4mW Tested on :Whistler E1108 Change-Id: I7c8cdb9da2891d3b8ade738509024a78f6f6d38b Reviewed-on: http://git-master/r/943 Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-26arm tegra: update platsmp to follow kernel code styleGary King
squash hotplug code into platsmp file, to limit overall spaghettiness Change-Id: I6704323837ad545564a0dcfd47894835f2adeb1a Reviewed-on: http://git-master/r/948 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-26tegra RM: Fixed CPU PowerGood timer fix.Alex Frid
On platform with no PMU property CPU PowerGood timer was loaded from uninitialized stack variable, instead of default delay - fixed. Change-Id: I5c29199d40e0e39b095c72c0cb64f4ceda51013d Reviewed-on: http://git-master/r/963 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-25tegra RM: Clipped target pixel frequency to h/w maximum.Alex Frid
Clipped target pixel clock frequency to display h/w maximum, instead of asserting when target is above the limit. It would allow to complete clock configuration if low boundary of tolerance range is below maximum. Change-Id: I5167dd0d680e08dba6511a259425814e712c4b0d Reviewed-on: http://git-master/r/920 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-25tegra RM: Swapped the order LC and starvation hint are applied.Alex Frid
Swapped the order low corner (LC) limit and starvation hint are applied. After this commit, LC is applied 1st. Thus, it is guaranteed that initial starvation boost is always on top of LC (and not "under water"). Change-Id: I6bd8f2ec9f04fb51d7098a8702e4f1cf7779f4c8 Reviewed-on: http://git-master/r/935 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-25tegra RM: Re-arranged clock control locking scheme.Alex Frid
Re-arranged clock control locking scheme, so that clock configuration or control operations and voltage control operations are locked sequentially (was nested). The former operation is guarded by the spin-lock, the latter - by the scheduler mutex (shared with DVFS and PMU transport). Implemented preview mode to determine in advance if core voltage should be raised before clock h/w is configured. Added pending voltage change mechanism to "bridge" the preemptive gap between preview and actual h/w configuration. Exceptions from the above scheme are clocks that share PLL h/w resources with DVFS (not just voltage control): Display/DSI and VDE. For these clocks old nesting scheme is used. This commit minimized calls to the scheduler from clock control/configuration APIs; addressed bug 650476 and bug 656965 Change-Id: I5b758af0badc75c1bd05d360702d13289cfcef5d Reviewed-on: http://git-master/r/953 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-25tegra usb: Enabling autosupend/selective suspend for USB host.sgadagottu
Enabling USB port suspend, when they is no activity happening on the on port. Example: For an usb port, when a USB hub is conneted without any devices on down stream, then hub upstream port can be suspended until device(s) connected on down stream to hub. We enabled this feature for whistler and harmony by enabling config paramater CONFIG_USB_SUSPEND. Bug XXXXXX : Enabling auto suspend for USB host Tested on : Harmony and Whistler E1108 Tested on Harmony by conneting 7 port hub to port2 of SMSC LAN hub Tested on Whistler by connecting 7 port hub on USB3. Change-Id: Icaf7648c5014161f6652cbb8c3347732b4651d8c Reviewed-on: http://git-master/r/946 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-24ARM tegra: Wake source list correctionNarendra Damahe
Change-Id: I6d5beb3962de5bef1109f4c8d57c7c8a0f5f98fb Reviewed-on: http://git-master/r/952 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com>
2010-03-24tegra: implement native timer supportGary King
replace the existing timer code with a kernel-style implementation reset the lp2 spare trigger to 0 following an lp2 wakeup, to prevent a spurious interrupt from triggering if the wakeup source was not the lp2 timer. Change-Id: I4af642b15f024e43cf88f19751bdaad5279ebd9b Reviewed-on: http://git-master/r/936 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-24tegra odm: Enable USB OTG based on the configVenkat Moganty
Since CONFIG_TEGRA_OTG is not defined in the whistler linux def config file OTG driver is not getting loaded and causing the USB core to malfunction. This is fixed by enabling the usb odm property mode as OTG only based on the CONFIG_TEGRA_OTG. If OTG is not enabled then USB1 port behaves as device by default. Bug 664864:[Mobile LDK\LP1] unable to run LP1 Tested on ap20/whistler/android Change-Id: I0e97596b1341a82652b57afb003c715dd0b7724b Reviewed-on: http://git-master/r/944 Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-23input: add keyboard controller support for tegraGary King
implement a keyboard input driver for tegra's internal matrix keyboard controller (16x8 support on Tegra 2 class processors). supports * power management * limit wakeup to a subset of keys * platform-defined remapping of key to keycode * platform-defined pin configuration add support for converting tegra ODM kit APIs to kbc platform data, so existing clients will continue to function Change-Id: If1496e7ada4f6f18a3e98a15ebc5f925f254bf65 Reviewed-on: http://git-master/r/933 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Gary King <gking@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-23tegra harmony: fix ODM kit issues with internal keyboardGary King
fix broken build of nvodm_kbc.c caused by path changes during initial p4 to git merge keyboard should be a wake event when the KEYBOARD_TEGRA driver is compiled into the kernel reduce the repeat and debouce times; the keyboard was nearly unusable with a repeat ping time of 100ms fix the row and column numbers for the select wakeup keys: the values need to be absolute row & column offsets, not the harmony-local GPIO enumerants (in which columns have numbers above rows), and the values previously defined ([0,0] and [1,1]) aren't actually keys on the satellite keyboard; change the values to the ESC and Windows keys. Change-Id: I50bca7eee5c9101163b01e08457606cb4a5f32de Reviewed-on: http://git-master/r/932 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-23ARM tegra: clean up interrupt handlingGary King
reimplement interrupt controllers following the kernel coding conventions propogate set_irq_wake signal from gpio chip to the primary chip use IRQ_WAKEUP status to control masking and unmasking of interrupts when entering low-power modes; non-wakeup interrupts are disabled using with disable_irq, and are re-enabled after wakeup with enable_irq ODM kit wakeup pads are configured with enable_irq_wake during the board initialization move context save & restore for the GPIO and interrupt controllers out of power-context-t2.c and into their respective drivers; no distinction is made between LP0 and LP1 context currently; if there is enough of a performance difference to warrant reintroducing it, this can be done at a later time. delete now-deprecated NVIDIA GPIO IRQ code bug 656008 Change-Id: I68f98f2442c50a93a7ad9cdfef87b630e8c132a9 Reviewed-on: http://git-master/r/931 Tested-by: Gary King <gking@nvidia.com> Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-22tegra ODM: Maxim PMU PWREN control on Whistler.Alex Frid
Added mechanism to reconfigure Maxim PMU power enable (PWREN) input on Whistler necessary for LP0 core voltage control. Change-Id: If7ee20956b39a96093da4094eda9ab64bce54503 Reviewed-on: http://git-master/r/923 Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-22tegra fb: Cleanup partially removed fb disable code.Venkata(Muni) Anda
An ioctl to disable fb used to exist and called from the nvrm daemon code. This was partially removed sometime back and there are still traces of that code causing some confusion which is cleaned up by this commit. ioctl define is left as-is so maintain compatibility to user mode code. Change-Id: I3f792d6be075a8754ea448d588e484afc67bd8ba Reviewed-on: http://git-master/r/878 Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Tested-by: Venkata (Muni) Anda <vanda@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-21tegra usb: Switching of USB busy hints, when no active USB tranferstegra-9.12.8sgadagottu
are happening though a device connection on host port. Currently for harmony, an intergrated SMSC hub present on USB3. Because of this device connection is present on USB3 and USB power busy hints are always on. To avoid this, for host by default busy hints are off and USB busy hints will be on for : 1.Bulk and isochronus transfers 2.Interrupts transfers with buffer length >= 256. Busy hint will be on for pre-defined amount of time and after that busy hints will be off automatically. With this in idle state power is reduced. Tested on : Harmony Enumeartion is happening fine. LAN and USB HID devices are working fine Change-Id: Ifd653bebfb52c7702f7d24bf11ccf93e62ea0f66 Reviewed-on: http://git-master/r/915 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-19Tegra gpio: Wrapping up nvrm gpio to native gpio.Laxman Dewangan
NvRm Gpio driver will be wrapper on the native gpio driver such that it will provide the same existing api and implementation will be use the native gpio driver. In this approach, it does not need to change the existing gpio client driver. Tested on whistler with sdcard insert/remove, touch panel and scroll wheel. Tested on harmony with the suspend/resume. Change-Id: I2fa98f8f62a111a1463c1e5b1034e145eaae42a3 Reviewed-on: http://git-master/r/851 Tested-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-19tegra pm: power aware nvrm_daemon kernel sideKaz Fukuoka
- Remove using signal. - fix bug 664864: unable to run LP1 - see also bug 642072: Power Aware NvRM Daemon Change-Id: I952b8aa0aa4ea0c4c289fa1d20fc0bae3a98cac7 Reviewed-on: http://git-master/r/914 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>
2010-03-19tegra RM: Separated EMC scaling floors per SDRAM type.Alex Frid
Separated EMC frequency low corners for LPDDR2 and DDR2. For now, kept both limits the same as common floor before (50MHz). Change-Id: Ieaa238f78ceb5a7f4f238ffe78c576bb7d5840b1 Reviewed-on: http://git-master/r/906 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-19tegra usb:Enable host based on the odm usb propertyVenkat Moganty
USB host is getting enabled when the odm usb property is set to None. During the system initialization host enable condition was not checked properly when Odm USB mode property is set to "NvOdmUsbModeType_None". Due to the wrong condition, host controller is turned on and consuming the power. Bug 665409: [whistler/android/power] - USB power consumption has increased Tested on AP20 whistler Change-Id: I47622e1da6ca2c9edd107df9b5e6de3953260f5c Reviewed-on: http://git-master/r/908 Tested-by: Dara Ramesh <dramesh@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-17tegra usb: Device hangs after connecting devices to USB3sgadagottu
AP20 pop chip is not having USB3 ID pin. Currently both pop and non-pop whistler are using same odm query with Idpin type as "Cable Id". Since, it is not reflecting correct Id pin type for pop, causing the issue. With this change based on the board type, proper id pin type is returned as part of usb odm query for USB3. Without ID pin dynamic detection of devices is not possible, so host functionality is disabled for USB3 on pop boards. With this change USB3 host is working for non-pop modules and no hang is seen with pop modules. Bug 655520 : [AP20/Android/Whistler]: Device hangs after connecting USB devices(mouse/keyboard). Tested on : whistler E1109 and whistlerE1008 Change-Id: I5cd67c54756666e58cbc778da2b1015df27c14c6 Reviewed-on: http://git-master/r/795 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-17tegra regulator: Enable regulator for USB chargingVenkat Moganty
Enabling CONFIG_REGULATOR_TEGRA on whistler for USB charging support. Bug 631316 USB charging support in Android Tested on: whistler/Android Change-Id: If13169d7bb7321cf1b2806c80966e1050e39fed0 Reviewed-on: http://git-master/r/840 Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Tested-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-16tegra RM: Stabilized local timers input frequency.Alex Frid
Utilized local timers prescaler to keep input frequency at calibration (boot) level while CPU clock is scaled by DVFS. The local timer tick is lowered to 2.0MHz/1.5MHz on T20/AP20 (was 250MHz/187.5MHz respectively). Still it is better than 1MHz used as a base for jiffies counting. The LP2 dead time is not compensated by this commit, nevertheless it should address bug 660382 (no LP2 during video playback). Change-Id: I9fd0e1238afa4cf1b44339bf30c37a2a84e97ae9 Reviewed-on: http://git-master/r/865 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-16tegra power: implement early_suspend handler for display powerAntti Hatala
For proper power behavior Android expects the display to be turned off and on in the early_suspend stages instead of as a part of the actual suspend sequence. Add notifications for display on/off in the nvrm power notification interface, and call them at appropriate times. When CONFIG_HAS_EARLYSUSPEND is not defined, continue to notify nvrm_daemon in the power manager suspend/resume calls. Tabify & whitespace cleanup nvrm_user.c. Change-Id: Ie0129e0a5812352e97c95c4f323928d907782dee Reviewed-on: http://git-master/r/866 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-12gpio: using proper API for getting the irq dataLaxman Dewangan
To get the ird data for the gpio pin irq, it should use the get_irq_chip_data() in place of get_irq_data(). This is because at the time of registration, the irq data is added as the chip irq data. Tested on whistler. Change-Id: Ic80d0f05fa5490ee2ca876a750daa27135e681c9 Reviewed-on: http://git-master/r/849 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-12tegra clock: Cleanup of reset codeVenkat Moganty
Removed the code that brings all controllers out of reset. Change-Id: I1c4934bd5ff08f305806c6bfc74fddb9f6d6da6a Reviewed-on: http://git-master/r/835 Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Tested-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-12tegra power: simplify lp2, enable for non-wakelock buildsGary King
since the target lp2 time is being computed directly from the OS timer list, it can be used computed immediately prior to entering lp2. previously, it was computed by a previous invocation of the idle loop and stored in a static variable; which was clearly wrong since, after the calculation, the idle loop would wfi. move all of the lp2 logic out of the CONFIG_WAKELOCK block; the only information wakelocks provide is an additional hint as to whether or not entering lp2 is allowed, so this can be checked at the top of the idle loop and non-wakelock dependent code can handle the actual entry into LP2. partial fix for bug 660382 Change-Id: I397c8dbc946cb3495e9b9b247d11eae782503623 Reviewed-on: http://git-master/r/846 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-11tegra touch: enable multi-touchVarun Wadekar
adding multi-touch support to the touch screen driver. Tested with Gallery3D, Multitouch Visualizer and Multitouch Visualise test apps. Fod Bug 653317 Change-Id: I2976ab91c06a54de4772d88c3d96d72a753205ed Reviewed-on: http://git-master/r/834 Tested-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Harry Hong <hhong@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-11serial: delete tegra DDK serial driverGary King
this driver is no longer being used, and its continued existence just causes confusion. Change-Id: Ia5b4a350b6590bbd0e8914625e9e81951096fb8c Reviewed-on: http://git-master/r/843 Reviewed-by: John Davis <jodavis@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-11tegra: Tristating the unsed pin groups in VDDIO_NAND rail.Suresh Mangipudi
The power numbers were high on the VDDIO_NAND rail, when the Nand module was not present in EMMC boot. Doing a Pullup of the unused pin groups and tristating the pad groups in the VDDIO_NAND rail, brings down the power from 9mW to 2mW. Bug 630271 Tested Nand and EMMC boot up on whistler. Change-Id: I98ac3c0ae237093b0f17552799e0beb956c735e9 Reviewed-on: http://git-master/r/822 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
2010-03-11Export NvULowestBitSet and NvOsGetProcessInfo.Acorn Pooley
pre-existing NvULowestBitSet must be exported for upcoming channel-in-kernel change NvOsGetProcessInfo is useful for debugging. Implemented and exported. Change-Id: I9265626bc4496589a71c6b3517af44d8571a2c2e Reviewed-on: http://git-master/r/828 Reviewed-by: Acorn Pooley <apooley@nvidia.com> Tested-by: Acorn Pooley <apooley@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
2010-03-11tegra ODM: Moving the board specific USB trimmer values to odm_query.Steve Lin
The usb ddk will use these trimmer values if they are specified in the NvOdmUsbProperty. Otherwise, it will use the default values specified inside NvDDK. Bug 657479: USB trimmer values should not be hardcoded in the DDK Change-Id: Idd819dc6faba63831ba5164c6c2ebd1a99567a1c Reviewed-on: http://git-master/r/786 Tested-by: Szming Lin <stlin@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-02-02 19:19:19 +0000