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add ldo-bypass support for i.mx6sx/i.mx6ul boards, remove deprecated wdog reset
way, such as 'fsl,wdog-reset = <1>', and implement it in wdog driver.
Signed-off-by: Robin Gong <b38343@freescale.com>
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enable 'fsl,wdog_b' and move pinctrl setting from hog into watchdog driver
device node.
Signed-off-by: Robin Gong <b38343@freescale.com>
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On imx6qdl-sabresd board we use WDOG2 as WDOG_B reset source. So use WDOG2
instead of WDOG1.
Signed-off-by: Robin Gong <b38343@freescale.com>
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add ldo bypass support on i.mx6q/dl and i.mx6sl.
Signed-off-by: Robin Gong <b38343@freescale.com>
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enable PU bypass support on i.mx6 family.
Signed-off-by: Robin Gong <b38343@freescale.com>
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Add LDO enable dtb for i.MX66UL-9x9-EVK board for those customers
who want to use ldo enable mode.
Conflicts:
arch/arm/boot/dts/Makefile
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit 7e6c509e6ca1c4e83f72339f5bfb1ebb410d77ef)
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i.MX6UL-9x9-EVK board has PFUZE3000, enable LDO bypass support.
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit 5118bf0b755a0b4fbd1f2999f3aa023208c8de82)
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This patch adds suspend/resume with Mega/Fast mix off
support for i.MX6UL-9x9-LPDDR2-EVK board, LPDDR2 has
different MMDC restore flow compared to DDR3.
Conflicts:
arch/arm/mach-imx/pm-imx6.c
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit d5d3915aac04c2a80827d215d703e0f46309ed14)
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Add i.MX6UL-9x9-LPDDR2-EVK board support.
Conflicts:
arch/arm/boot/dts/Makefile
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit d68759b1d9d769c83816d327fbeb1d85762a8e79)
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On i.MX6UL, the VDD_ARM_IN and VDD_SOC_IN use the same power rail
VDD_ARM_SOC_IN. For imx6ul-14x14-lpddr2-arm2 board, default, we use
ldo-bypass mode and use the external PMIC regulator for cpufreq.so
on this board, should use the setpoint of ldo-bypass mode.
Signed-off-by: Bai Ping <b51503@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit d924e23fa60023bdbc601797ccda30c2c341a34a)
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Add dts for mx6ul-14x14-lpddr2-arm2 board.
Basic function tested: SD1/EMMC2/ENET/UART1 is ok.
This patch takes mx6ul-14x14-ddr3-arm2.dts as a reference.
Conflicts:
arch/arm/boot/dts/Makefile
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 8d10e92ed1b7d49332dec6f28c98250c28cdfa3f)
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Add hs400 support for usdhc3 and add sd3.0 support for usdhc2.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Currently we only use 'tsc' for touch screen, so here remove
the redundancy 'touchctrl'.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Add imx6ul touch screen driver support in imx_v7_defconfig
and imx_v7_mfg_defconfig
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Add usdhc1 support for SD3.0 and add usdhc3 support for HS400 mode.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
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Add IPU v4l2 output driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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- For PCIe module on i.mx7d, some GPC operations would
be mandatory required when PCIe PHY is powered on/off.
So we need update gpc driver for the new requirements.
We implement it by regulator notify framwork in gpcv2
driver.
NOTE:
make sure gpc driver is ready before PCIe driver is probed.
Otherwise, cause system hang during PCIe driver probe,
because the notify NOT installed ready and the gpc will
NOT power on PCIe.
- config the imx7d pcie
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
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enable pcie support on imx7d platforms.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
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default is 8. android require more.
Change to 16.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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arch/arm/mach-imx/built-in.o: In function `clk_pllv3_do_shared_clks':
:(.text+0xed8): undefined reference to `imx_sema4_mutex_lock'
:(.text+0xf04): undefined reference to `imx_sema4_mutex_unlock'
arch/arm/mach-imx/built-in.o: In function `clk_gate2_do_shared_clks':
:(.text+0x1208): undefined reference to `imx_sema4_mutex_lock'
:(.text+0x1234): undefined reference to `imx_sema4_mutex_unlock'
arch/arm/mach-imx/built-in.o: In function `clk_pfd_do_shared_clks':
:(.text+0x15f4): undefined reference to `imx_sema4_mutex_lock'
:(.text+0x1620): undefined reference to `imx_sema4_mutex_unlock'
arch/arm/mach-imx/built-in.o: In function `imx_amp_power_init':
:(.init.text+0x10d50): undefined reference to `imx_sema4_mutex_create'
drivers/built-in.o: In function `mxcfb_unregister':
:(.text+0x20e70): undefined reference to `ipu_free_irq'
:(.text+0x20e94): undefined reference to `ipu_free_irq'
:(.text+0x20eac): undefined reference to `ipu_free_irq'
drivers/built-in.o: In function `fbi_to_pixfmt':
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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1. Upstream 5.0.11p7 driver to kernel
2. Add the GPU configuration to imx6q.dtsi
3. Remove IRQF_DISABLED in GPU driver
The IRQF_DISABLED has been removed from 4.1.0 kernel. To accomodate with
the change, add version check logic and use 0x0 instead of IRQF_DISABLED
from 4.1.0 kernel on.
4. Convert file->f_dentry->d_inode to file_inode() in GPU driver
The file struct has changed since 3.19. Changed the usage in GPU driver
too.
5. Add version check for CONFIG_PM_RUNTIME
The CONFIG_PM_RUNTIME will never be used in 4.1.0 kernel. Add version
check to avoid calling it in GPU driver.
Signed-off-by: Shawn Xiao <b49994@freescale.com>
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We should use hwirq instead of logic number at gpc driver, otherwise,
it may override other global memory due to write out of boundary
for array, eg: below oops may kernel at imx7d sdb board during suspend/
resume test:
INFO: rcu_preempt detected stalls on CPUs/tasks:
1: (2 GPs behind) idle=b25/140000000000000/0 softirq=1951/1957 fqs=0
(detected by 0, t=2102 jiffies, g=847, c=846, q=4)
Task dump for CPU 1:
swapper/1 R running 6088 0 1 0x00000000
[<8089f4e4>] (__schedule) from [<8089f908>] (schedule+0x4c/0xa4)
[<8089f908>] (schedule) from [<80011514>] (arch_cpu_idle_dead+0x18/0x1c)
[<80011514>] (arch_cpu_idle_dead) from [<8006e3d8>] (cpu_startup_entry+0x2e0/0x450)
[<8006e3d8>] (cpu_startup_entry) from [<80017200>] (secondary_start_kernel+0x13c/0x15c)
[<80017200>] (secondary_start_kernel) from [<800095ac>] (__enable_mmu+0x0/0x14)
rcu_preempt kthread starved for 2102 jiffies!
NMI watchdog: BUG: soft lockup - CPU#0 stuck for 22s! [rtcwakeup.out:735]
Modules linked in: evbug
CPU: 0 PID: 735 Comm: rtcwakeup.out Tainted: G W 4.1.4-00701-g32bb3ba-dirty #370
Hardware name: Freescale i.MX7 Dual (Device Tree)
task: a8920a00 ti: a99bc000 task.ti: a99bc000
PC is at _raw_spin_lock+0x4c/0x60
LR is at get_parent_ip+0x14/0x30
pc : [<808a2e74>] lr : [<8005c080>] psr: 80000013
sp : a99bdcd8 ip : a99bdca8 fp : a99bdcec
r10: 80d4455c r9 : 00008070 r8 : 00000010
r7 : 00000000 r6 : 00000000 r5 : 00000001 r4 : 80e09934
r3 : 00000001 r2 : 00000000 r1 : 00000000 r0 : 00000000
Flags: Nzcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c5387d Table: a9f0006a DAC: 00000015
CPU: 0 PID: 735 Comm: rtcwakeup.out Tainted: G W 4.1.4-00701-g32bb3ba-dirty #370
Hardware name: Freescale i.MX7 Dual (Device Tree)
[<80019258>] (unwind_backtrace) from [<80014948>] (show_stack+0x20/0x24)
[<80014948>] (show_stack) from [<8089b490>] (dump_stack+0x8c/0xcc)
[<8089b490>] (dump_stack) from [<80011714>] (show_regs+0x1c/0x20)
[<80011714>] (show_regs) from [<800af83c>] (watchdog_timer_fn+0x290/0x2fc)
[<800af83c>] (watchdog_timer_fn) from [<8008c0a8>] (__run_hrtimer+0x90/0x294)
[<8008c0a8>] (__run_hrtimer) from [<8008cd94>] (hrtimer_interrupt+0x11c/0x2ac)
[<8008cd94>] (hrtimer_interrupt) from [<80618a4c>] (arch_timer_handler_phys+0x40/0x48)
[<80618a4c>] (arch_timer_handler_phys) from [<8007ca24>] (handle_percpu_devid_irq+0xac/0x1d0)
[<8007ca24>] (handle_percpu_devid_irq) from [<80078334>] (generic_handle_irq+0x3c/0x4c)
[<80078334>] (generic_handle_irq) from [<80078660>] (__handle_domain_irq+0x8c/0xfc)
[<80078660>] (__handle_domain_irq) from [<800094e4>] (gic_handle_irq+0x34/0x6c)
[<800094e4>] (gic_handle_irq) from [<80015500>] (__irq_svc+0x40/0x74)
Exception stack(0xa99bdc90 to 0xa99bdcd8)
dc80: 00000000 00000000 00000000 00000001
dca0: 80e09934 00000001 00000000 00000000 00000010 00008070 80d4455c a99bdcec
dcc0: a99bdca8 a99bdcd8 8005c080 808a2e74 80000013 ffffffff
[<80015500>] (__irq_svc) from [<808a2e74>] (_raw_spin_lock+0x4c/0x60)
[<808a2e74>] (_raw_spin_lock) from [<8002ac14>] (imx_enable_cpu+0x34/0xc8)
[<8002ac14>] (imx_enable_cpu) from [<8002b548>] (imx_cpu_kill+0x60/0x94)
[<8002b548>] (imx_cpu_kill) from [<80017090>] (__cpu_die+0x60/0x94)
[<80017090>] (__cpu_die) from [<808959bc>] (_cpu_down+0x1e4/0x2fc)
[<808959bc>] (_cpu_down) from [<80036f7c>] (disable_nonboot_cpus+0xd0/0x264)
[<80036f7c>] (disable_nonboot_cpus) from [<80073984>] (suspend_devices_and_enter+0x344/0x910)
[<80073984>] (suspend_devices_and_enter) from [<8007433c>] (pm_suspend+0x3ec/0x6e4)
[<8007433c>] (pm_suspend) from [<80072754>] (state_store+0x7c/0xcc)
[<80072754>] (state_store) from [<803455e4>] (kobj_attr_store+0x1c/0x28)
[<803455e4>] (kobj_attr_store) from [<8019f670>] (sysfs_kf_write+0x54/0x58)
[<8019f670>] (sysfs_kf_write) from [<8019ea40>] (kernfs_fop_write+0xc8/0x1ac)
[<8019ea40>] (kernfs_fop_write) from [<8013285c>] (__vfs_write+0x34/0xe8)
[<8013285c>] (__vfs_write) from [<801330cc>] (vfs_write+0xa0/0x174)
[<801330cc>] (vfs_write) from [<80133970>] (SyS_write+0x54/0xb0)
[<80133970>] (SyS_write) from [<800108c0>] (ret_fast_syscall+0x0/0x3c)
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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enable hdmi audio sound card
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
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correct hdmi peripheral type
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
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add wm8962 headphone detect gpio for imx6sx-sdb board
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
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board
add ssi<->wm8962 sound card support for imx6qdl-sabresd board
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
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add spdif sound card support for imx6sl-evk board
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
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add ssi<->wm8962 sound card support for imx6sl-evk board
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
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Fix a typo for clock name 'pll1_bypass_src'.
Signed-off-by: Bai Ping <b51503@freescale.com>
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Enable the device cooling device in the defconfig.
Signed-off-by: Bai Ping <b51503@freescale.com>
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LDO2p5 cannot be disabled in low power idle mode when the USB driver
enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy
regulator that the USB driver will enable when VBUS wakeup is required.
This patch is copied from commit 7d849e4d9ebca3c as code the structure has
changed too many. directly cherry-pick has too many conflicts to resolve
Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 25a42aeb8eeb0b894a70e1a0f6750ced39830a46)
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Add low power idle support for i.MX6SL.
Signed-off-by: Bai Ping <b51503@freescale.com>
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Add busfreq support for i.MX6SL SOC. we support three
busfreq mode (high_bus_freq_mode/low_bus_freq_mode and
audio_bus_freq_mode).
Signed-off-by: Bai Ping <b51503@freescale.com>
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Add busfreq device node for imx6sl.
Signed-off-by: Bai Ping <b51503@freescale.com>
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On different platforms, the CPU power down/up timing may be
different because of different requirements or different
implementations in hardware, so we need to support dynamic
setting of these timing, board level dtb file will provide
these settings, and GPC driver need to read them and set them
to the hardware.
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit b0145b4e8556621cbe0d72e56cec5b04454db6c2)
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The 'PLL1_SYS' and 'PLL1_SW' clks are used by the cpufreq
driver to do dynamic frequency changing procedure.
The 'CLK_SET_PARENT_GATE' should not be set for 'PLL1_SW'
clk, this clock's prepare_count is not zero all the time.
change the clk type of 'PLL1_SYS' to fixed_factor. due to
the hardware limit, when changing the ARM_PODF. This clock's
output should not be gated.
Signed-off-by: Bai Ping <b51503@freescale.com>
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The pll1_bypass and pll1_bypass_src clock index in cpu node
should be IMX6SX_PLL1_BYPASS and IMX6SX_PLL1_BYPASS_SRC,
so correct this.
Signed-off-by: Bai Ping <b51503@freescale.com>
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For low power idle with ARM power gated, per hardware requirement,
there must be no interrupt coming during the power down
process of ARM core, so RBC counter is enabled to hold interrupts.
However, the previous setting of RBC counter is 1, which is ~30us,
but the hardware design recommend a ~90us is required during ARM
core power down, so we update the RBC counter value to 4(~120us) here.
Previous delay loop to make sure RBC is actually enabled, 3us is
needed, but the loop value assume ARM is running @1GHz, but actually
ARM is running @24MHz now, so we need to update the loop value
according to ARM speed.
The ARM power up timing is based on IPG / 2048, IPG is 1.5MHz during
low power idle, so the total latency of cpuidle exit should be
updated accordingly.
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit 4e1fd49da5e87c5cc23f053692e8d7648a4d4b21)
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If in low power idle, we use the RC-OSC to reduce the power consumption,
the RC-OSC freq need to be adjusted, otherwise, the RC-OSC freq is not
very accurate. It may lead to system instability issue.
Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 8a93ab44e98bcc6611170734b829cd8d140dd722)
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This bit is used to keep the ARM Platform memory clocks enabled if
an interrupt is pending when entering low power mode. This bit should
always bet set when the CCM_CLPCR_LPM bits are set to 01(WAIT Mode) or
10 (STOP mode) without power gating.
Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 0272868641041c5a9eb1b3476660711bb5cd69e4)
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Add the low power idle support on i.MX6UL. The ANATOP can enter low
power when all PLLs are powered down. If need entering low power idle
with LDO_2P5 and LDO_1P1 power down and other anatop module in low
power mode, add "uart_from_osc' on command line to make sure the UART
clk is from osc to let the PLL3 power down when entering low power idle.
Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 5215cba66938fd09f44e61b2c7b7ae0ef0629c2f)
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Enable the busfreq support on i.MX6UL EVK board. The
busfreq support below 3 busfreq mode:
* high_bus_mode: MMDC<--> 400MHz
* audio_bus_mode: MMDC<--> 50MHz
* low_bus_mode: MMDC<--> 24MHz
Signed-off-by: Bai Ping <b51503@freescale.com>
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Cherry-pick below patch:
ENGR00317981 ARM: dts: imx: apply ENET IRQ workaround for sabresd board
This a forward porting of commit (ENGR00313685-15 ARM: dts: imx: apply
ENET IRQ workaround for sabresd board) from imx_3.10.y to imx_3.14.y.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
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Cherry-pick below patch:
ENGR00317981: ARM: dts: add dumb dts for enetirq and ldo
Add a couple of dumb dts files for enetirq and ldo cases, which are
asked by Yocto build for 3.14 kernel.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
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Update IPU and display property, make sure these dts files can
pass build.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Add IPU, HDMI and LDB support.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Enable IPU, HDMI and LDB.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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When VPU freq is set to 352MHz, it needs to source clk
from PLL2_PFD2_396M, and PLL2_PFD2_396M need to change
freq to 352M, cpufreq's 396M setpoint will be removed.
Busfreq will be disabled as it needs PLL2_PFD2 to be
as 396MHz to achieve low power audio freq setpoint.
To enable VPU 352MHz feature, select it in menuconfig,
it is disabled by default.
Signed-off-by: Anson Huang <b20788@freescale.com>
Conflicts:
arch/arm/mach-imx/clk-imx6q.c
arch/arm/mach-imx/mach-imx6q.c
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Add busfreq support for i.MX6Q/DL, 3 setpoints supported:
HIGH: MMDC = 528MHz on i.MX6Q, = 396MHz on i.MX6DL; AHB = AXI = 24MHz;
AUDIO: MMDC = 50MHz, AXI = 50MHz, AHB = 25MHz;
LOW: MMDC = AXI = AHB = 24MHz.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Add busfreq support for i.MX6Q/DL.
Signed-off-by: Anson Huang <b20788@freescale.com>
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