| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-10-29 | MIPS: Octeon: Update register definitions for CN63XX chips | David Daney | |
| The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores. Join some lines back together. This makes some of them exceed 80 columns, but they are uninteresting and this unclutters things. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1668/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | |||
| 2009-06-17 | MIPS: Add register definitions for PCI. | David Daney | |
| Here we add the register definitions for the processor blocks used by the following PCI support patch. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | |||
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index : linux-toradex.git | |
| Linux kernel for Apalis and Colibri modules | Toradex |
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