Age | Commit message (Expand) | Author |
2010-02-27 | MIPS: Implement Read Inhibit/eXecute Inhibit | David Daney |
2010-02-27 | MIPS: Remove #if 0 r4k_update_mmu_cache_hwbug | David Daney |
2010-02-27 | MIPS: Remove probe_tlb(). | David Daney |
2009-09-17 | MIPS: Remove useless zero initializations. | Ralf Baechle |
2009-06-24 | MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users. | Ralf Baechle |
2009-06-17 | MIPS: TLB support for hugetlbfs. | David Daney |
2009-05-20 | MIPS: 64-bit: Fix system lockup. | Greg Ungerer |
2009-01-11 | MIPS: Only write c0_framemask on CPUs which have this register. | Ralf Baechle |
2008-04-28 | [MIPS] All MIPS32 processors support64-bit physical addresses. | Chris Dearman |
2008-03-12 | [MIPS] Fix loads of section missmatches | Ralf Baechle |
2008-03-12 | [MIPS] Fix typo in comment | Thiemo Seufer |
2007-10-11 | [MIPS] Fix "no space between function name and open parenthesis" warnings. | Ralf Baechle |
2007-07-10 | [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 | Fuxin Zhang |
2007-01-19 | [MIPS] Delete duplicate call to load_irq_save. | Ralf Baechle |
2006-09-27 | [MIPS] Replace BARRIER with more appropriate hazard barrier. | Ralf Baechle |
2006-06-30 | Remove obsolete #include <linux/config.h> | Jörn Engel |
2006-06-19 | [MIPS] Remove prototype for non-existing function. | Ralf Baechle |
2006-04-19 | [MIPS] MT: Improved multithreading support. | Ralf Baechle |
2006-03-21 | [MIPS] Kill tlb-andes.c. | Thiemo Seufer |
2005-10-29 | Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1. | Ralf Baechle |
2005-10-29 | Fix race conditions for read_c0_entryhi. Remove broken ASID masks in | Thiemo Seufer |
2005-10-29 | Update MIPS to use the 4-level pagetable code thereby getting rid of | Ralf Baechle |
2005-10-29 | Formatting fixes. | Maciej W. Rozycki |
2005-04-16 | Linux-2.6.12-rc2v2.6.12-rc2 | Linus Torvalds |