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2009-02-13Merge branch 'core/header-fixes' into x86/headersIngo Molnar
Conflicts: arch/x86/include/asm/setup.h
2009-02-13Merge branch 'linus' into x86/apicIngo Molnar
Conflicts: arch/x86/kernel/acpi/boot.c arch/x86/mm/fault.c
2009-02-09x86: spinlocks: define dummy __raw_spin_is_contendedKyle McMartin
Architectures other than mips and x86 are not using ticket spinlocks. Therefore, the contention on the lock is meaningless, since there is nobody known to be waiting on it (arguably /fairly/ unfair locks). Dummy it out to return 0 on other architectures. Signed-off-by: Kyle McMartin <kyle@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-02-05Merge branch 'x86/urgent' into x86/apicIngo Molnar
Conflicts: arch/x86/mach-default/setup.c Semantic merge: arch/x86/kernel/irqinit_32.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-01headers_check fix: mips, swab.hJaswinder Singh Rajput
fix the following 'make headers_check' warnings: usr/include/asm-mips/swab.h:12: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm-mips/swab.h:18: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-02-01headers_check fix: mips, sigcontext.hJaswinder Singh Rajput
fix the following 'make headers_check' warning: usr/include/asm-mips/sigcontext.h:57: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-30MIPS: Alchemy: time.c build fixManuel Lauss
In Linus' current -git the cpumask member is now a pointer. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Export rb532_gpio_set_func()Phil Sutter
This kernel symbol provides a way for drivers to switch on alternate function for a certain GPIO pin. Turning it off is done implicitly when changing the GPIO direction, as that would be fixed when using the given pin als alternate function. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Update headersPhil Sutter
Remove the {set,get}_434_reg() prototypes, as the functions have been removed. Also move the prototypes for {get,set}_latch_u5() to the correct place. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Simplify dev3 initPhil Sutter
As rb532_dev3_ctl_res is not used by any platform device, it can be dropped when not used for holding the physical address of the device 3 controller. Also a size of one byte should suffice when ioremapping the physical address mentioned above, as only a single byte is being read from and written to it. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Remove {get,set}_434_reg()Phil Sutter
These kernel symbols are unused. Also, since dev3 init has been moved to devices.c, set_434_reg() breaks compiling as it uses dev3. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Move dev3 init code to devices.cPhil Sutter
This code doesn't belong to gpio.c, as it's completely unrelated to GPIO. As dev1 and dev2 init code is in devices.c, it seems to be a more adequate place. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Fix set_latch_u5()Phil Sutter
The data to be written is just a byte, so use writeb instead of writel. Also, dev3.base contains the address, not the data so referencing here is wrong. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Fix init of rb532_dev3_ctl_resPhil Sutter
This register just contains the address of the actual resource, so initialisation has to be the same as cf_slot0_res and nand_slot0_res. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Use driver_data instead of platform_dataPhil Sutter
As the korina ethernet driver uses platform_get_drvdata() to extract the driver specific data from the platform device, driver_data has to be used here. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Detect uart type, add platform devicePhil Sutter
Auto-detection works just fine, so use it instead of specifying the type manually. Also define a platform device for the uart, as suggested by David Daney. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: remove useless CF GPIO initialisationPhil Sutter
As the pata-rb532-cf driver calls gpio_direction_input(), the calls to rb532_gpio_set_func() and rb532_gpio_direction_input() are not needed since the alternate function is automatically being disabled when changing the GPIO pin direction. The later two calls to rb532_gpio_set_{ilevel,istat}() are implicitly being done by the IRQ initialisation of pata-rb532-cf. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Auto disable GPIO alternate functionPhil Sutter
When a driver calls gpio_set_direction_{input,output}(), it obviously doesn't want the alternate function for that pin to be active (as the direction would not matter in that case). This patch ensures alternate function is disabled when the direction is being changed. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Add set_type() function to IRQ struct.Phil Sutter
Interrupt Group 4 mapps the GPIO pins enabled as interrupt sources; add defines to make this clear when addressing them later in code. The mapped GPIOs support triggering on either level high or low. To achieve this, the set_type() function calls rb532_gpio_set_ilevel() for interrupts of the above mentioned group. As there is no way to alter the triggering characteristics of the other interrupts, accept level triggering on status high only. (This is just a guess; but as the system boots fine and interrupt-driven devices (e.g. serial console) work with no implications, it seems to be right.) To clear a GPIO mapped IRQ, the source has to be cleared (i.e., the interrupt status bit of the corresponding GPIO pin). This is done inside rb532_disable_irq(). After applying these changes I could undo most of my former "fixes" to pata-rb532-cf. Particularly all interrupt handling can be done generically via set_irq_type() as it was before. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RC32434: Define io_map_base for PCI controllerPhil Sutter
The code is rather based on trial-and-error than knowledge. Verified Via Rhine functionality in PIO as well as MMIO mode. [Looks sane -- Ralf] Signed-off-by: Phil Sutter <n0-1@freewrt.org> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Fix bit swapping in rb532_set_bit()Phil Sutter
The algorithm works unconditionally. If bitval is one, the first line is a no op and the second line sets the bit at offset position. Vice versa, if bitval is zero, the first line clears the bit at offset position and the second line is a no op. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Use hardware watchpoints on all R1 and R2 CPUs.David Daney
The previous definition inadvertently omits Octeon which currently is treated as an architecture variant separate from MIPS32 and MIPS64. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Read watch registers with interrupts disabled.David Daney
If a context switch occurred between the watch exception and reading the watch registers, it would be possible for the new process to corrupt their state. Enabling interrupts only after the watch registers are read avoids this race. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Fix a typo in watchpoint register structure.David Daney
This fixes the ptrace ABI for watch registers, and should allow 64bit kernels to use the watch register support. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: TXx9: Add support for TX4939 internal RTCAtsushi Nemoto
Add platform support to use rtc-tx4939 driver. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: R2: Fix broken installation of cache error handler.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: IP27: Switch from DMA_IP27 to DMA_COHERENTRalf Baechle
The special IP27 DMA code selected by DMA_IP27 has been removed a while ago turning DMA_IP27 into almost a nop. Also fixup the broken logic of its last users memcpy.S and memcpy-inatomic.s. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Add return value checks to user_termio_to_kernel_termios()Ralf Baechle
And while at it, convert all functions from macros to inline functions for sanity. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Octeon: Remove duplicated #includesHuang Weiyi
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: atomic_*(): Change type of intermediate variables.Ralf Baechle
This shaves of 1912 bytes of an IP27 defconfig kernel and avoids unexpected overflow behaviour in atomic_sub_if_positive. Apply the same changes to the atomic64_* functions for consistency. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Port "mm: invoke oom-killer from page fault" from UML / x86Ralf Baechle
Original commit 1c0fe6e3bda0464728c23c8d84aa47567e8b716c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Avoid destructive invalidation on partial cachelines.Ralf Baechle
See discussion e9c3a7c20901051031y528d0d31r18d44c5096c59e0@mail.gmail.com. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: SMTC: Fix build after recent creditial changes.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-27Merge branch 'linus' into core/percpuIngo Molnar
Conflicts: arch/x86/kernel/setup_percpu.c
2009-01-26eeprom: More consistent symbol namesJean Delvare
Now that all EEPROM drivers live in the same place, let's harmonize their symbol names. Also fix eeprom's dependencies, it definitely needs sysfs, and is no longer experimental after many years in the kernel tree. Signed-off-by: Jean Delvare <khali@linux-fr.org> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Cc: David Brownell <dbrownell@users.sourceforge.net>
2009-01-21Merge branch 'x86/mm' into core/percpuIngo Molnar
Conflicts: arch/x86/mm/fault.c
2009-01-15Merge branches 'cpus4096', 'x86/cleanups' and 'x86/urgent' into x86/percpuIngo Molnar
2009-01-15irq: update all arches for new irq_desc, fixMike Travis
Impact: fix build errors Since the SPARSE IRQS changes redefined how the kstat irqs are organized, arch's must use the new accessor function: kstat_incr_irqs_this_cpu(irq, DESC); If CONFIG_SPARSE_IRQS is set, then DESC is a pointer to the irq_desc which has a pointer to the kstat_irqs. If not, then the .irqs field of struct kernel_stat is used instead. Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-14Merge branch 'syscalls' of git://git390.osdl.marist.edu/pub/scm/linux-2.6Linus Torvalds
* 'syscalls' of git://git390.osdl.marist.edu/pub/scm/linux-2.6: (44 commits) [CVE-2009-0029] s390 specific system call wrappers [CVE-2009-0029] System call wrappers part 33 [CVE-2009-0029] System call wrappers part 32 [CVE-2009-0029] System call wrappers part 31 [CVE-2009-0029] System call wrappers part 30 [CVE-2009-0029] System call wrappers part 29 [CVE-2009-0029] System call wrappers part 28 [CVE-2009-0029] System call wrappers part 27 [CVE-2009-0029] System call wrappers part 26 [CVE-2009-0029] System call wrappers part 25 [CVE-2009-0029] System call wrappers part 24 [CVE-2009-0029] System call wrappers part 23 [CVE-2009-0029] System call wrappers part 22 [CVE-2009-0029] System call wrappers part 21 [CVE-2009-0029] System call wrappers part 20 [CVE-2009-0029] System call wrappers part 19 [CVE-2009-0029] System call wrappers part 18 [CVE-2009-0029] System call wrappers part 17 [CVE-2009-0029] System call wrappers part 16 [CVE-2009-0029] System call wrappers part 15 ...
2009-01-14byteorder: make swab.h include asm/swab.h like a regular headerHarvey Harrison
Add swab.h to kbuild.asm and remove the individual entries from each arch, mark as unifdef as some arches have some kernel-only bits inside. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-14[CVE-2009-0029] Rename old_readdir to sys_old_readdirHeiko Carstens
This way it matches the generic system call name convention. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
2009-01-12irq: update all arches for new irq_descMike Travis
Impact: cleanup, update to new cpumask API Irq_desc.affinity and irq_desc.pending_mask are now cpumask_var_t's so access to them should be using the new cpumask API. Signed-off-by: Mike Travis <travis@sgi.com>
2009-01-11MIPS: Only write c0_framemask on CPUs which have this register.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: new userspace suspend interface for development boards.Manuel Lauss
Replace the current sysctl-based suspend interface with a new sysfs- based one which also uses the Linux-2.6 suspend model. To configure wakeup sources, a subtree for the demoboards is created under /sys/power/db1x: sys/ `-- power `-- db1x |-- gpio0 |-- gpio1 |-- gpio2 |-- gpio3 |-- gpio4 |-- gpio5 |-- gpio6 |-- gpio7 |-- timer |-- timer_timeout |-- wakemsk `-- wakesrc The nodes 'gpio[0-7]' and 'timer' configure the GPIO0..7 and M2 bits of the SYS_WAKEMSK (wakeup source enable) register. Writing '1' enables a wakesource, 0 disables it. The 'timer_timeout' node holds the timeout in seconds after which the TOYMATCH2 event should wake the system. The 'wakesrc' node holds the SYS_WAKESRC register after wakeup (in hex), the 'wakemsk' node can be used to get/set the wakeup mask directly. For example, to have the timer wake the system after 10 seconds of sleep, the following must be done in userspace: echo 10 > /sys/power/db1x/timer_timeout echo 1 > /sys/power/db1x/timer echo mem > /sys/power/sleep This patch also removes the homebrew CPU frequency switching code. I don't understand how it could have ever worked reliably; it does not communicate the clock changes to peripheral devices other than uarts. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/alchemy/devboards/pm.c
2009-01-11MIPS: Alchemy: dbdma suspend/resume support.Manuel Lauss
Implement suspend/resume for DBDMA controller and its channels. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: Fix up PM code on Au1550/Au1200Manuel Lauss
Au1550/Au1200 have a different memory controller which requires additi- onal code to properly put memory to sleep (code taken from AMD/RMI's Linux-2.6.11 source package). Also fix up the remaining pm-related paths to compile on Au1200/Au1550 platforms. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: move calc_clock function.Manuel Lauss
Now that nothing in time.c depends on calc_clock, it can be moved to clocks.c where it belongs. While at it, give it a better non-generic name and call it as soon as possible in plat_mem_init. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: RTC counter clocksource / clockevent support.Manuel Lauss
Add support for the 32 kHz counter1 (RTC) as clocksource / clockevent device. As a nice side effect, this also enables use of the 'wait' instruction for runtime idle power savings. If the counters aren't enabled/working properly, fall back on the cp0 counter clock code. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: make cp0 counter clocksource/event usable as fallback.Manuel Lauss
The current mips clock build infrastructure lets a system only use either the MIPS cp0 counter or a SoC specific timer as a clocksource / clockevent device. This patch renames the core cp0 counter clocksource / clockevent functions from mips_* to r4k_* and updates the wrappers in asm-mips/time.h to call these renamed functions instead. Chips which can detect whether it is safe to use a chip-specific timer can now fall back on the cp0 counter if necessary and possible (e.g. Alchemy with a follow-on patch). Existing behaviour is not changed in any way. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: remove cpu_table.Manuel Lauss
Remove the cpu_table: - move detection of whether c0_config[OD] is read-only and should be set to fix various chip errata to au1000 headers. - move detection of write-only sys_cpupll to au1000 headers. - remove the BCLK switching code: Activation of this features should be left to the boards using the chips since it also affects external devices tied to BCLK, and only the board designers know whether it is safe to enable. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/common/cputable.c
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