summaryrefslogtreecommitdiff
path: root/arch/mn10300/mm
AgeCommit message (Expand)Author
2012-12-13Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jik...Linus Torvalds
2012-12-12mn10300/mm/fault.c: Port OOM changes to do_page_faultKautuk Consul
2012-12-06propagate name change to comments in kernel sourceNadia Yvette Chambers
2012-07-11mn10300: mm/dma-alloc.c needs <linux/export.h>Geert Uytterhoeven
2012-03-28Disintegrate asm/system.h for MN10300David Howells
2011-07-26atomic: use <linux/atomic.h>Arun Sharma
2011-06-07MN10300: Fix one of the kernel debugger cacheflush variantsDavid Howells
2011-05-25mn10300: convert old cpumask API into new oneKOSAKI Motohiro
2011-05-25mm: now that all old mmu_gather code is gone, remove the storagePeter Zijlstra
2011-03-18MN10300: Create generic kernel debugger hooksDavid Howells
2011-03-18MN10300: Create general kernel debugger cache flushingDavid Howells
2011-03-18MN10300: The icache invalidate functions should disable the icache firstDavid Howells
2011-03-14MN10300: The SMP_ICACHE_INV_FLUSH_RANGE IPI command does not existDavid Howells
2010-10-27MN10300: Map userspace atomic op regs as a vmalloc pageMark Salter
2010-10-27MN10300: And Panasonic AM34 subarch and implement SMPAkira Takeuchi
2010-10-27MN10300: SMP TLB flushingAkira Takeuchi
2010-10-27MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB controlAkira Takeuchi
2010-10-27MN10300: Make the use of PIDR to mark TLB entries controllableAkira Takeuchi
2010-10-27MN10300: Rename __flush_tlb*() to local_flush_tlb*()David Howells
2010-10-27MN10300: AM34 erratum requires MMUCTR read and write on exception entryAkira Takeuchi
2010-10-27MN10300: Cache: Implement SMP global cache flushingAkira Takeuchi
2010-10-27MN10300: Allow some cacheflushes to be avoided if cache snooping is availableDavid Howells
2010-10-27MN10300: AM34: Add cacheflushing by using the AM34 purge registersAkira Takeuchi
2010-10-27MN10300: SMP: Differentiate local cache flushingAkira Takeuchi
2010-10-27MN10300: Cacheflush functions should take unsigned long addressesAkira Takeuchi
2010-10-27MN10300: AM34: The current cacheflush routines operate by controlling tag regsDavid Howells
2010-10-27MN10300: Provide a MN10300_CACHE_ENABLED config optionDavid Howells
2010-10-27MN10300: Cache: Split cache bits out of arch KconfigDavid Howells
2010-10-27MN10300: Remove monitor/JTAG functionsAkira Takeuchi
2010-10-27MN10300: BUG to BUG_ON changesStoyan Gaydarov
2010-10-01MN10300: Fix flush_icache_range()David Howells
2010-09-28MN10300: Handle missing sys_cacheflush() when caching disabledDavid Howells
2010-08-23arch/mn10300/mm: eliminate NULL dereferenceJulia Lawall
2010-06-04mn10300: invoke oom-killer from page faultNick Piggin
2010-03-30include cleanup: Update gfp.h and slab.h includes to prepare for breaking imp...Tejun Heo
2010-02-20MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itselfRussell King
2010-01-11mn10300: make the ASB2305's PCnet32 NIC work by using the PCI bridge's SRAMDavid Howells
2010-01-11mn10300: add cc clobbers to asm statementsMark Salter
2010-01-11mm: make totalhigh_pages unsigned longAndreas Fenkart
2009-09-22arches: drop superfluous casts in nr_free_pages() callersGeert Uytterhoeven
2009-07-12headers: smp_lock.h reduxAlexey Dobriyan
2009-06-21Move FAULT_FLAG_xyz into handle_mm_fault() callersLinus Torvalds
2009-06-11MN10300: Don't set the dirty bit in the DTLB entries in the TLB-miss handlerDavid Howells
2008-11-12MN10300: Don't do misalignment handling for userspaceDavid Howells
2008-11-12MN10300: Don't handle misaligned loading and storing of SPDavid Howells
2008-11-12MN10300: Handle misaligned SP-based operandsDavid Howells
2008-11-12MN10300: Fix misaligned index-register addressing handlingDavid Howells
2008-11-12MN10300: Handle misaligned postinc-with-imm addressing mode correctlyDavid Howells
2008-11-12MN10300: Perform misalignment fixups of MOV_LccDavid Howells
2008-11-12MN10300: Allow misalignment fixup in interrupt handlingDavid Howells
generated by cgit v1.2.3 (git 2.0.4) at 2024-11-14 02:25:39 +0000