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path: root/arch/powerpc/boot/dts/sbc8560.dts
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2012-07-10powerpc: remove Wind River SBC8560 supportPaul Gortmaker
This reference board dates back to 2004, and is largely a legacy EOL product. The MPC8560 is a pre e500v2 CPU. The SBC8548 is a more modern, better e500v2 target for people to use as a reference board with today's kernels, should they require one. Removing support for it will also allow us to remove some sbc8560 specific quirk handling in 8250 UART code, and some MTD mapping support. Cc: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06powerpc/85xx: sbc8560 - declare that localbus is compatbile with simple-busDmitry Eremin-Solenikov
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-24powerpc/85xx: sbc8560 - remove "has-rstcr" from global utilities blockPaul Gortmaker
The earlier mpc8560 CPUs don't have the RSTCR at 0xe00b0 in the GUTS. The generic reboot code uses this tag to determine if it should be using the RSTCR for reboot, so remove it from the board definition. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19powerpc/fsl: Removed reg property from 85xx/86xx soc nodeKumar Gala
Between the addition of the ecm/mcm law nodes and the fact that the get_immrbase() has been using the range property of the SoC to determine the base address of CCSR space we no longer need the reg property at the soc node level. It has been ill specified and varied between device trees to cover either the {e,m}cm-law node, some odd subset of CCSR space or all of CCSR space. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19powerpc/85xx: Add new LAW & ECM device tree nodes for all 85xx systemsKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19powerpc/fsl: Remove cell-index from PCI nodesKumar Gala
The cell-index property isn't used on PCI nodes and is ill defined. Remove it for now and if someone comes up with a good reason and consistent definition for it we can add it back Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-31powerpc/85xx: Use fsl,mpc85.. as prefix for memory ctrl & l2-cache nodesKumar Gala
Older devices tree's used "fsl,85.." instead of the preferred "fsl,mpc85.." for the memory controller & l2 cache controller nodes. The EDAC code is the only use of these and has been updated for some time to support both "fsl,85.." and "fsl,mpc85.." Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-24powerpc/85xx: Move gianfar mdio nodes under the ethernet nodesAnton Vorontsov
Currently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep. Suggested-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-12-16gianfar: Convert gianfar to an of_platform_driverAndy Fleming
Does the same for the accompanying MDIO driver, and then modifies the TBI configuration method. The old way used fields in einfo, which no longer exists. The new way is to create an MDIO device-tree node for each instance of gianfar, and create a tbi-handle property to associate ethernet controllers with the TBI PHYs they are connected to. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-06-27powerpc: Add dma nodes to 83xx, 85xx and 86xx boardsKumar Gala
Added DMA nodes for the elo/elo-plus DMA engines. Renamed the interrupt controller alias in mpc832x_rdb.dts to ipic so that its the same as all the other boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02[POWERPC] 85xx: Add next-level-cache propertyKumar Gala
Added next-level-cache to the L1 and a reference to the new L2 label. This is per the ePAPR 0.94 spec. Since we are't really dependent on this today we aren't supporting the "legacy" l2-cache phandle that is specified in the PPC v2.1 OF Binding spec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02[POWERPC] Cleanup mpic nodes in .dtsKumar Gala
Removed clock-frequency, big-endian, and built-in props as they aren't specified anywhere. Also added compatible = "chrp,open-pic" in the places it was missing. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-28[POWERPC] 85xx: Add v1 device tree source for Wind River SBC8560 boardPaul Gortmaker
This adds a v1 device tree source for the Wind River SBC8560 board. The biggest difference between this and the MPC8560ADS reference platform dts is the use of an external 16550 compatible UART instead of the CPM2. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>