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a NULL pointer check for the ODM kit SDIO property was incorrectly
entered as a check against the instance ID, which resulted in SDHCI
instance 0 never being registered.
bug 693414
Change-Id: I29b21d9d215ec1aeafd3d22a4468e0960c52621b
Reviewed-on: http://git-master/r/2189
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I8abd263268f3764e843b39ef3d545a0e658e898b
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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In the multplexed pinmux option, it is require to unconfigure the
current configured pinmux and need to move the pingroup to safe option.
The function NvRmPinMuxConfigSelect() was not handling properly the
request for selecting the multiplexed pinmux option.
Change-Id: I2869fedfaa9c47cd9af18581dc1555966138f145
Reviewed-on: http://git-master/r/2242
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Added explicit RM state update in RM kernel resume path (no need to
rely on "the 1st resumed driver must report its state to RM")
ported from android-tegra-2.6.29
Change-Id: Idb86728fcb5c73e2874f3077a9d665f0b241c8e6
Reviewed-on: http://git-master/r/2232
Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Replaced dynamic busy hints allocation with busy hints pool.
bug 686569
ported from android-tegra-2.6.29
Change-Id: Ie64dfc1a060e2d574b5970018c95f61acb735e07
Reviewed-on: http://git-master/r/2225
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Convert /dev/nvos to a general purpose node, /dev/nvos and a super
user node, /dev/knvos. /dev/nvos exposes semaphore related
functionality whereas /dev/knvos will be used for interrupt
and memory management. Track the semaphores in a rbtree
so that we do not stomp on anybody else's space and corrupt
the memory.
Change-Id: I98bacb7312fd3eb86122dde80381b74ae865ce57
Reviewed-on: http://git-master/r/2192
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Change-Id: I6246fa04cbd9f22ba7b932700af044ad0193da6d
Reviewed-on: http://git-master/r/2201
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I573c74b7982020b5b282a276aa1cdc6171162c73
Reviewed-on: http://git-master/r/2217
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Supports CBC & ECB encryption/decryption, AnsiX9.31 RNG, SSK/SBK/User Key,
fine-grain uid/gid access control and ability for privileged user to reset
the engine. A device node (/dev/nvaes) is provided to enable access from
user-land.
based on work done by David Le Tacon (dletacon@nvidia.com)
Change-Id: I1a9c29b964ca15e6fec70389c2000306ef604086
Reviewed-on: http://git-master/r/2216
Reviewed-by: David Le Tacon <dletacon@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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This new power state corresponds to doing an LP2 like operation
at the end of Linux's suspend/resume sequence. When LP1/LP0
are working, we can replace SimpleSuspend with the real
Suspend/DeepSleep operations. The SimpleSuspend state
can also be used as a "sanity" state to assist in
debugging power issues.
Change-Id: Id7d2df0b263c0e2dc2b6bfe1e2f647a9c0d2f747
Reviewed-on: http://git-master/r/2160
Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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to ensure that no CPUs are added or removed between the time the
system starts to suspend and the time it exits resume, register a
pm_notifier which disabled dynamic hotplug on SUSPEND_PREPARE and
re-enables it on POST_SUSPEND.
Change-Id: I6b24495b7992b4a3e47ad3c31e48ef9bd65eb2f0
Reviewed-on: http://git-master/r/2153
Reviewed-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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due to a swapped source and destination value, wait_for_us was returning
the time it started looping, not the time it exited
Change-Id: I53455413ad969b7e02979c150883a2f18b222bd2
Reviewed-on: http://git-master/r/2152
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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If the CPU turns off prematurely during a suspend operation, the system
cannot recover as the wake events would not have been set up yet.
Change-Id: I7f989d1d7d03c40341b63935280325621d35b408
Reviewed-on: http://git-master/r/2100
Tested-by: Trivikram Kasivajhula <tkasivajhula@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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the allocated RM DMA handle was not being returned to the caller,
causing a segfault in a number of circumstances, and incorrect
behavior in others; fix this and enhance the error detection in
NvRmStartDmaTransfer to catch this in the future
additionally, it appears that no-timeout and no-signal was a valid
mode of operation in the previous code, so add support for this to
the new code
Change-Id: I954fdbf7307fbae8946292215ebec79750ffbda7
Reviewed-on: http://git-master/r/2018
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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the DMA API expects that the peripheral address supplied by the client
is a valid APB address in the system memory map (0x7000:xxxx); however,
the I2C code was only providing the offset of the register relative
to the start of the controller's aperture.
it's not clear how this ever worked, but the additional error checking
in the new RM DMA-on-native DMA implementation choked on this, highlighting
the problem
Change-Id: I4e10be05e03a6feeff4b0a26b5f870caf9ee5e1c
Reviewed-on: http://git-master/r/2017
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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The USB device connected to USB1(OTG) port was not getting detected at
boot time. Reason being that on phy power down (host mode), there was
some delay in VBUS getting disabled. Because of this the OTG state was
getting set to "peripheral" instead of "host".
Fixed this by waiting for VBUS to be disabled in phy power down with a
max wait time of phy hardware time out (1 sec).
Change-Id: I78e561e28d942fa9931dfb88656281b02264859f
Reviewed-on: http://git-master/r/1837
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I6519568f20c4cd859c198d82c2a3007305a61317
UTMIP pads were turned off before the UTMI phy is set in to the suspend mode.
This is corrected by turning off the UTMIP power control pads after phy is
suspended.
Added workaround for ULPI to bring out of suspend by setting USB2_CLK_OVR_ON
bit in CLK_RST_CONTROLLER register.
Change-Id: I3219946e6351c8ddf5e036dfc3a3f2b3693e99a6
Enable Clock Over On bit for all three controllers during phy resume and
disable during the suspend. Added timeout for the phy clock wait loops.
Change-Id: I71324cc89b4e3031ecc94ee5c05ba6193bab6533
add timeouts to all infinite polling loops to prevent soft lockups when
restoring the phy
Change-Id: I067d50fe26c8e951d92e4e36814d20d9ad2022f2
Reviewed-on: http://git-master/r/1836
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: Ic19d154a2825dc38c01f7ba7690f97aaa26f9313
Reviewed-on: http://git-master/r/1834
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I90df26b7657a9511ba439cba188bfb9782a66d40
Reviewed-on: http://git-master/r/1833
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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register the tegra_accelerometer, tegra_scrollwheel and
tegra_vibrator ODM kit devices if enabled in the kernel config
Change-Id: I436095452940cef4b22b4cdba20fa778fea57116
Reviewed-on: http://git-master/r/1832
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I82b4c5b61f6a52ae3ebc93a28219c15da446b040
Reviewed-on: http://git-master/r/1831
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I60f52fc6e91839abb11333e44fb77fdda85841f1
Reviewed-on: http://git-master/r/1830
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I79ca91a26094567207eb55837b908086209cfcf2
Reviewed-on: http://git-master/r/1829
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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update harmony defconfig to match the auto-generated config
Change-Id: I072a23b23e86cdd37fe7e4ee7bc03d4fe5ece864
Reviewed-on: http://git-master/r/1824
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I0df52fdf69c9cf2e2c77b8f9d36098b5f0992b46
Reviewed-on: http://git-master/r/1823
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: Id6f06d4cd2534331877dea2053b15130c9efea3a
Reviewed-on: http://git-master/r/1821
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I9b7a7cb461f5b7f5d4623050ed6184426e14400f
Reviewed-on: http://git-master/r/1820
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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ported commit 77636a9b missed a few necessary changes to the Maxim PMU
ODM kit adaptation, causing a build break on Whistler.
Change-Id: I0c42753e5cbba12d5aed1ac260af8711a39cffab
Reviewed-on: http://git-master/r/1819
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I2622d6f614f69dadeb285128f79cfceaa396c688
Reviewed-on: http://git-master/r/1809
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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MACH_HARMONY is no longer used now that Whistler, Harmony and Tango will
use the same top-level board-generic.c machine file; delete it and move
MACH_TEGRA_GENERIC into its place.
introduce TEGRA_ODM_KIT as a selected Kconfig for machines which implement
ODM kits; this is mandatory for a machine to run with the NvRm drivers,
but basic system bringup (serial console and RAM disk) should be possible
without this
Change-Id: Id954aa6ba1fea6623f0b8e75fa8b25e4333f852f
Reviewed-on: http://git-master/r/1808
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
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Change-Id: I1a60e241087e96e07be98af0f0a3267970adfd5c
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USB charging requires a vbus_draw regulator registered for the tegra-udc.0
device driver; since not all platform support USB charging, this is
enabled via a Kconfig
Change-Id: Iec441d7d3d854400762ca2667a514b6660b053c4
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add new fields to the platform data structure to allow specification of
chargers (current sources) vs regulators (voltage sources) on the platform
Change-Id: If4d0b2520a37afb96d103d6cbf78ec2fba2d02f9
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only certain prefetch offest values in Tegra 2's PL310 cross 4K boundaries.
the value originally programmed (reverted in commit 61ad8dcf), 8, was
one of the broken values. a prefetch offset of 7 has nearly the same
performance as 8, and won't cross 4K boundaries.
Change-Id: Ie8b4f6aa419e47b3ec553faeb8e4e2d95c2b37a9
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Change-Id: I3bdf40501e66d4aa16e2d7b7a95eb5579da698e6
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Change-Id: I313e5f4ec495873abde6486fd8c652724485865f
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A fuse module is added to support programming and reading back
fuse values.
This module is built as part of kernel.
Bug 657504
Tested on: Whistler
Change-Id: I5663679c8d41834aa4077e9940a0595f6575af64
Reviewed-on: http://git-master/r/1259
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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Change-Id: I4312dc2c998eaf1c72cfc4996622d35fdeccdbb4
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gcc auto-inlining seems to breakdown with this file now that there are
so many registration functions; mark all of the setup helpers as noinline
to prevent the optimizer from producing non-working kernels
Change-Id: Id29df6111aa50c02099fe96ebd60c119e6dcdd44
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Change-Id: I8d2834f5b7e73cd6a1eb6584715bdd707e23e830
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on platforms which have simple configurations (specifically no pinmux
multiplexing for I2C controllers), implement a helper function in
board-nvodm to register all of the I2C master controllers on the system
based on the ODM kit-specified values.
the code will skip registering I2C slave controllers, which are currently
detected by the SMBUS GUID.
also, since board-generic is really intended to be only for NVIDIA
development boards, make the terminology in the file more clearly
NVIDIA-specific.
Change-Id: I115fb6bf68d93f62a548d65fa5bfdd2d00c13fbc
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since the RM APIs are used by ODM kits prior to device initialization
(to read EEPROMs and the like), implementing the RM on top of Linux's
I2C API won't happen immediately
Change-Id: I8a97e13a7fda8bafaf74e2251e8bd1b0e32dc058
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also, lie to the RM about the suspend transition (call it LP1), so that
the DVFS service is properly restarted upon resume; otherwise, the CPU
resumes at 216MHz and stays there.
Change-Id: I608e887dc9d652cdf93b666ff16efddf483d2c9d
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Change-Id: Iac4642b534c75f2b9252866b331062e461f82f78
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IOVMM devices need to be suspended after the device drivers and
coprocessors in the system are suspended, to ensure that no races
exist between DMA devices and the IOVMM MMU.
add new tegra_iovmm_suspend and tegra_iovmm_resume functions which
should be called by the platform suspend prepare_late or enter callbacks,
add corresponding callbacks to the iovmm device_ops structure, and move
the GART suspend & resume operations to this callback
Change-Id: I08babaf14d65477a0c724a943e7f9d868e64f0df
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use the ARMv7 movw and movt instructions to load literal values, rather
than allowing the compiler to silently generate literal sections all over
memory
since this code needs to be relocatable (may run with no MMU, may run
with MMU, may run in IRAM), the fewer literals, the better
Change-Id: I06c3e1b607649946273a9b8cb87008bbec3bc4ae
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EMC clock source is not saved, because the final low-power entry and
BootROM restore (out of LP0) preserves this itself.
Change-Id: I34d16a362ba58c9ea50715ef6dd103ab854b1251
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implement basic support for system suspend operations using LP2 (CPU
power-gating)
platform-specific data (power good times, PMU capabilities, etc.) must be
specified when registering the suspend operations, and a helper function
for mapping from wakeup pad and PMU property data from the ODM kit to
the platform_data structure is provided.
AVP & RM suspend is performed in the prepare_late callback, ensuring that
these operations are executed after all drivers have suspended, to eliminate
ordering conflicts on RM dependencies
since all device interrupts (except timers) are disabled in the suspend
path, the wakeup interrupts need to be manually unmasked before entering
into a suspend state or the processor will never wake up; these forced-unmask
interrupts are re-masked immediately in the resume path to prevent the
kernel from live-locking prior to driver resume.
Change-Id: Ibe4d594d450b253744d803a0a15d66ae275029e8
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the RM needs to be shut down after all drivers in the system, to
ensure that drivers which need RM services to suspend themselves
can do so; the functionality provided by these functions will
be added back to the system's prepare_late callback
Change-Id: I580dfcc476352e322175e3db1c5d1aef50e86855
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add functions to save and restore the pinmux & tristate register
state, to be used by the system suspend function
also, remove the tristate reference count "init"; this was run too late
in the init process to reach the correct answer, and the permanent
increment for pins taken out of tristate at boot and left there is of
dubious value
Change-Id: I17217a205b316cd291d5790cb1c65c5bff2569a0
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