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2012-09-12ENGR00180931-4 mvf: add default kernel config for FaradayAlison Wang
Add default kernel config for Faraday. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00181401,ENGR00181396-1: Add USB OTG controller support for MVF platformJingchang Lu
OTG1 acts as gadget and OTG2 acts as host on TWR-MVF600 board. Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-09-12ENGR00180953-1: dspi: add platform support for dspi driverAlison Wang
Add platform support for dspi driver. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-12ENGR00212251-1: sai: add platform support for SAI driverAlison Wang
Add platform support for SAI driver. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-12ENGR00180947-1: dcu: add platform support for dcu driverAlison Wang
Add platform support for dcu driver. Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-12ENGR00181374-1: nfc: add platform support for NFC driverAlison Wang
Add platform support for NFC driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00180958: rtc: add platform support for RTC driverAlison Wang
Add platform support for RTC driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00181363-1: add platform support for I2C controllerAlison Wang
Add platform support for I2C controller. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00180936-1: edma: add platform support for edma driverAlison Wang
Add platform support for edma driver. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Xiaochun Li <b41219@freescale.com>
2012-09-12ENGR00212262-1: esdhc: add platform support for esdhc driverAlison Wang
Add platform support for esdhc driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00181358-1: fec: add platform support for FEC driverAlison Wang
Add platform support for FEC driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-12ENGR00181393-1: uart: add platform support for UART driverAlison Wang
Add platform support for UART driver. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-09-12ENGR00180931-3 mvf: add gpio API for MVF platformAlison Wang
Add gpio API for MVF platform. The MVF GPIO framwork is different with i.mx. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00180931-2 mvf: add IOMUX definiation and initializationAlison Wang
Add IOMUX definiation and initialization. Add the iomux initialization support for Faraday. Define the io pad settings for some function modules. Those pad ctrl settings may need to adjust during the feature tuning process. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-09-12ENGR00180931-1 mvf: add MSL support for MVF platformAlison Wang
Add MSL support for MVF platform. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Jingchang Lu <b35083@freescale.com>
2012-09-12ARM: proc: add Cortex-A5 proc infoPawel Moll
This patch adds processor info for ARM Ltd. Cortex A5, which has SCU initialisation procedure identical to A9. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit 15eb169bfec291faf25b158cfa9842b72f7803ad)
2012-09-12ARM: perf: add PMUv2 common event definitionsWill Deacon
The PMUv2 specification reserves a number of event encodings for common events. This patch adds these events to the common event enumeration in preparation for PMUv2 cores, such as Cortex-A15. Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit 6d4eaf991c654af54a19c0fa48e0ad62cefbc37c)
2012-09-12ARM: proc: convert v7 proc infos into a common macroPawel Moll
As most of the proc info content is common across all v7 processors, this patch converts existing A9 and generic v7 descriptions into a macro (allowing extra flags in future). Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit dc939cd835d0e2d3ff4197d6e2c017d269616d20)
2012-09-12ARM: perf: add support for the Cortex-A5 PMUWill Deacon
This patch adds support for the Cortex-A5 PMU to the ARMv7 perf-event backend. Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit 0c205cbe20654616e2f8389c0c1ff707d9dccb63)
2012-03-08ENGR00176160 [MX6]Correct PLL1 freq change flowAnson Huang
Previous PLL1 freq change is done by switching CPU clock to 400M pfd or 24M OSC, then modifying PLL1 div directly, and switch back CPU clock immediately, it will result in CPU clock stop during PLL1 hardware lock period, thus, DRAM FIFO may blocked by the data CPU requested before PLL1 clock changed, and it will block other devices accessing DRAM, such as IPU, VPU etc. It will cause underrun or hang issue. We should wait PLL1 lock, then switch back. Signed-off-by: Anson Huang <b20788@freescale.com>
2012-03-07ENGR00176147-2: usb: pass the wakeup event to pdataPeter Chen
The host driver needs to differentiate wakeup event. Signed-off-by: Peter Chen <peter.chen@freescale.com>
2012-03-07ENGR00176068-3 defconfig: enable localtimer in defconfigXinyu Chen
Enable local timer by default. If wait mode is on, local timer will be shutdown automatically on boot. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2012-03-07ENGR00176068-2 smp_twd: reconfigure clockevents after cpufreq changeXinyu Chen
After a cpufreq transition, update the clockevent's frequency by fetching the new clock rate from the clock framework and reprogram the next clock event. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com> Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-07ENGR00176068-1 mx6q: add smp_twd clock for localtimerXinyu Chen
Add a smp_twd system clock which is simple clock from parent of cpu_clk, and it's rate is half of the cpu_clk. This is used for reprograming the twd clock event after cpu freq is changed. Also disable local timer setup when wait mode enabled. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2012-03-07ENGR00176279 [MX6DL] MMC: improve SD3.0 SDR104 mode compatability.Ryan QIAN
remove SION bit for SD3_CMD pad control, it will enlarge clock tuning window on MX6DL. Signed-off-by: Ryan QIAN <b32804@freescale.com>
2012-03-07ENGR00174062 CCM: change clock enable_count to usecountLin Fuzhen
change clock debugfs sys attr 'enable_count' to 'usecount' to align with some power debug tool used Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
2012-03-06ENGR00176136- MX6: Added support for 1.2GHz ARM FrequencyRanjani Vaidyanathan
Added the new 1.2GHz working point. Currently 'arm_freq=1200" should be added to commandline for the core to run at 1.2GHz. Also ensure that the appropriate HW board mods have been done to set VDDARM_IN at 1.425V. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2012-03-06ENGR00176175 MX6Q: fix typo in cpu op voltage setting.Zhang Jiejing
Fix a typo when adding 600M WP, the voltage value is wrong, it will lead a warnning when change to this WP: COULD NOT SET GP VOLTAGE!!!! Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2012-03-06ENGR00170526-1 MX6Q_Sabreauto: remove audio platform data rst_gpio.Lionel Xu
Remove audio platform data rst_gpio which is not longer required now. Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
2012-03-02ENGR00175551:Update sabreauto board file for handling spi and paralle norFrancisco Munoz
*Files affected: board-mx6q_sabreauto.c *Added IOMUX settings for parallel nor *Utilized physmap driver in order to probe the chip *Implemented conditional compilation enabling either spi or parallel nor. Signed-off-by: Francisco Munoz <b37752@freescale.com>
2012-03-02ENGR00175947 camera: sensor mclk change name to clko_clkYuxi Sun
Change mclk sensor name to clko_clk Signed-off-by: Yuxi Sun <b36102@freescale.com>
2012-03-02ENGR00175219-6 MX6Q_SABRESD: add clko_clk supportGary Zhang
audio codec wm8958 and camera use the same clock clko_clk with around 22MHz. Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-03-02ENGR00175219-5 MX6: remove cko1_clk in clock.cGary Zhang
there are clko_clk and cko1_clk in clock.c which operate the same CKO1 clock source. remove cko1_clk codes to avoid operation confusion. Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-03-01ENGR00175826 defconfig: add mx6q_sabresd in updater defconfig.Zhang Jiejing
add mx6q_sdabresd board in updater defconfig. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
2012-03-01ENGR00175824 fix the wrong patch for arch/arm/include/asm/futex.hHuang Shijie
The patch "1e5fce1 ENGR00139261 [MX6Q]support 8 bit MMC and eMMC DDR mode" reverts the patch "28d5b74 ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_op" This patch just re-reverts the patch 1e5fce1. Acked-by: Lily Zhang <r58066@freescale.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-02-29ENGR00175692-02 [MX6DL] SD3.0: can not recognize SD3.0 cards on some boards.Ryan QIAN
Improve SD3.0 compatibility: change DSE to 34ohm for 200Mhz. Signed-off-by: Ryan QIAN <b32804@freescale.com>
2012-02-28ENGR00175219-2 MX6Q_SABRESD: add wm8958 supportGary Zhang
add wm8958 codec support Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-02-28ENGR00175219-1 MX6: add wm8958 option in defconfigGary Zhang
add wm8958 option in defconfig Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-02-23ENGR00175222-1 IPUv3 pdev:Check fb size before reserve ov fbLiu Ying
This patch checks overlay fb size before reserve fb mem for it. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit b29df373e547c83f9b3bcfd9a98016f462fa9ec2)
2012-02-23ENGR00174905 [MX6] gc355 can't work after specific suspend/resume caseLarry Li
GC355 can't work at below steps: - suspend resume - load gpu driver and run gc355 application In order to make GPU work properly, GPU clock needs to be on while power on GPU. Not only direct GPU clk ccgr needs to be on, but also relative clock in GPU clock tree has to be enabled. Signed-off-by: Larry Li <b20787@freescale.com>
2012-02-22ENGR00174886-1 - EPDC fb: Don't register EPDC unless "epdc" kernel option setDanny Nold
- Add E Ink support as a default for MX6 platforms - Conditionalize registration of EPDC-related modules based on "epdc" kernel command line option Signed-off-by: Danny Nold <dannynold@freescale.com>
2012-02-22ENGR00174569: MX6 - Disable WAIT mode by defaultRanjani Vaidyanathan
None of the workarounds implemented in SW provide a stable solution for the WAIT mode issue. For this release, WAIT mode is disabled by default. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
2012-02-22ENGR00174734-1 usb: need to discharge both dp and dmPeter Chen
Change to discharge both dp and dm Signed-off-by: Peter Chen <peter.chen@freescale.com>
2012-02-22ENGR00174615:Enable AH-1613 GPS moduleB38613
set GPIO config and disable UART3 DMA. Signed-off-by: Zhou Jianzheng <B38613@freescale.com>
2012-02-21ENGR00171079-10: mx6q-arm2 cs42888 board sample rate settingsAdrian Alonso
* Board mx6q-arm2 cs42888 supportted sample rate settings, pass them trough mxc_audio_codec_platform_data Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-02-21ENGR00171079-9: mx53-ard cs42888 board sample rate settingsAdrian Alonso
* Board mx53-ard cs42888 supportted sample rate settings, pass them trough mxc_audio_codec_platform_data * Update copyrigth year 2012 Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-02-21ENGR00171079-8 imx6q sabreauto cs42888 audio supportAdrian Alonso
* Add imx6q sabreauto cs42888 audio support * Set clock parent relations anaclk_2 -> pll4_audio_clk -> esai_root_clk * Match corresponding sysclk frequency to keep lrclk_ratio relation on imx-cs4288 esai configuration Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-02-21ENGR00171079-7 mx6q clock anaclk input source clockAdrian Alonso
* Add mx6q anaclk_1/2 clock input source clock support * anaclk can be bypassed to pll4_audio. * _clk_audio_video_set_parent allows to bypass anaclk input clock source, for sabreauto platform anaclk_2 is the clock source for cs42888 and this clock needs to be bypassed to esai to supply the same master clk signal. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-02-21ENGR00171079-5 imx6q-sabreauto set supportted sample ratesAdrian Alonso
* cs42888 set imx6q-sabreauto supportted play/record sample rates master clk signal is a fixed source clock @24576000Mhz, thus limit the play/record sample rates lrclk. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-02-21ENGR00171079-2 mx6 add anaclk_2 io buffers enable macrosAdrian Alonso
* Add ANACLK_2 input/output buffers enable macros. In orther to bypass anaclk_2 to pll4_audio need to set anaclk_2 input buffer enable bits. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
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