Age | Commit message (Collapse) | Author |
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In order to prepare to per-arch implementations of preempt_count move
the required bits into an asm-generic header and use this for all
archs.
(cherry picked from commit a787870924dbd6f321661e06d4ec1c7a408c9ccf)
Conflicts:
arch/c6x/include/asm/Kbuild
arch/cris/include/asm/Kbuild
arch/h8300/include/asm/Kbuild
arch/ia64/include/asm/Kbuild
arch/mips/include/asm/Kbuild
arch/openrisc/include/asm/Kbuild
arch/powerpc/include/asm/Kbuild
arch/score/include/asm/Kbuild
include/linux/preempt.h
Change-Id: I544914d3c23cc50da658296a34f9f2796854e259
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/n/tip-h5j0c1r3e3fk015m30h8f1zx@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
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Under arm64 elf_hwcap is a 32 bit quantity, but it is stored in
a 64 bit auxiliary ELF field and glibc reads hwcap as 64 bit.
This patch widens elf_hwcap to be 64 bit.
(cherry picked from commit 25804e6a96681d5d2142058948e218999e4f547c)
Change-Id: I4fd594b82ab12da3733a95a4882761320aa596d2
Signed-off-by: Steve Capper <steve.capper@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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This function is only called from arch/arm64/mm/fault.c.
(cherry picked from commit 59f67e16e6b79697241c3fd030e3da300377893e)
Change-Id: I7f139f99952934b68f7a7ecb878cdd3d5c0c7fa9
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Unlike global OOM handling, memory cgroup code will invoke the OOM killer
in any OOM situation because it has no way of telling faults occuring in
kernel context - which could be handled more gracefully - from
user-triggered faults.
Pass a flag that identifies faults originating in user space from the
architecture-specific fault handlers to generic code so that memcg OOM
handling can be improved.
(cherry picked from commit 759496ba6407c6994d6a5ce3a5e74937d7816208)
Conflicts:
arch/arc/mm/fault.c
Change-Id: I6ddf37c0feae69fcda0c2db76d2b10ca2a11c619
Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Cc: David Rientjes <rientjes@google.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: azurIt <azurit@pobox.sk>
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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(cherry picked from commit 909e3ee4119f87b85c6e1b8534b2287ed1ea3ca2)
Change-Id: I8c7d92a8b0a09fa187daf7d1b4878b92d68e3746
Signed-off-by: Dan Aloni <alonid@stratoscale.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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We always use a timer-backed delay loop for arm64, so don't bother
reporting a bogomips value which appears to confuse some people.
(cherry picked from commit 326b16db9f69fd0d279be873c6c00f88c0a4aad5)
Change-Id: I21b18f10bf43d32527cb96f6caf8c6a4c46960a6
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Most architectures use the same implementation. Collapse the common ones
into a single weak function that can be overridden.
(cherry picked from commit a1727da599ad030ccaf4073473fd235c8ee28219)
Change-Id: I5cfcac67b98407f8e4c4dcb89829f2a8e0d1b88b
Signed-off-by: Grant Likely <grant.likely@linaro.org>
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The map_mem() function limits the current memblock limit to PGDIR_SIZE
(the initial swapper_pg_dir mapping) to avoid create_mapping()
allocating memory from unmapped areas. However, if the first block is
within PGDIR_SIZE and not ending on a PMD_SIZE boundary, when 4K page
configuration is enabled, create_mapping() will try to allocate a pte
page. Such page may be returned by memblock_alloc() from the end of such
bank (or any subsequent bank within PGDIR_SIZE) which is not mapped yet.
The patch limits the current memblock limit to the aligned end of the
first bank and gradually increases it as more memory is mapped. It also
ensures that the start of the first bank is aligned to PMD_SIZE to avoid
pte page allocation for this mapping.
(cherry picked from commit e25208f77c2dad5a9f2ab3d3df61252a90b71afa)
Conflicts:
arch/arm64/mm/mmu.c
Change-Id: I11d3d87e0b529bc9fab26f56670a64e6f7d35d60
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: "Leizhen (ThunderTown, Euler)" <thunder.leizhen@huawei.com>
Tested-by: "Leizhen (ThunderTown, Euler)" <thunder.leizhen@huawei.com>
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The current vmlinux.lds.S places the notes sections between the
end of rw data and start of bss. This means that _edata doesn't
really point to the end of data. Since notes are read-only, this
patch moves them to the read-only segment so that _edata does
point to the end of initialized rw data.
(cherry picked from commit c80b7ee8520606f77fbc8ced870c96659053269e)
Conflicts:
arch/arm64/kernel/vmlinux.lds.S
Change-Id: Id4cbef5210ca2fd9c4dee910b1be8d5a5537d77d
Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
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do_undefinstr() has to be called with interrupts disabled since it may
read the instruction from the user address space which could lead to a
data abort and subsequent might_sleep() warning in do_page_fault().
(cherry picked from commit 2600e130b3c90c8d6c13229d3d3a14dcb898a87b)
Change-Id: Iafc0a7659b6b9c91eabd94b8d127506159860a49
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Expand the arm64 image header to allow for co-existance with
PE/COFF header required by the EFI stub. The PE/COFF format
requires the "MZ" header to be at offset 0, and the offset
to the PE/COFF header to be at offset 0x3c. The image
header is expanded to allow 2 instructions at the beginning
to accommodate a benign intruction at offset 0 that includes
the "MZ" header, a magic number, and the offset to the PE/COFF
header.
(cherry picked from commit 4370eec05a887b0cd4392cd5dc5b2713174745c0)
Change-Id: If4f180805b305af50f612ef10b37b58c27dfba4d
Signed-off-by: Roy Franz <roy.franz@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Add <asm/neon.h> containing kernel_neon_begin/kernel_neon_end function
declarations and corresponding definitions in fpsimd.c
These are needed to wrap uses of NEON in kernel mode. The names are
identical to the ones used in arm/ so code using intrinsics or
vectorized by GCC can be shared between arm and arm64.
(cherry picked from commit 4cfb36136480c029a29dbf63a623506e6ed7282b)
Conflicts:
arch/arm64/Kconfig
Change-Id: I4693396492e755b31ad5663b5ede6d765b41a619
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
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We're going to introduce support to read and write the memory
mapped timer registers in the next patch, so push the cp15
read/write functions one level deeper. This simplifies the next
patch and makes it clearer what's going on.
(cherry picked from commit 60faddf6eb3aba16068032bdcf35e18ace4bfb21)
Change-Id: I8b7a55ba7d9919fc0ec512f64fe1ed7ac9dd227d
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
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Using an enum for the register we wish to access allows newer
compilers to determine if we've forgotten a case in our switch
statement. This allows us to remove the BUILD_BUG() instances in
the arm64 port, avoiding problems where optimizations may not
happen.
To try and force better code generation we're currently marking
the accessor functions as inline, but newer compilers can ignore
the inline keyword unless it's marked __always_inline. Luckily on
arm and arm64 inline is __always_inline, but let's make
everything __always_inline to be explicit.
(cherry picked from commit e09f3cc0184d6b5c3816f921b7ffb67623e5e834)
Change-Id: I8e8e8bcd3d1c05001553ebfebc7dfd8a561c40e4
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
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On some PAE architectures, the entire range of physical memory could reside
outside the 32-bit limit. These systems need the ability to specify the
initrd location using 64-bit numbers.
This patch globally modifies the early_init_dt_setup_initrd_arch() function to
use 64-bit numbers instead of the current unsigned long.
There has been quite a bit of debate about whether to use u64 or phys_addr_t.
It was concluded to stick to u64 to be consistent with rest of the device
tree code. As summarized by Geert, "The address to load the initrd is decided
by the bootloader/user and set at that point later in time. The dtb should not
be tied to the kernel you are booting"
More details on the discussion can be found here:
https://lkml.org/lkml/2013/6/20/690
https://lkml.org/lkml/2012/9/13/544
(cherry picked from commit 374d5c9964c10373ba39bbe934f4262eb87d7114)
Change-Id: Iab36378e1de4e6c2cb07a3b88aeb5ff4afbe535b
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
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If 'COMPAT' not defined, aarch32_break_handler() cannot pass compiling,
and it can work independent with 'COMPAT', so remove dummy definition.
The related error:
arch/arm64/kernel/debug-monitors.c:249:5: error: redefinition of ‘aarch32_break_handler’
In file included from arch/arm64/kernel/debug-monitors.c:29:0:
/root/linux-next/arch/arm64/include/asm/debug-monitors.h:89:12: note: previous definition of ‘aarch32_break_handler’ was here
Change-Id: I4934c850f0b4e75b400b7ea40485758e6ace068c
(cherry picked from commit c783c2815e13bbb0c0b99997cc240bd7e91b6bb8)
Signed-off-by: Chen Gang <gang.chen@asianux.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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To resolve emc scaling latency due to sudden increase in cpu load
reverting the commit 426603c79c99049b6df03698fcdcde6d9dd8e571.
Bug 1408292
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/365365
(cherry picked from commit bc07275505f93cbf3d4e2ece403d4ef21be88bdf)
Change-Id: Iadbb796aa7eb2469ba1ed6becd4ae739bd49438b
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/402032
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Tested-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
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This reverts commit 193e70e3a74bb167e4a443329dc0bd3cf0fcd7a0.
VDE partition has to be left on before entering LP0, otherwise
secure content playback may be corrupted after resuming from LP0.
So we unpowergate vde in the dependent change. This change turn
off vde partition specifically for LP1 case to save power.
Bug 1502013
Bug 1507043
Change-Id: Ibf1dcb40a33cb52f9366e250452a54ae43fcb67a
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/401253
(cherry picked from commit f8b07f13193c1bdd2c76c6dc2520ee66c12b8790)
Reviewed-on: http://git-master/r/401983
Tested-by: Praveen Kumar Reddy M.V. <pkreddy@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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TN8 board can only support 1.2A charging current
for QC2 on 9V voltage output from charger.
Changed default charging to 2A from 1.8A from reviw.
h/w will only deliver 1.8 but charger needs to set to 2A.
Bug 1424733
Bug 1458999
(cherry picked from commit 708790edc747b8e180b44a2940ec834ed738579a)
(cherry picked from commit 58a61894a1edc498938ca57657f0466f5db94440)
Change-Id: I237a7e220e2a83cc4d0b3d700773497f50c26afc
Reviewed-on: http://git-master/r/384596
Reviewed-on: http://git-master/r/396040
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/401887
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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compiler can optimize out asm instructions if
volatile is not used. That could cause some
intermittent failures on jit codes.
Bug 1504845
Bug 1506516
Change-Id: I3192452bb3a9d26a88b7ea706efdd9d470ca8f88
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/401816
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Update CPU and GPU EDP limits for various T132 platforms.
Bug 1434482
Change-Id: Ie2faa7d42ab127e7f8d6512c24da5c341f14e7bd
Reviewed-on: http://git-master/r/399958
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/400011
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update EMC DVFS table and add temperature
derated DVFS table for E1971
Bug 1434354
Change-Id: I0091d99944ffb8e42b5595d0801e1bee17c2cab9
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/399981
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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While updating defconfig using ksetup and ksaveconfig, non-comms
changes are seen. Clean up defconigs using ksetup and immediate
ksavedefconfig.
Bug 1430977
Change-Id: I2a360623490565f0e1b77e38efc94678a5305217
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/398715
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Initial created dts file for vcm30t124 Android.
A serial port for all ardbeg devices is uartc and it's
enumerated on ttyTHS2.
But it's uartd on vcm30t124 and uartd is enumerated on ttyTHS3.
So changed the ordering so that uartd can be enumerated on ttyTHS2.
bug 1440706
Change-Id: I6e226812402bc75991ece96c335b492f949f7976
Signed-off-by: Phoenix Jung <pjung@nvidia.com>
Reviewed-on: http://git-master/r/395661
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
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The build system need tegra124-loki.dtb for building the prebuilt
binary. This file has been removed as this does not refelct any top
level file.
Added tegra124-loki.dts to make build system happy.
bug 1504108
Change-Id: I7b619982cbf8dfff324ff2110cce8dec0aeb959e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/399359
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commit 779ca908b414cc0adfa2ebcb5e754f1c42645703 accidentally
removed the CONFIG_USB_RTL8152 causing the driver to not load.
Enable it again.
Bug 1404932
Change-Id: Idbe8235ca329d7c22d0e240b6301d985799ac46a
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/390302
(cherry picked from commit 0e22f4817db37ee718e3cde2fa600028bfa79aeb)
Reviewed-on: http://git-master/r/396905
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Reducing severity of boot messages to info
bug 1489629
Change-Id: I116716e6d94bd197604cea475ccf4954da95feb3
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/397006
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Added support CONFIG_TEGRA_PREPOWER_WIFI to turn
WiFi on as soon as IO-expendor is initialized.
bug 1440706
bug 1481604
Change-Id: I58825ef0449db48d67657e32f04441ca8995a83f
Signed-off-by: Phoenix Jung <pjung@nvidia.com>
Reviewed-on: http://git-master/r/393760
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
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This patch makes the necessary modifications to the gk20a driver to
allow building it as a module.
Bug 1476801
Change-Id: I88c4e1c1867baa1c2d010ac6e0c30bdb5fd63b91
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/380970
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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The GPU driver should be buildable as a module, however, it
needs to register the GPCPLL into the clock framework. This
patch exports the tegra_clk_register_export_ops() symbol to allow
the GPU driver register the internal clock.
Bug 1476801
Change-Id: Ic6514a13cc54b51e24c8989b386e0c744831bf20
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/387606
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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T124 ERS platforms has more trace length due to
interposer board for WiFi chip. So set drive
strength type A.
Bug 1458921
Change-Id: Iaf4b5539ce4b8a088b91b8c8b8d99d8a64408e81
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/395844
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Disable PREPOWER_WIFI from tegra13_defconfig.
Bug 1466881
Change-Id: Ie96318e19019bff65bb84a4a3806999545e62961
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/398703
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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- Load the emc tables from Device Tree by default.
- This is only if memory-controller node representing the
emc-table is available in the Device Tree.
Change-Id: I49d414bddd7b9af1bc45f671bb6d29f46c103783
Signed-off-by: Jay Bhukhanwala <jbhukhanwala@nvidia.com>
Reviewed-on: http://git-master/r/391035
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
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Clean up the GPU thermal throttling pulse skipper status read path.
Add some temporary functions to indicate what features are present on
what chips -- these need to be removed and replaced with some DT
mechanism during the platform_driver conversion.
I suspect this implementation still isn't ideal. Seems to me that we
should register two separate cooling devices, one for the CPU and the
other for the GPU. If SOC_THERM doesn't control CPU or GPU throttling
on a given chip, then it shouldn't register the software cooling
device. Instead, the driver for the IP block that handles the cooling
device should do it. That should clean this code up somewhat.
Bug 1201644
Bug 1380438
Bug 1482040
Change-Id: I48240ea0624842a389af74bd7f7fdc71c5f2eae8
Cc: Aleksandr Frid <afrid@nvidia.com>
Cc: Diwakar Tundlam <dtundlam@nvidia.com>
Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Reviewed-on: http://git-master/r/397740
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
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bug 1483704
Allow setting of SS PLL charge pump depending on
clk.u.pll.cpcon_default field value, instead
of a single #define shared by all SS PLLs.
Affects pll_c4, pll_dp, and pll_d2.
Change-Id: I4893c524c13ab321a3c592b9976c8653b2985173
Signed-off-by: Aron Wong <awong@nvidia.com>
Reviewed-on: http://git-master/r/389878
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
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On T132, offlining a core within Linux is not sufficient to guarantee that
the core is continually in a powered-down state. Until we do have a sufficient
guarantee, we will use EDP tables to always enforce the 2-core freq cap even
when a single core is ONLINE.
To do this in the simplest way, values in the dynamic_constants[] array and
the leakage_constants[] array are all set to the 2-core value below in the
structure init. With this, there's no need to modify the code edp logic in
edp.c and it remains specific to this chip.
The actual 1-core values for these two arrays is saved as a comment to
resurrect when actually needed.
Bug 1434482
Bug 1427964
Change-Id: I295c21ae68b99626e824a1210479155ce9cbf279
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/399106
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
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Bug 1434359
update EMC DVFS table for E1973 (Bowmore 2GB)
Change-Id: Ifbe9162750d4b62530f1222ef8421910639dbd69
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: http://git-master/r/398572
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>
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soc dvfs version p4v39
Bug 1497005
Change-Id: I2c78afe2cd4c45e1199dd0ba8e56556d749bb47e
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/397514
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
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Change the SATA's DT compatibility and other properties in accordance
with the changes done by Mobile team.
Bug 1352942
Change-Id: I53cc3a01a66226e0a8fe653fb8e4e014735654b7
Signed-off-by: Raveesh Kote <rkote@nvidia.com>
Reviewed-on: http://git-master/r/396824
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
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Register the tegra SE device through DT and place the traditional
way of device registration under #ifndef CONFIG_USE_OF flag.
Bug 1352942
Change-Id: I1baf98a915ccd51a8772c24073c4104c9d681f75
Signed-off-by: Raveesh Kote <rkote@nvidia.com>
Reviewed-on: http://git-master/r/394646
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
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Change-Id: Ife6926d0c00d7e046b2579795f50ef96d633fc8f
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/395845
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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bug 1484046
bug 1442709
Change-Id: I9e99e9c1f9574a0563b1a65b599a0bebb58b23c4
Signed-off-by: Robert Shih <rshih@nvidia.com>
Reviewed-on: http://git-master/r/384163
(cherry picked from commit 2def51500d06b91ab2577302b5c2727fe587659e)
Signed-off-by: Robert Shih <rshih@nvidia.com>
Reviewed-on: http://git-master/r/398134
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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The loki dts file tegra124-loki.dts is no more the top level dts file as
it is used on multiple top level dts file.
The tegra124-loki.dts contains now the most common registration for loki
family and hence renaming this to appropriately as dtsi file.
Change-Id: I66dda8158ce0c74256d4a3241d4b29d0d35c30a7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/397155
Reviewed-by: David Dastous St Hilaire <ddastoussthi@nvidia.com>
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Disable PREPOWER_WIFI from L4T defconfig.
Bug 1466881
Change-Id: Ief4da29b1264066705cf218f2fc239033f2cfc25
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/378733
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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both rear/front sensors are ov5693 on this device revision.
Change-Id: I33d97b8c2299a39fd7f9ab088befdfef3fda1005
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/397826
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Add cpufreq, cpuidle and cpuquiet to proper location
Bug 1453967
Change-Id: I03b35ed12acdf5c6fc62c3bddc8b5a2a018a1303
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/396582
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
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Bug 1495051
Change-Id: I1ca1e5ba679ef3e838ed17a343a9e972872fdb91
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/395857
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Use the API provided by tegar-pmc driver for configuring the PMC
interrupt polarity at appropriate location for Laguna and Norrin.
Remove extra function calls and macros used locally for achieving this.
Change-Id: Ic5e990453fd9bc2b61f433a7850708a34a4d0fa7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/397149
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The device registration of AMS AS3722 PMIC has been moved to DT
for all platforms and hence it is not require to have macros and
header inclusion for board files.
Removing the macro definition and heade inclusion for this file.
Change-Id: I694f6e466eb2777c3e5afde9981a97146d412cb7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/397148
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TCA6416 device has been moved to DT for its registration and so it
is not require to have macro for this device and header inclusion of
this device.
Remove the macro and header inclusio from different board source
files.
Change-Id: I39a06417bc12acdbc8ff430acc7a6a449a0060d8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/397147
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