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Add hwmod device names for OMAP4; this enables device build for omap4 dss
hwmod IPs.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Mayuresh Janorkar <mayur@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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DSS code uses ick as one of the clocks in clk_get/clk_put. OMAP4 clock database
doesn't have ick for DSS, so adding ick as dummy clock.
This is needed for backward compatibility with OMAP2/3.
Once pm_runtime* APIs get introduced in DSS, this will be revisited.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Currently, clock database has <dev, clock-name> tuples for DSS2. Because of
this, the clock names are different across different OMAP platforms.
This patch aligns the DSS2 clock names and roles across OMAP 2420, 2430, 3xxx,
44xx platforms in the clock databases, hwmod databases for opt-clocks, and DSS
clock handling.
This ensures that clk_get/put/enable/disable APIs in DSS can use uniform role
names.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So a platform_driver for DSI is created and init exit methods are moved from core.c
to its driver probe,remove. pdev member has to be maintained by its own drivers.
Also, vdds_dsi regulator handling is copied to dsi.c, since vdds_dsi regulator is
needed by dpi_init() too. Board files are updated accordingly to add 2 instances of
vdds_dsi regulator.
DSI platform driver is registered from inside omap_dss_probe, in the order desired.
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So a platform_driver for VENC is created and init exit methods are moved from core.c
to its driver probe,remove. pdev member has to be maintained by its own drivers.
Also, venc_vdda_dac reading is moved to venc.c.
VENC platform driver is registered from inside omap_dss_probe, in the order desired.
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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All clock management is moved to dss platform driver. clk_get/put APIs use
dss device instead of core platform device.
Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So the device name is changed from omapdss to omapdss_dss in 2420, 2430,
3xxx clock database files. Now the core driver "omapdss" only takes care
of panel registration with the custom bus.
core driver also uses the clk_enable() / clk_disable() APIs exposed by DSS for
clock management.
DSS driver would do clock management of clocks needed by DISPC, RFBI, DSI, VENC
TODO: The clock content would be adapted to omap_hwmod in a seperate series.
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Looks up the hwmod database for each of the given DSS HW IP and builds
omap_device which inturn does the platform device register for each of DSS HW IP
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Remove extra vdda_dac supply definition. It was a leftover from conflict
resolution.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
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On the newer ARM processors like CortexA8, CortexA9, the caches can be
speculatively loaded while they are getting flushed.
Clear the SCTLR C bit to prevent further data cache allocation as
part of cache clean routine
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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The current code saves few un-necessary registers which are read-only or
write-only, unused CP15 registers.
Remove them and keep only necessary CP15 registers part of
low power context save/restore.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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When L1 cache is suppose to be lost, it needs to be cleaned before
entrering to the low power mode.
While at this, also fix few comments and remove un-necessary
clean_l2 lable.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Add necessary barriers after enabling MMU. Also use the sane way to
load pc and jump to it instead of executing ldma first up.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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On ARMv7 dsb, dmb instructions are supported and can be used directly
instead of their cp15 equivalnet. Also remove the opcodes for smc
and use the available instruction directly in OMAP3 low power asm code
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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omap_sr_probe() creates the smartreflex debug directory and its
underlying nvalue debug directory. These directories are removed in
omap_sr_remove().
Basic smartreflex functionality tested on OMAP3630 Zoom3 & OMAP4430 SDP
Signed-off-by: Anand S Sawant <sawant@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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* Build unconditionally as ARM for correct interoperation with
OMAP firmware.
* Fix an out-of-range ADR when building for ARM.
* Remove deprecated PC-relative stores.
* Add the required ENDPROC() directive for each ENTRY().
* .align before data words.
* Handle non-interworking return from v7_flush_dcache_all.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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* Build unconditionally as ARM for correct interoperation with
OMAP firmware.
* Remove deprecated PC-relative stores
* Add the required ENDPROC() directive for each ENTRY().
* .align before data words
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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For various reasons, Linux now only officially supports being built
with tools which are new enough to understand the SMC instruction.
Replacing the hand-encoded instructions when the mnemonic also
allows for correct assembly in Thumb-2 (otherwise, the result is
random data in the middle of the code).
The Makefile already ensures that this file is built with a high
enough gcc -march= flag (armv7-a).
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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CONFIG_THUMB2_KERNEL
Code marked with ENTRY() also needs a matching ENDPROC() directive,
in order to ensure that the type and instruction set of the
symbol are correctly annotated.
ENDPROC() tags the affected symbol as a function symbol, which will
ensure that link-time fixups don't accidentally switch to the
wrong instruction set.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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For CONFIG_THUMB2_KERNEL, the existing definition of do_wfi() will
insert invalid code into the instruction stream.
Any assembler which can assemble Thumb-2 is guaranteed to accept
the "wfi" mnemonic, so for the Thumb-2 case, just use the mnemonic.
The ARM case is left as-is.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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IVA device is not present in many OMAP3 variants.
This patch ensures that initialization is tied to
the presence of IVA on the device.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Voltage control on TWL can be done using VMODE/I2C1/I2C_SR.
Since almost all platforms use I2C_SR on omap3, omap3_twl_init by
default expects that OMAP's I2C_SR is plugged in to TWL's I2C
and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected,
the board files are expected to call omap3_twl_set_sr_bit(false) to
ensure that I2C_SR path is not set for voltage control and prevent
the default behavior of omap3_twl_init.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Shweta Gulati <shweta.gulati@ti.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Add a description field to each idle C-state. This helps to give
better data with PowerTop and one don't have to refer to the code
to link what Cx means from system point of view while analysing
PowerTop data.
No functional change.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Remove the custom restore_control_register() and use the exported
set_cr() instead to set the system control register(SCTRL) value.
No functional change.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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The OMAP2 and OMAP3 PM code clears clockdomain wakeup and sleep
dependencies. This is unnecessary after commit
6f7f63cc9adf3192e6fcac4e8bed5cc10fd924aa ("OMAP clockdomain:
initialize clockdomain registers when the clockdomain layer starts")
which clears these dependencies during clockdomain init.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Now that omap_hwmod + omap_device is used for OMAP UART device and
driver code, we no longer need the UART physical addresses in
omap_globals.
Note that the #defines for the base addresses are still left in
<plat/serial.h> since they are used by DEBUG_LL and uncompress code.
Build tested for OMAP1 (omap1_defconfig) and OMAP2+ (omap2plus_defconfig)
Signed-off-by: Kevin Hilman <khilman@ti.com>
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kzalloc() may fail, if so return -ENOMEM. Also Walter Harms suggested
to use kasprintf() instead of kzalloc+strcpy+strcat.
Signed-off-by: Vasiliy Kulikov <segoon@openwall.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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OMP3630 silicon can enable higher frequencies only depending on the board
characteristics meeting the recommended standards, and has to be selectively
toggled.
Beagle XM uses 3730 variant and the board design allows enabling 800MHz and
1GHz OPPs. However, We need Smart reflex class 1.5 and ABB to enable 1GHz
safely. For the moment, we tweak the default table to allow for 800Mhz OPP
usage.
Reported-by: Koen Kooi <koen@beagleboard.org>
Tested-by: Koen Kooi <koen@beagleboard.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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omap3 and omap4 opp_init should be made non-static to allow
for platform specific opp table tweaking. making these static
conflicts with the definition in pm.h(global) as well.
we include pm.h as well to ensure that there are no such prototype
conflicts with actual implementation in the future.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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In case in user has a OMAP3630 < ES1.2 the kernel should warn the user
about the ERRATUM, but using pr_warn instead of WARN_ON is already
enough, as there is nothing else the user can do besides changing the
board.
Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@canonical.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into omap-for-linus
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According to the hwmod interface data, the DSS submodule "VENC" uses a
clock, "dss_54m_fck"/"dss_tv_fck", which the PRCM cannot autoidle. By
default, the hwmod code assumes that interface clocks can be autoidled
by the PRCM. When the interface clock can't be autoidled by the PRCM,
those interfaces must be marked with the OCPIF_SWSUP_IDLE flag.
Otherwise, the "interface clock" will always have a non-zero use
count, and the device won't enter idle. This problem was observed on
N8x0.
Fix the immediate problem by marking the VENC interface with the
OCPIF_SWSUP_IDLE flag. But it's not clear that
"dss_54m_fck"/"dss_tv_fck" is really the correct interface clock for
VENC. It may be that the VENC interface should use a
hardware-autoidling interface clock. This is the situation on OMAP4,
which uses "l3_div_ck" as the VENC interface clock, which can be
autoidled by the PRCM. Clarification from TI is needed.
Problem found and patch tested on N8x0 by Tony Lindgren
<tony@atomide.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Senthilvadivu Guruswamy <svadivu@ti.com>
Cc: Sumit Semwal <sumit.semwal@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The driver provides the information regarding the ocp errors
that gets logged in the interconnect. The error information
gives the detail regarding the target that was attempted
to be accessed and its corresponding address.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
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The l3 interconnect device is build with all the data required
to handle the error logging. The data is extracted from the
hwmod data base.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
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Add the address spaces, irqs of the l3 interconnect to the
hwmod data. The hwmod change is aligned with Benoit Cousson.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
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The driver provides the information regarding the ocp errors
that gets logged in the interconnect.The error info provides
the details regarding the master or the target that
generated the error, type of error and the corresponding address.
The stack dump is also provided.
Signed-off-by: sricharan <r.sricharan@ti.com>
[r.sricharan@ti.com: Enhacements, major cleanup and made it functional]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[santosh.shilimkar@ti.com: Driver design changes as per OMAP4 version]
Signed-off-by: Felipe Balbi <balbi@ti.com>
[balbi@ti.com: Initial version of the driver]
Acked-by: Benoit Cousson <b-cousson@ti.com>
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The l3 interconnect device is build with all the data required
to handle the error logging. The data is extracted from the
hwmod database.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
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Add the address spaces, irqs of the l3 interconnect to the
hwmod data. The hwmod changes are aligned with Benoit Cousson.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
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The i2c_board_info entry supporting AIC23 codec was added into
the i2c2 bus.
Signed-off-by: Abhilash K V <abhilash.kv@ti.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Commit 3cf32bba8ca0e0052ca41d74d455a5805b7fea85 ("OMAP: McBSP: Convert
McBSP to platform device model") breaks compilation with non-multi-OMAP1
configs:
CC arch/arm/mach-omap1/mcbsp.o
arch/arm/mach-omap1/mcbsp.c: In function 'omap1_mcbsp_init':
arch/arm/mach-omap1/mcbsp.c:384: warning: dereferencing 'void *' pointer
arch/arm/mach-omap1/mcbsp.c:387: error: invalid use of void expression
arch/arm/mach-omap1/mcbsp.c:390: warning: dereferencing 'void *' pointer
arch/arm/mach-omap1/mcbsp.c:393: error: invalid use of void expression
Fix by avoiding NULL dereferences.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
[tony@atomide.com: updated description not to remove unnecessary branch name]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C64XX: Update regulator names for debugfs compatiblity on SMDK6410
ARM: S3C64XX: Fix build with WM1190 disabled and WM1192 enabled on SMDK6410
ARM: S3C64XX: Reduce output of s3c64xx_dma_init1()
ARM: S3C64XX: Tone down SDHCI debugging
ARM: S3C64XX: Add clock for i2c1
ARM: S3C64XX: Staticise non-exported GPIO to interrupt functions
ARM: SAMSUNG: Include devs.h in dev-uart.c to prototype devices
ARM: S3C64XX: Fix keypad setup to configure correct number of rows
ARM: S3C2440: Fix usage gpio bank j pin definitions on GTA02
ARM: S5P64X0: Fix number of GPIO lines in Bank F
ARM: S3C2440: Select missing S3C_DEV_USB_HOST on GTA02
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* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
davinci: cpufreq: fix section mismatch warning
DaVinci: fix compilation warnings in <mach/clkdev.h>
davinci: tnetv107x: fix register indexing for GPIOs numbers > 31
davinci: da8xx/omap-l1x: add platform device for davinci-pcm-audio
ARM: pxa/tosa: register wm9712 codec device
ARM: pxa: enable pxa-pcm-audio on pxa210/pxa25x platform
ARM: pxa/colibri: don't register pxa2xx-pcmcia nodes on non-colibri platforms
ARM: pxa/tosa: drop setting LED trigger name, as it's unsupported now
ARM: 6762/1: Update number of VIC for S5P6442 and S5PC100
ARM: 6761/1: Update number of VIC for S5PV210
ARM: 6768/1: hw_breakpoint: ensure debug logic is powered up on v7 cores
ARM: 6767/1: ptrace: fix register indexing in GETHBPREGS request
ARM: 6765/1: remove obsolete comment from asm/mach/arch.h
ARM: 6757/1: fix tlb.h induced linux/swap.h build failure
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
omap: mailbox: resolve hang issue
OMAP2+: PM: SmartReflex: fix memory leaks in Smartreflex driver
arm: mach-omap2: smartreflex: fix another memory leak
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git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin:
Blackfin: iflush: update anomaly 05000491 workaround
Blackfin: outs[lwb]: make sure count is greater than 0
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git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
ARM: mach-shmobile: mackerel: modify LCDC clock divider value
ARM: mach-shmobile: ap4evb: modify LCDC clock divider value
ARM: mach-shmobile: mackerel: fixup memory initialize for zboot
ARM: mach-shmobile: ap4evb: fixup memory initialize for zboot
ARM: mach-shmobile: Add sh73a0 MIPI-CSI and CEU clocks
ARM: mach-shmobile: AG5EVM MIPI-DSI LCD reset delay fix
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git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: Change __nosave_XXX symbols to long
sh: Flush executable pages in copy_user_highpage
sh: Ensure ST40-300 BogoMIPS value is consistent
sh: sh7750: Fix incompatible pointer type
sh: sh7750: move machtypes.h to include/generated
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The following commit: 38698be:
OMAP2+: clockevent: set up GPTIMER clockevent hwmod right before timer init
Fixed properly the issue with early init for the timer1
So reverts commit 3b03b58dab847883e6b9a431558c7d8e43fa94c6 that is now
generated a warning at boot time.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The debugfs support added to the regulator API (which has been merged
in during this merge window) creates directories for regulators named
after the display names for the regulators so replace / as a separator
for multiple supplies with + in the SMDK6410 machine.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Avoid relying on implicit inclusion of machine.h
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Reduce the logging output of s3c64xx_dma_init1() as it is not useful
for normal bootup (and we get an overall indication of the registration
of the PL180 DMA block).
This removes the following output from the log:
s3c64xx_dma_init1: registering DMA 0 (e0808100)
s3c64xx_dma_init1: registering DMA 1 (e0808120)
s3c64xx_dma_init1: registering DMA 2 (e0808140)
s3c64xx_dma_init1: registering DMA 3 (e0808160)
s3c64xx_dma_init1: registering DMA 4 (e0808180)
s3c64xx_dma_init1: registering DMA 5 (e08081a0)
s3c64xx_dma_init1: registering DMA 6 (e08081c0)
s3c64xx_dma_init1: registering DMA 7 (e08081e0)
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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